| /kernel/linux/patches/linux-5.10/imx8mm_patch/patches/ |
| D | 0003_linux_crypto.patch | 7 Change-Id: I2114b2e4bc24d3354e6a67213ac3e47c24d6260b
9 diff --git a/crypto/Kconfig b/crypto/Kconfig
11 --- a/crypto/Kconfig
13 @@ -365,6 +365,26 @@ config CRYPTO_ECHAINIV
19 + select CRYPTO_AEAD
20 + select CRYPTO_BLKCIPHER
21 + select CRYPTO_MANAGER
22 + select CRYPTO_HASH
23 + select CRYPTO_NULL
24 + select CRYPTO_AUTHENC
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| /kernel/linux/linux-5.10/Documentation/admin-guide/pm/ |
| D | intel-speed-select.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 Intel(R) Speed Select Technology User Guide
7 The Intel(R) Speed Select Technology (Intel(R) SST) provides a powerful new
14 - https://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-artic…
15 - https://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enha…
19 dynamically without pre-configuring via BIOS setup options. This dynamic
21 and configure these features is by using the Intel Speed Select utility.
23 This document explains how to use the Intel Speed Select tool to enumerate and
29 intel-speed-select configuration tool
32 Most Linux distribution packages may include the "intel-speed-select" tool. If not,
[all …]
|
| /kernel/linux/linux-6.6/Documentation/admin-guide/pm/ |
| D | intel-speed-select.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 Intel(R) Speed Select Technology User Guide
7 The Intel(R) Speed Select Technology (Intel(R) SST) provides a powerful new
14 - https://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-artic…
15 - https://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enha…
19 dynamically without pre-configuring via BIOS setup options. This dynamic
21 and configure these features is by using the Intel Speed Select utility.
23 This document explains how to use the Intel Speed Select tool to enumerate and
29 intel-speed-select configuration tool
32 Most Linux distribution packages may include the "intel-speed-select" tool. If not,
[all …]
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| /kernel/linux/linux-6.6/arch/mips/cavium-octeon/executive/ |
| D | cvmx-l2c.c | 7 * Copyright (c) 2003-2017 Cavium, Inc.
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
36 #include <asm/octeon/cvmx-l2c.h>
37 #include <asm/octeon/cvmx-spinlock.h>
43 * NOTE: This only protects calls from within a single application -
55 return -1; in cvmx_l2c_get_core_way_partition()
89 valid_mask = (0x1 << cvmx_l2c_get_num_assoc()) - 1; in cvmx_l2c_set_core_way_partition()
95 return -1; in cvmx_l2c_set_core_way_partition()
99 return -1; in cvmx_l2c_set_core_way_partition()
[all …]
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| /kernel/linux/linux-5.10/arch/mips/cavium-octeon/executive/ |
| D | cvmx-l2c.c | 7 * Copyright (c) 2003-2017 Cavium, Inc.
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
36 #include <asm/octeon/cvmx-l2c.h>
37 #include <asm/octeon/cvmx-spinlock.h>
43 * NOTE: This only protects calls from within a single application -
55 return -1; in cvmx_l2c_get_core_way_partition()
89 valid_mask = (0x1 << cvmx_l2c_get_num_assoc()) - 1; in cvmx_l2c_set_core_way_partition()
95 return -1; in cvmx_l2c_set_core_way_partition()
99 return -1; in cvmx_l2c_set_core_way_partition()
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/ |
| D | arm,coresight-cti.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/arm/arm,coresight-cti.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
37 indicate this feature (arm,coresight-cti-v8-arch).
52 constants defined in <dt-bindings/arm/coresight-cti-dt.h>
59 Note that some hardware trigger signals can be connected to non-CoreSight
63 - Mike Leach <mike.leach@linaro.org>
66 - $ref: /schemas/arm/primecell.yaml#
68 # Need a custom select here or 'arm,primecell' will match on lots of nodes
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|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/ |
| D | coresight-cti.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/arm/coresight-cti.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
38 indicate this feature (arm,coresight-cti-v8-arch).
53 constants defined in <dt-bindings/arm/coresight-cti-dt.h>
60 Note that some hardware trigger signals can be connected to non-CoreSight
64 - Mike Leach <mike.leach@linaro.org>
67 - $ref: /schemas/arm/primecell.yaml#
69 # Need a custom select here or 'arm,primecell' will match on lots of nodes
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/input/ |
| D | iqs269a.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 The Azoteq IQS269A is an 8-channel capacitive touch controller that features
14 additional Hall-effect and inductive sensing capabilities.
28 "#address-cells":
31 "#size-cells":
34 azoteq,hall-enable:
37 Enables Hall-effect sensing on channels 6 and 7. In this case, keycodes
[all …]
|
| D | iqs626a.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 The Azoteq IQS626A is a 14-channel capacitive touch controller that features
14 additional Hall-effect and inductive sensing capabilities.
19 - $ref: touchscreen/touchscreen.yaml#
31 "#address-cells":
34 "#size-cells":
37 azoteq,suspend-mode:
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/input/ |
| D | iqs269a.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 The Azoteq IQS269A is an 8-channel capacitive touch controller that features
14 additional Hall-effect and inductive sensing capabilities.
28 "#address-cells":
31 "#size-cells":
34 azoteq,hall-enable:
37 Enables Hall-effect sensing on channels 6 and 7. In this case, keycodes
[all …]
|
| /kernel/linux/linux-6.6/net/sctp/ |
| D | associola.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (c) 1999-2000 Cisco, Inc.
5 * Copyright (c) 1999-2001 Motorola, Inc.
15 * lksctp developers <linux-sctp@vger.kernel.org>
65 asoc->ep = (struct sctp_endpoint *)ep; in sctp_association_init()
66 asoc->base.sk = (struct sock *)sk; in sctp_association_init()
67 asoc->base.net = sock_net(sk); in sctp_association_init()
69 sctp_endpoint_hold(asoc->ep); in sctp_association_init()
70 sock_hold(asoc->base.sk); in sctp_association_init()
73 asoc->base.type = SCTP_EP_TYPE_ASSOCIATION; in sctp_association_init()
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|
| /kernel/linux/linux-5.10/net/sctp/ |
| D | associola.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (c) 1999-2000 Cisco, Inc.
5 * Copyright (c) 1999-2001 Motorola, Inc.
15 * lksctp developers <linux-sctp@vger.kernel.org>
65 asoc->ep = (struct sctp_endpoint *)ep; in sctp_association_init()
66 asoc->base.sk = (struct sock *)sk; in sctp_association_init()
67 asoc->base.net = sock_net(sk); in sctp_association_init()
69 sctp_endpoint_hold(asoc->ep); in sctp_association_init()
70 sock_hold(asoc->base.sk); in sctp_association_init()
73 asoc->base.type = SCTP_EP_TYPE_ASSOCIATION; in sctp_association_init()
[all …]
|
| /kernel/linux/linux-5.10/tools/power/x86/intel-speed-select/ |
| D | isst-config.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Intel Speed Select -- Enumerate and control features
51 static int current_clos = -1;
52 static int clos_epp = -1;
53 static int clos_prop_prio = -1;
54 static int clos_min = -1;
55 static int clos_max = -1;
56 static int clos_desired = -1;
121 /* only three CascadeLake-N models are supported */ in update_cpu_model()
130 err(-1, "cannot open /proc/cpuinfo\n"); in update_cpu_model()
[all …]
|
| D | isst-display.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Intel dynamic_speed_select -- Enumerate and control features
26 str_len - curr_index, ","); in printcpulist()
31 index = snprintf(&str[curr_index], str_len - curr_index, "%d", in printcpulist()
67 for (i = size - 1; i >= 0; --i) { in printcpumask()
68 index = snprintf(&str[curr_index], str_len - curr_index, "%08x", in printcpumask()
74 strncat(&str[curr_index], ",", str_len - curr_index); in printcpumask()
97 for (i = 0; i < level - 1; ++i) in format_and_print_txt()
98 j += snprintf(&delimiters[j], sizeof(delimiters) - j, in format_and_print_txt()
133 j += snprintf(&delimiters[j], sizeof(delimiters) - j, in format_and_print()
[all …]
|
| /kernel/linux/linux-6.6/tools/power/x86/intel-speed-select/ |
| D | isst-config.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Intel Speed Select -- Enumerate and control features
51 static int current_clos = -1;
52 static int clos_epp = -1;
53 static int clos_prop_prio = -1;
54 static int clos_min = -1;
55 static int clos_max = -1;
56 static int clos_desired = -1;
153 /* only three CascadeLake-N models are supported */ in update_cpu_model()
162 err(-1, "cannot open /proc/cpuinfo\n"); in update_cpu_model()
[all …]
|
| D | isst-display.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Intel dynamic_speed_select -- Enumerate and control features
26 str_len - curr_index, ","); in printcpulist()
31 index = snprintf(&str[curr_index], str_len - curr_index, "%d", in printcpulist()
67 for (i = size - 1; i >= 0; --i) { in printcpumask()
68 index = snprintf(&str[curr_index], str_len - curr_index, "%08x", in printcpumask()
74 strncat(&str[curr_index], ",", str_len - curr_index); in printcpumask()
97 for (i = 0; i < level - 1; ++i) in format_and_print_txt()
98 j += snprintf(&delimiters[j], sizeof(delimiters) - j, in format_and_print_txt()
133 j += snprintf(&delimiters[j], sizeof(delimiters) - j, in format_and_print()
[all …]
|
| /kernel/linux/linux-5.10/drivers/crypto/ccree/ |
| D | cc_aead.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (C) 2012-2019 ARM Limited (or its affiliates). */
67 struct device *dev = drvdata_to_dev(ctx->drvdata); in cc_aead_exit()
70 crypto_tfm_alg_name(&tfm->base)); in cc_aead_exit()
73 if (ctx->enckey) { in cc_aead_exit()
74 dma_free_coherent(dev, AES_MAX_KEY_SIZE, ctx->enckey, in cc_aead_exit()
75 ctx->enckey_dma_addr); in cc_aead_exit()
77 &ctx->enckey_dma_addr); in cc_aead_exit()
78 ctx->enckey_dma_addr = 0; in cc_aead_exit()
79 ctx->enckey = NULL; in cc_aead_exit()
[all …]
|
| /kernel/linux/linux-6.6/drivers/crypto/ccree/ |
| D | cc_aead.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (C) 2012-2019 ARM Limited (or its affiliates). */
67 struct device *dev = drvdata_to_dev(ctx->drvdata); in cc_aead_exit()
70 crypto_tfm_alg_name(&tfm->base)); in cc_aead_exit()
73 if (ctx->enckey) { in cc_aead_exit()
74 dma_free_coherent(dev, AES_MAX_KEY_SIZE, ctx->enckey, in cc_aead_exit()
75 ctx->enckey_dma_addr); in cc_aead_exit()
77 &ctx->enckey_dma_addr); in cc_aead_exit()
78 ctx->enckey_dma_addr = 0; in cc_aead_exit()
79 ctx->enckey = NULL; in cc_aead_exit()
[all …]
|
| /kernel/linux/linux-6.6/drivers/input/misc/ |
| D | iqs626a.c | 1 // SPDX-License-Identifier: GPL-2.0+
8 * inductive keys as well as Hall-effect switches, and one for a trackpad that
227 .name = "event-prox",
233 .name = "event-prox-alt",
240 .name = "event-touch",
246 .name = "event-touch-alt",
253 .name = "event-deep",
259 .name = "event-deep-alt",
367 .name = "ulp-0",
378 .name = "trackpad-3x2",
[all …]
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| D | iqs269a.c | 1 // SPDX-License-Identifier: GPL-2.0+
8 * inductive keys as well as Hall-effect switches, and one for each of the two
193 .name = "event-prox",
199 .name = "event-prox-alt",
206 .name = "event-touch",
212 .name = "event-touch-alt",
219 .name = "event-deep",
225 .name = "event-deep-alt",
301 struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg; in iqs269_ati_mode_set()
305 return -EINVAL; in iqs269_ati_mode_set()
[all …]
|
| /kernel/linux/linux-5.10/drivers/crypto/bcm/ |
| D | cipher.c | 1 // SPDX-License-Identifier: GPL-2.0-only
81 /* A type 3 BCM header, expected to precede the SPU header for SPU-M.
83 * 0x60 - ring 0
84 * 0x68 - ring 1
85 * 0x70 - ring 2
86 * 0x78 - ring 3
100 * select_channel() - Select a SPU channel to handle a crypto request. Selects
113 * spu_skcipher_rx_sg_create() - Build up the scatterlist of buffers used to
122 * a 4-byte boundary
140 struct iproc_ctx_s *ctx = rctx->ctx; in spu_skcipher_rx_sg_create()
[all …]
|
| /kernel/linux/linux-6.6/drivers/crypto/bcm/ |
| D | cipher.c | 1 // SPDX-License-Identifier: GPL-2.0-only
81 /* A type 3 BCM header, expected to precede the SPU header for SPU-M.
83 * 0x60 - ring 0
84 * 0x68 - ring 1
85 * 0x70 - ring 2
86 * 0x78 - ring 3
100 * select_channel() - Select a SPU channel to handle a crypto request. Selects
113 * spu_skcipher_rx_sg_create() - Build up the scatterlist of buffers used to
122 * a 4-byte boundary
140 struct iproc_ctx_s *ctx = rctx->ctx; in spu_skcipher_rx_sg_create()
[all …]
|
| /kernel/linux/linux-5.10/net/wireless/ |
| D | sme.c | 1 // SPDX-License-Identifier: GPL-2.0
23 #include "rdev-ops.h"
26 * Software SME in cfg80211, using auth/assoc/deauth calls to the
33 /* these are sub-states of the _CONNECTING sme_state */
56 if (!wdev->conn) in cfg80211_sme_free()
59 kfree(wdev->conn->ie); in cfg80211_sme_free()
60 kfree(wdev->conn); in cfg80211_sme_free()
61 wdev->conn = NULL; in cfg80211_sme_free()
66 struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); in cfg80211_conn_scan()
73 if (rdev->scan_req || rdev->scan_msg) in cfg80211_conn_scan()
[all …]
|
| /kernel/linux/linux-5.10/drivers/input/misc/ |
| D | iqs269a.c | 1 // SPDX-License-Identifier: GPL-2.0+
8 * inductive keys as well as Hall-effect switches, and one for each of the two
193 .name = "event-prox",
199 .name = "event-prox-alt",
206 .name = "event-touch",
212 .name = "event-touch-alt",
219 .name = "event-deep",
225 .name = "event-deep-alt",
301 struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg; in iqs269_ati_mode_set()
305 return -EINVAL; in iqs269_ati_mode_set()
[all …]
|
| /kernel/linux/linux-6.6/drivers/net/wireless/intel/ipw2x00/ |
| D | ipw2200.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
4 Copyright(c) 2003 - 2006 Intel Corporation. All rights reserved.
9 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 #include <linux/dma-mapping.h>
176 /* even if MAC WEP set (allows pre-encrypt) */
259 #define QOS_TX2_CW_MIN_OFDM cpu_to_le16((CW_MIN_OFDM + 1)/2 - 1)
260 #define QOS_TX3_CW_MIN_OFDM cpu_to_le16((CW_MIN_OFDM + 1)/4 - 1)
264 #define QOS_TX2_CW_MIN_CCK cpu_to_le16((CW_MIN_CCK + 1)/2 - 1)
265 #define QOS_TX3_CW_MIN_CCK cpu_to_le16((CW_MIN_CCK + 1)/4 - 1)
270 #define QOS_TX3_CW_MAX_OFDM cpu_to_le16((CW_MIN_OFDM + 1)/2 - 1)
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|