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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/dma/
Dqcom,bam-dma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/qcom,bam-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies Inc BAM DMA controller
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <andersson@kernel.org>
14 - $ref: dma-controller.yaml#
19 - enum:
21 - qcom,bam-v1.3.0
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/
Dqcom_bam_dma.txt1 QCOM BAM DMA controller
4 - compatible: must be one of the following:
5 * "qcom,bam-v1.4.0" for MSM8974, APQ8074 and APQ8084
6 * "qcom,bam-v1.3.0" for APQ8064, IPQ8064 and MSM8960
7 * "qcom,bam-v1.7.0" for MSM8916
8 - reg: Address range for DMA registers
9 - interrupts: Should contain the one interrupt shared by all channels
10 - #dma-cells: must be <1>, the cell in the dmas property of the client device
12 - clocks: required clock
13 - clock-names: must contain "bam_clk" entry
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/
Dqcom_nandc.txt4 - compatible: must be one of the following:
5 * "qcom,ipq806x-nand" - for EBI2 NAND controller being used in IPQ806x
7 * "qcom,ipq4019-nand" - for QPIC NAND controller v1.4.0 being used in
8 IPQ4019 SoC and it uses BAM DMA
9 * "qcom,ipq8074-nand" - for QPIC NAND controller v1.5.0 being used in
10 IPQ8074 SoC and it uses BAM DMA
12 - reg: MMIO address range
13 - clocks: must contain core clock and always on clock
14 - clock-names: must contain "core" for the core clock and "aon" for the
18 - dmas: DMA specifier, consisting of a phandle to the ADM DMA
[all …]
/kernel/linux/linux-6.6/drivers/dma/qcom/
Dbam_dma.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
6 * QCOM BAM DMA engine driver
8 * QCOM BAM DMA blocks are distributed amongst a number of the on-chip
32 #include <linux/dma-mapping.h>
46 #include "../virt-dma.h"
201 /* BAM CTRL */
212 /* BAM REVISION */
234 /* BAM NUM PIPES */
242 /* BAM CNFG BITS */
[all …]
/kernel/linux/linux-5.10/drivers/dma/qcom/
Dbam_dma.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
6 * QCOM BAM DMA engine driver
8 * QCOM BAM DMA blocks are distributed amongst a number of the on-chip
32 #include <linux/dma-mapping.h>
46 #include "../virt-dma.h"
201 /* BAM CTRL */
212 /* BAM REVISION */
234 /* BAM NUM PIPES */
242 /* BAM CNFG BITS */
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dqcom-ipq4019.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
18 interrupt-parent = <&intc>;
20 reserved-memory {
21 #address-cells = <0x1>;
[all …]
Dqcom-mdm9615.dtsi7 * This file is dual-licensed: you can use it either under the terms
46 /dts-v1/;
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include <dt-bindings/clock/qcom,gcc-mdm9615.h>
50 #include <dt-bindings/reset/qcom,gcc-mdm9615.h>
51 #include <dt-bindings/mfd/qcom-rpm.h>
52 #include <dt-bindings/soc/qcom,gsbi.h>
55 #address-cells = <1>;
56 #size-cells = <1>;
59 interrupt-parent = <&intc>;
[all …]
Dqcom-ipq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
6 #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/reset/qcom,gcc-ipq806x.h>
9 #include <dt-bindings/soc/qcom,gsbi.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #address-cells = <1>;
[all …]
Dqcom-apq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
5 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
6 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
7 #include <dt-bindings/clock/qcom,rpmcc.h>
8 #include <dt-bindings/soc/qcom,gsbi.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #address-cells = <1>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/qcom/
Dqcom-mdm9615.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/clock/qcom,gcc-mdm9615.h>
13 #include <dt-bindings/clock/qcom,lcc-msm8960.h>
14 #include <dt-bindings/reset/qcom,gcc-mdm9615.h>
15 #include <dt-bindings/mfd/qcom-rpm.h>
16 #include <dt-bindings/soc/qcom,gsbi.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
[all …]
Dqcom-ipq4019.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
18 interrupt-parent = <&intc>;
20 reserved-memory {
21 #address-cells = <0x1>;
[all …]
Dqcom-apq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
5 #include <dt-bindings/clock/qcom,lcc-msm8960.h>
6 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/soc/qcom,gsbi.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
[all …]
Dqcom-ipq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mfd/qcom-rpm.h>
6 #include <dt-bindings/clock/qcom,rpmcc.h>
7 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
8 #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq806x.h>
11 #include <dt-bindings/soc/qcom,gsbi.h>
[all …]
Dqcom-msm8974.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interconnect/qcom,msm8974.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dipq9574.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
9 #include <dt-bindings/clock/qcom,apss-ipq.h>
10 #include <dt-bindings/clock/qcom,ipq9574-gcc.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/reset/qcom,ipq9574-gcc.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&intc>;
17 #address-cells = <2>;
18 #size-cells = <2>;
[all …]
Dipq6018.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,gcc-ipq6018.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq6018.h>
11 #include <dt-bindings/clock/qcom,apss-ipq.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&intc>;
19 sleep_clk: sleep-clk {
20 compatible = "fixed-clock";
[all …]
Dipq8074.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-ipq8074.h>
10 #address-cells = <2>;
11 #size-cells = <2>;
15 interrupt-parent = <&intc>;
19 compatible = "fixed-clock";
20 clock-frequency = <32768>;
21 #clock-cells = <0>;
25 compatible = "fixed-clock";
[all …]
Dsda660-inforce-ifc6560.dts1 // SPDX-License-Identifier: BSD-3-Clause
9 /dts-v1/;
18 chassis-type = "embedded"; /* SBC */
26 stdout-path = "serial0:115200n8";
29 gpio-keys {
30 compatible = "gpio-keys";
32 key-volup {
36 debounce-interval = <15>;
41 * Until we hook up type-c detection, we
44 extcon_usb: extcon-usb {
[all …]
Dipq5332.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
8 #include <dt-bindings/clock/qcom,apss-ipq.h>
9 #include <dt-bindings/clock/qcom,ipq5332-gcc.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 interrupt-parent = <&intc>;
14 #address-cells = <2>;
15 #size-cells = <2>;
18 sleep_clk: sleep-clk {
19 compatible = "fixed-clock";
[all …]
/kernel/linux/linux-6.6/drivers/i2c/busses/
Di2c-qup.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2009-2013, 2016-2018, The Linux Foundation. All rights reserved.
14 #include <linux/dma-mapping.h>
185 * is_tx_blk_mode: whether tx uses block or FIFO mode in case of non BAM xfer.
186 * is_rx_blk_mode: whether rx uses block or FIFO mode in case of non BAM xfer.
291 struct qup_i2c_block *blk = &qup->blk; in qup_i2c_interrupt()
296 bus_err = readl(qup->base + QUP_I2C_STATUS); in qup_i2c_interrupt()
297 qup_err = readl(qup->base + QUP_ERROR_FLAGS); in qup_i2c_interrupt()
298 opflags = readl(qup->base + QUP_OPERATIONAL); in qup_i2c_interrupt()
300 if (!qup->msg) { in qup_i2c_interrupt()
[all …]
/kernel/linux/linux-5.10/drivers/i2c/busses/
Di2c-qup.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2009-2013, 2016-2018, The Linux Foundation. All rights reserved.
14 #include <linux/dma-mapping.h>
182 * is_tx_blk_mode: whether tx uses block or FIFO mode in case of non BAM xfer.
183 * is_rx_blk_mode: whether rx uses block or FIFO mode in case of non BAM xfer.
283 struct qup_i2c_block *blk = &qup->blk; in qup_i2c_interrupt()
288 bus_err = readl(qup->base + QUP_I2C_STATUS); in qup_i2c_interrupt()
289 qup_err = readl(qup->base + QUP_ERROR_FLAGS); in qup_i2c_interrupt()
290 opflags = readl(qup->base + QUP_OPERATIONAL); in qup_i2c_interrupt()
292 if (!qup->msg) { in qup_i2c_interrupt()
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/
Dipq6018.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,gcc-ipq6018.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq6018.h>
11 #include <dt-bindings/clock/qcom,apss-ipq.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&intc>;
19 sleep_clk: sleep-clk {
20 compatible = "fixed-clock";
[all …]
Dipq8074.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-ipq8074.h>
15 compatible = "fixed-clock";
16 clock-frequency = <32768>;
17 #clock-cells = <0>;
21 compatible = "fixed-clock";
22 clock-frequency = <19200000>;
23 #clock-cells = <0>;
28 #address-cells = <0x1>;
[all …]
Dmsm8994.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8994.h>
9 interrupt-parent = <&intc>;
11 #address-cells = <2>;
12 #size-cells = <2>;
17 xo_board: xo-board {
18 compatible = "fixed-clock";
19 #clock-cells = <0>;
[all …]
/kernel/linux/linux-6.6/drivers/mtd/nand/raw/
Dqcom_nandc.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
207 #define dev_cmd_reg_addr(nandc, reg) ((nandc)->props->dev_cmd_reg_start + (reg))
210 #define nandc_reg_phys(chip, offset) ((chip)->base_phys + (offset))
214 ((chip)->reg_read_dma + \
215 ((u8 *)(vaddr) - (u8 *)(chip)->reg_read_buf))
227 /* Don't set the EOT in current tx BAM sgl */
229 /* Set the NWD flag in current BAM sgl */
231 /* Finish writing in the current BAM sgl and start writing in another BAM sgl */
242 * This data type corresponds to the BAM transaction which will be used for all
[all …]

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