| /kernel/linux/linux-6.6/Documentation/arch/sh/ |
| D | register-banks.rst | 11 bank (selected by SR.RB, only r0 ... r7 are banked), whereas other families
17 In the case of this type of banking, banked registers are mapped directly to
19 can still be used to reference the banked registers (as r0_bank ... r7_bank)
21 in mind when writing code that utilizes these banked registers, for obvious
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| /kernel/linux/linux-5.10/Documentation/sh/ |
| D | register-banks.rst | 11 bank (selected by SR.RB, only r0 ... r7 are banked), whereas other families
17 In the case of this type of banking, banked registers are mapped directly to
19 can still be used to reference the banked registers (as r0_bank ... r7_bank)
21 in mind when writing code that utilizes these banked registers, for obvious
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| /kernel/linux/linux-6.6/tools/arch/arm/include/uapi/asm/ |
| D | kvm.h | 156 * registers that are banked by security. This is 1 for the secure banked
157 * register, and 0 for the nonsecure banked register or if the register is
158 * not banked by security.
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| /kernel/linux/linux-5.10/tools/arch/arm/include/uapi/asm/ |
| D | kvm.h | 156 * registers that are banked by security. This is 1 for the secure banked
157 * register, and 0 for the nonsecure banked register or if the register is
158 * not banked by security.
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| /kernel/linux/linux-5.10/drivers/clocksource/ |
| D | arm_global_timer.c | 30 #define GT_CONTROL_TIMER_ENABLE BIT(0) /* this bit is NOT banked */
31 #define GT_CONTROL_COMP_ENABLE BIT(1) /* banked */
32 #define GT_CONTROL_IRQ_ENABLE BIT(2) /* banked */
33 #define GT_CONTROL_AUTO_INC BIT(3) /* banked */
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| /kernel/linux/linux-5.10/drivers/i2c/ |
| D | i2c-stub.c | 45 /* Some chips have banked register ranges */
57 MODULE_PARM_DESC(bank_start, "First banked register");
61 MODULE_PARM_DESC(bank_end, "Last banked register");
215 * We ignore banks here, because banked chips don't use I2C in stub_xfer()
384 /* Allocate extra memory for banked register ranges */ in i2c_stub_init()
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| /kernel/linux/linux-6.6/drivers/i2c/ |
| D | i2c-stub.c | 44 /* Some chips have banked register ranges */
56 MODULE_PARM_DESC(bank_start, "First banked register");
60 MODULE_PARM_DESC(bank_end, "Last banked register");
214 * We ignore banks here, because banked chips don't use I2C in stub_xfer()
383 /* Allocate extra memory for banked register ranges */ in i2c_stub_init()
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| /kernel/linux/linux-6.6/drivers/clocksource/ |
| D | arm_global_timer.c | 30 #define GT_CONTROL_TIMER_ENABLE BIT(0) /* this bit is NOT banked */
31 #define GT_CONTROL_COMP_ENABLE BIT(1) /* banked */
32 #define GT_CONTROL_IRQ_ENABLE BIT(2) /* banked */
33 #define GT_CONTROL_AUTO_INC BIT(3) /* banked */
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| /kernel/linux/linux-5.10/arch/arm/mach-omap2/ |
| D | omap-headsmp.S | 111 * banked version is now composed of 2 bits:
114 * The Non-Secure banked register has not changed
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| D | omap-smp.c | 212 * banked version is now composed of 2 bits: in omap4_boot_secondary()
215 * The Non-Secure banked register has not changed in omap4_boot_secondary()
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| /kernel/linux/linux-6.6/arch/arm/mach-omap2/ |
| D | omap-headsmp.S | 111 * banked version is now composed of 2 bits:
114 * The Non-Secure banked register has not changed
|
| D | omap-smp.c | 212 * banked version is now composed of 2 bits: in omap4_boot_secondary()
215 * The Non-Secure banked register has not changed in omap4_boot_secondary()
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| /kernel/linux/linux-5.10/drivers/clk/qcom/ |
| D | clk-rcg.h | 104 * @mn: mn counter (banked)
105 * @s: source selector (banked)
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/gpio/ |
| D | gpio-davinci.yaml | 47 The interrupts are specified as per the interrupt parent. Only banked
49 banked then provide list of interrupts corresponding to each bank, else
|
| /kernel/linux/linux-6.6/drivers/clk/qcom/ |
| D | clk-rcg.h | 105 * @mn: mn counter (banked)
106 * @s: source selector (banked)
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| /kernel/linux/linux-6.6/drivers/nvmem/ |
| D | imx-ocotp.c | 362 * In banked/i.MX7 mode the OTP register bank goes into waddr in imx_ocotp_write()
371 * Non-banked i.MX6 mode. in imx_ocotp_write()
402 * Note: on i.MX7 there are four data fields to write for banked write in imx_ocotp_write()
408 /* Banked/i.MX7 mode */ in imx_ocotp_write()
436 /* Non-banked i.MX6 mode */ in imx_ocotp_write()
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| /kernel/linux/linux-5.10/drivers/nvmem/ |
| D | imx-ocotp.c | 328 * In banked/i.MX7 mode the OTP register bank goes into waddr in imx_ocotp_write()
337 * Non-banked i.MX6 mode. in imx_ocotp_write()
368 * Note: on i.MX7 there are four data fields to write for banked write in imx_ocotp_write()
374 /* Banked/i.MX7 mode */ in imx_ocotp_write()
402 /* Non-banked i.MX6 mode */ in imx_ocotp_write()
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| /kernel/linux/linux-6.6/arch/sh/ |
| D | Kconfig.cpu | 86 accomplishing what is taken care of by the banked registers.
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| /kernel/linux/linux-5.10/arch/sh/ |
| D | Kconfig.cpu | 86 accomplishing what is taken care of by the banked registers.
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| /kernel/linux/linux-6.6/Documentation/i2c/ |
| D | i2c-stub.rst | 57 select the active bank, as well as the range of banked registers.
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| /kernel/linux/linux-5.10/Documentation/i2c/ |
| D | i2c-stub.rst | 57 select the active bank, as well as the range of banked registers.
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| /kernel/linux/linux-5.10/drivers/gpio/ |
| D | gpio-davinci.c | 222 * interrupts is equal to number of gpios else all are banked so in davinci_gpio_probe()
540 * banked IRQs. Having GPIOs in the first GPIO bank use direct in davinci_gpio_irq_setup()
541 * IRQs, while the others use banked IRQs, would need some setup in davinci_gpio_irq_setup()
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| /kernel/linux/linux-6.6/drivers/leds/ |
| D | leds-lp50xx.c | 282 * @num_of_banked_leds: holds the number of banked LEDs
417 dev_err(priv->dev, "Cannot setup banked LEDs\n"); in lp50xx_probe_leds()
479 * banked which also is presented as 3 LEDs. in lp50xx_probe_dt()
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| /kernel/linux/linux-6.6/Documentation/arch/arm/ |
| D | setup.rst | 23 the memory is banked, then this should contain the total number
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| /kernel/linux/linux-5.10/Documentation/arm/ |
| D | setup.rst | 23 the memory is banked, then this should contain the total number
|