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/kernel/linux/linux-5.10/tools/include/asm/
Dbarrier.h4 #include "../../arch/x86/include/asm/barrier.h"
6 #include "../../arch/arm/include/asm/barrier.h"
8 #include "../../arch/arm64/include/asm/barrier.h"
10 #include "../../arch/powerpc/include/asm/barrier.h"
12 #include "../../arch/s390/include/asm/barrier.h"
14 #include "../../arch/sh/include/asm/barrier.h"
16 #include "../../arch/sparc/include/asm/barrier.h"
18 #include "../../arch/tile/include/asm/barrier.h"
20 #include "../../arch/alpha/include/asm/barrier.h"
22 #include "../../arch/mips/include/asm/barrier.h"
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/kernel/linux/linux-5.10/include/linux/
Dspinlock_up.h9 #include <asm/barrier.h>
32 barrier(); in arch_spin_lock()
40 barrier(); in arch_spin_trylock()
47 barrier(); in arch_spin_unlock()
54 #define arch_read_lock(lock) do { barrier(); (void)(lock); } while (0)
55 #define arch_write_lock(lock) do { barrier(); (void)(lock); } while (0)
56 #define arch_read_trylock(lock) ({ barrier(); (void)(lock); 1; })
57 #define arch_write_trylock(lock) ({ barrier(); (void)(lock); 1; })
58 #define arch_read_unlock(lock) do { barrier(); (void)(lock); } while (0)
59 #define arch_write_unlock(lock) do { barrier(); (void)(lock); } while (0)
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Dpreempt.h172 barrier(); \
177 barrier(); \
188 barrier(); \
195 barrier(); \
209 barrier(); \
215 barrier(); \
225 barrier(); \
230 barrier(); \
242 #define preempt_disable() barrier()
243 #define sched_preempt_enable_no_resched() barrier()
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/kernel/linux/linux-6.6/tools/include/asm/
Dbarrier.h4 #include "../../arch/x86/include/asm/barrier.h"
6 #include "../../arch/arm/include/asm/barrier.h"
8 #include "../../arch/arm64/include/asm/barrier.h"
10 #include "../../arch/powerpc/include/asm/barrier.h"
12 #include "../../arch/s390/include/asm/barrier.h"
14 #include "../../arch/sh/include/asm/barrier.h"
16 #include "../../arch/sparc/include/asm/barrier.h"
18 #include "../../arch/tile/include/asm/barrier.h"
20 #include "../../arch/alpha/include/asm/barrier.h"
22 #include "../../arch/mips/include/asm/barrier.h"
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/kernel/linux/linux-6.6/include/linux/
Dspinlock_up.h9 #include <asm/barrier.h>
32 barrier(); in arch_spin_lock()
40 barrier(); in arch_spin_trylock()
47 barrier(); in arch_spin_unlock()
54 #define arch_read_lock(lock) do { barrier(); (void)(lock); } while (0)
55 #define arch_write_lock(lock) do { barrier(); (void)(lock); } while (0)
56 #define arch_read_trylock(lock) ({ barrier(); (void)(lock); 1; })
57 #define arch_write_trylock(lock) ({ barrier(); (void)(lock); 1; })
58 #define arch_read_unlock(lock) do { barrier(); (void)(lock); } while (0)
59 #define arch_write_unlock(lock) do { barrier(); (void)(lock); } while (0)
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/kernel/linux/linux-6.6/arch/arm64/include/asm/
Dirqflags.h9 #include <asm/barrier.h>
32 barrier(); in __daif_local_irq_enable()
34 barrier(); in __daif_local_irq_enable()
44 barrier(); in __pmr_local_irq_enable()
47 barrier(); in __pmr_local_irq_enable()
61 barrier(); in __daif_local_irq_disable()
63 barrier(); in __daif_local_irq_disable()
73 barrier(); in __pmr_local_irq_disable()
75 barrier(); in __pmr_local_irq_disable()
181 barrier(); in __daif_local_irq_restore()
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/kernel/linux/linux-6.6/Documentation/
Dmemory-barriers.txt29 particular barrier, and
34 for any particular barrier, but if the architecture provides less than
37 Note also that it is possible that a barrier may be a no-op for an
38 architecture because the way that arch works renders an explicit barrier
53 - Varieties of memory barrier.
57 - SMP barrier pairing.
58 - Examples of memory barrier sequences.
64 - Compiler barrier.
74 (*) Inter-CPU acquiring barrier effects.
85 (*) Kernel I/O barrier effects.
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/kernel/linux/linux-5.10/Documentation/
Dmemory-barriers.txt29 particular barrier, and
34 for any particular barrier, but if the architecture provides less than
37 Note also that it is possible that a barrier may be a no-op for an
38 architecture because the way that arch works renders an explicit barrier
53 - Varieties of memory barrier.
57 - SMP barrier pairing.
58 - Examples of memory barrier sequences.
64 - Compiler barrier.
74 (*) Inter-CPU acquiring barrier effects.
85 (*) Kernel I/O barrier effects.
[all …]
/kernel/linux/linux-6.6/arch/sparc/include/asm/
Dbarrier_64.h6 * #51. Essentially, if a memory barrier occurs soon after a mispredicted
10 * It used to be believed that the memory barrier had to be right in the
11 * delay slot, but a case has been traced recently wherein the memory barrier
23 * the memory barrier explicitly into a "branch always, predicted taken"
44 barrier(); \
52 barrier(); \
56 #define __smp_mb__before_atomic() barrier()
57 #define __smp_mb__after_atomic() barrier()
59 #include <asm-generic/barrier.h>
/kernel/linux/linux-5.10/arch/sparc/include/asm/
Dbarrier_64.h6 * #51. Essentially, if a memory barrier occurs soon after a mispredicted
10 * It used to be believed that the memory barrier had to be right in the
11 * delay slot, but a case has been traced recently wherein the memory barrier
23 * the memory barrier explicitly into a "branch always, predicted taken"
44 barrier(); \
52 barrier(); \
56 #define __smp_mb__before_atomic() barrier()
57 #define __smp_mb__after_atomic() barrier()
59 #include <asm-generic/barrier.h>
/kernel/linux/linux-5.10/arch/mips/include/asm/
Dsync.h11 * Two types of barrier are provided:
18 * restrictions imposed by the barrier.
31 * b) Multiple variants of ordering barrier are provided which allow the
34 * than a barrier are observed prior to stores that are younger than a
35 * barrier & don't care about the ordering of loads then the 'wmb'
36 * ordering barrier can be used. Limiting the barrier's effects to stores
49 * A full completion barrier; all memory accesses appearing prior to this sync
56 * For now we use a full completion barrier to implement all sync types, until
66 * barrier since 2010 & omit 'rmb' barriers because the CPUs don't perform
104 * don't implicitly provide a memory barrier. In general this is most MIPS
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/kernel/linux/linux-6.6/arch/mips/include/asm/
Dsync.h11 * Two types of barrier are provided:
18 * restrictions imposed by the barrier.
31 * b) Multiple variants of ordering barrier are provided which allow the
34 * than a barrier are observed prior to stores that are younger than a
35 * barrier & don't care about the ordering of loads then the 'wmb'
36 * ordering barrier can be used. Limiting the barrier's effects to stores
49 * A full completion barrier; all memory accesses appearing prior to this sync
56 * For now we use a full completion barrier to implement all sync types, until
66 * barrier since 2010 & omit 'rmb' barriers because the CPUs don't perform
104 * don't implicitly provide a memory barrier. In general this is most MIPS
[all …]
/kernel/linux/linux-5.10/arch/csky/include/asm/
Dbarrier.h12 * sync: completion barrier, all sync.xx instructions
19 * bar.brwarw: ordering barrier for all load/store instructions before it
20 * bar.brwarws: ordering barrier for all load/store instructions before it
22 * bar.brar: ordering barrier for all load instructions before it
23 * bar.brars: ordering barrier for all load instructions before it
25 * bar.bwaw: ordering barrier for all store instructions before it
26 * bar.bwaws: ordering barrier for all store instructions before it
45 #include <asm-generic/barrier.h>
/kernel/linux/linux-5.10/tools/virtio/ringtest/
Dmain.h90 /* Compiler barrier - similar to what Linux uses */
91 #define barrier() asm volatile("" ::: "memory") macro
97 #define cpu_relax() barrier()
110 barrier(); in busy_wait()
125 * adds a compiler barrier.
128 barrier(); \
134 barrier(); \
138 #define smp_wmb() barrier()
158 barrier(); \ in __read_once_size()
160 barrier(); \ in __read_once_size()
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/kernel/linux/linux-5.10/include/asm-generic/
Dbarrier.h3 * Generic barrier definitions.
31 #define mb() barrier()
79 #define smp_mb() barrier()
83 #define smp_rmb() barrier()
87 #define smp_wmb() barrier()
148 #define smp_store_mb(var, value) do { WRITE_ONCE(var, value); barrier(); } while (0)
152 #define smp_mb__before_atomic() barrier()
156 #define smp_mb__after_atomic() barrier()
163 barrier(); \
173 barrier(); \
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/kernel/linux/linux-6.6/tools/virtio/ringtest/
Dmain.h91 /* Compiler barrier - similar to what Linux uses */
92 #define barrier() asm volatile("" ::: "memory") macro
98 #define cpu_relax() barrier()
113 barrier(); in busy_wait()
130 * adds a compiler barrier.
133 barrier(); \
139 barrier(); \
143 #define smp_wmb() barrier()
163 barrier(); in __read_once_size()
165 barrier(); in __read_once_size()
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/kernel/linux/linux-6.6/kernel/sched/
Dmembarrier.c13 * barrier before sending the IPI
19 * The memory barrier at the start of membarrier() on CPU0 is necessary in
22 * CPU1 after the IPI-induced memory barrier:
33 * barrier()
40 * point after (b). If the memory barrier at (a) is omitted, then "x = 1"
45 * The timing of the memory barrier at (a) has to ensure that it executes
46 * before the IPI-induced memory barrier on CPU1.
49 * barrier after completing the IPI
55 * The memory barrier at the end of membarrier() on CPU0 is necessary in
63 * barrier()
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/kernel/linux/linux-6.6/arch/x86/include/asm/
Dbarrier.h51 /* Prevent speculative execution past this barrier. */
54 #define __dma_rmb() barrier()
55 #define __dma_wmb() barrier()
60 #define __smp_wmb() barrier()
66 barrier(); \
74 barrier(); \
82 /* Writing to CR3 provides a full memory barrier in switch_mm(). */
85 #include <asm-generic/barrier.h>
/kernel/linux/linux-6.6/arch/s390/include/asm/
Dbarrier.h30 #define __rmb() barrier()
31 #define __wmb() barrier()
41 barrier(); \
49 barrier(); \
53 #define __smp_mb__before_atomic() barrier()
54 #define __smp_mb__after_atomic() barrier()
80 #include <asm-generic/barrier.h>
/kernel/linux/linux-5.10/arch/s390/include/asm/
Dbarrier.h26 #define rmb() barrier()
27 #define wmb() barrier()
37 barrier(); \
45 barrier(); \
49 #define __smp_mb__before_atomic() barrier()
50 #define __smp_mb__after_atomic() barrier()
76 #include <asm-generic/barrier.h>
/kernel/linux/linux-5.10/arch/arc/include/asm/
Dbarrier.h15 * Explicit barrier provided by DMB instruction
19 * - DMB guarantees SMP as well as local barrier semantics
20 * (asm-generic/barrier.h ensures sane smp_*mb if not defined here, i.e.
21 * UP: barrier(), SMP: smp_*mb == *mb)
23 * in the general case. Plus it only provides full barrier.
42 #include <asm-generic/barrier.h>
/kernel/linux/linux-6.6/arch/arc/include/asm/
Dbarrier.h15 * Explicit barrier provided by DMB instruction
19 * - DMB guarantees SMP as well as local barrier semantics
20 * (asm-generic/barrier.h ensures sane smp_*mb if not defined here, i.e.
21 * UP: barrier(), SMP: smp_*mb == *mb)
23 * in the general case. Plus it only provides full barrier.
42 #include <asm-generic/barrier.h>
/kernel/linux/linux-6.6/arch/mips/mm/
Dtlb-r3k.c32 #define BARRIER \ macro
49 entry++; /* BARRIER */ in local_flush_tlb_from()
94 start += PAGE_SIZE; /* BARRIER */ in local_flush_tlb_range()
99 if (idx < 0) /* BARRIER */ in local_flush_tlb_range()
131 start += PAGE_SIZE; /* BARRIER */ in local_flush_tlb_kernel_range()
136 if (idx < 0) /* BARRIER */ in local_flush_tlb_kernel_range()
164 BARRIER; in local_flush_tlb_page()
169 if (idx < 0) /* BARRIER */ in local_flush_tlb_page()
203 BARRIER; in __update_tlb()
208 if (idx < 0) { /* BARRIER */ in __update_tlb()
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/kernel/linux/linux-6.6/tools/perf/tests/
Dsigtrap.c124 pthread_barrier_t *barrier = (pthread_barrier_t *)arg; in test_thread() local
128 pthread_barrier_wait(barrier); in test_thread()
137 static int run_test_threads(pthread_t *threads, pthread_barrier_t *barrier) in run_test_threads() argument
141 pthread_barrier_wait(barrier); in run_test_threads()
148 static int run_stress_test(int fd, pthread_t *threads, pthread_barrier_t *barrier) in run_stress_test() argument
156 ret = run_test_threads(threads, barrier); in run_stress_test()
178 pthread_barrier_t barrier; in test__sigtrap() local
187 pthread_barrier_init(&barrier, NULL, NUM_THREADS + 1); in test__sigtrap()
210 if (pthread_create(&threads[i], NULL, test_thread, &barrier)) { in test__sigtrap()
216 ret = run_stress_test(fd, threads, &barrier); in test__sigtrap()
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/kernel/linux/linux-5.10/arch/x86/include/asm/
Dbarrier.h51 /* Prevent speculative execution past this barrier. */
54 #define dma_rmb() barrier()
55 #define dma_wmb() barrier()
63 #define __smp_wmb() barrier()
69 barrier(); \
77 barrier(); \
85 #include <asm-generic/barrier.h>
97 * do not require this barrier. This is only required for the

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