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Searched +full:bcm3380 +full:- +full:l2 +full:- +full:intc (Results 1 – 8 of 8) sorted by relevance

/kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Dbrcm,bcm3380-l2-intc.txt1 Broadcom BCM3380-style Level 1 / Level 2 interrupt controller
6 - outputs a single interrupt signal to its interrupt controller parent
8 - contains one or more enable/status word pairs, which often appear at
11 - no atomic set/clear operations
15 - compatible: should be "brcm,bcm3380-l2-intc"
16 - reg: specifies one or more enable/status pairs, in the following format:
18 - interrupt-controller: identifies the node as an interrupt controller
19 - #interrupt-cells: specifies the number of cells needed to encode an interrupt
21 - interrupts: specifies the interrupt line in the interrupt-parent controller
26 - brcm,irq-can-wake: if present, this means the L2 controller can be used as a
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/interrupt-controller/
Dbrcm,bcm7120-l2-intc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm7120-l2-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom BCM7120-style Level 2 and Broadcom BCM3380 Level 1 / Level 2
10 - Florian Fainelli <f.fainelli@gmail.com>
14 is hooked to a parent interrupt controller: e.g: ARM GIC for ARM-based
19 - outputs multiple interrupts signals towards its interrupt controller parent
21 - controls how some of the interrupts will be flowing, whether they will
26 - has one 32-bit enable word and one 32-bit status word
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/kernel/linux/linux-6.6/arch/mips/boot/dts/brcm/
Dbcm3384_zephyr.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 mips-hpt-frequency = <100000000>;
35 #address-cells = <0>;
36 compatible = "mti,cpu-interrupt-controller";
38 interrupt-controller;
39 #interrupt-cells = <1>;
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Dbcm3384_viper.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
5 compatible = "brcm,bcm3384-viper", "brcm,bcm33843-viper";
16 #address-cells = <1>;
17 #size-cells = <0>;
20 mips-hpt-frequency = <300000000>;
30 #address-cells = <0>;
31 compatible = "mti,cpu-interrupt-controller";
33 interrupt-controller;
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/kernel/linux/linux-5.10/arch/mips/boot/dts/brcm/
Dbcm3384_zephyr.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 mips-hpt-frequency = <100000000>;
35 #address-cells = <0>;
36 compatible = "mti,cpu-interrupt-controller";
38 interrupt-controller;
39 #interrupt-cells = <1>;
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Dbcm3384_viper.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
5 compatible = "brcm,bcm3384-viper", "brcm,bcm33843-viper";
16 #address-cells = <1>;
17 #size-cells = <0>;
20 mips-hpt-frequency = <300000000>;
30 #address-cells = <0>;
31 compatible = "mti,cpu-interrupt-controller";
33 interrupt-controller;
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/kernel/linux/linux-6.6/drivers/irqchip/
Dirq-bcm7120-l2.c1 // SPDX-License-Identifier: GPL-2.0-only
28 /* Register offset in the L2 interrupt controller */
58 struct bcm7120_l2_intc_data *b = data->b; in bcm7120_l2_intc_irq_handle()
64 for (idx = 0; idx < b->n_words; idx++) { in bcm7120_l2_intc_irq_handle()
67 irq_get_domain_generic_chip(b->domain, base); in bcm7120_l2_intc_irq_handle()
72 pending = irq_reg_readl(gc, b->stat_offset[idx]) & in bcm7120_l2_intc_irq_handle()
73 gc->mask_cache & in bcm7120_l2_intc_irq_handle()
74 data->irq_map_mask[idx]; in bcm7120_l2_intc_irq_handle()
78 generic_handle_domain_irq(b->domain, base + hwirq); in bcm7120_l2_intc_irq_handle()
86 struct bcm7120_l2_intc_data *b = gc->private; in bcm7120_l2_intc_suspend()
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/kernel/linux/linux-5.10/drivers/irqchip/
Dirq-bcm7120-l2.c1 // SPDX-License-Identifier: GPL-2.0-only
28 /* Register offset in the L2 interrupt controller */
58 struct bcm7120_l2_intc_data *b = data->b; in bcm7120_l2_intc_irq_handle()
64 for (idx = 0; idx < b->n_words; idx++) { in bcm7120_l2_intc_irq_handle()
67 irq_get_domain_generic_chip(b->domain, base); in bcm7120_l2_intc_irq_handle()
72 pending = irq_reg_readl(gc, b->stat_offset[idx]) & in bcm7120_l2_intc_irq_handle()
73 gc->mask_cache & in bcm7120_l2_intc_irq_handle()
74 data->irq_map_mask[idx]; in bcm7120_l2_intc_irq_handle()
78 generic_handle_irq(irq_find_mapping(b->domain, in bcm7120_l2_intc_irq_handle()
88 struct bcm7120_l2_intc_data *b = gc->private; in bcm7120_l2_intc_suspend()
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