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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/reset/
Dbitmain,bm1880-reset.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/reset/bitmain,bm1880-reset.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Bitmain BM1880 SoC Reset Controller
11 - Manivannan Sadhasivam <mani@kernel.org>
15 const: bitmain,bm1880-reset
20 "#reset-cells":
24 - compatible
25 - reg
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/reset/
Dbitmain,bm1880-reset.txt1 Bitmain BM1880 SoC Reset Controller
4 Please also refer to reset.txt in this directory for common reset
8 - compatible: Should be "bitmain,bm1880-reset"
9 - reg: Offset and length of reset controller space in SCTRL.
10 - #reset-cells: Must be 1.
14 rst: reset-controller@c00 {
15 compatible = "bitmain,bm1880-reset";
17 #reset-cells = <1>;
/kernel/linux/linux-5.10/arch/arm64/boot/dts/bitmain/
Dbm1880.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/clock/bm1880-clock.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/reset/bitmain,bm1880-reset.h>
12 compatible = "bitmain,bm1880";
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
18 #address-cells = <1>;
19 #size-cells = <0>;
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/bitmain/
Dbm1880.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/clock/bm1880-clock.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/reset/bitmain,bm1880-reset.h>
12 compatible = "bitmain,bm1880";
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
18 #address-cells = <1>;
19 #size-cells = <0>;
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/kernel/linux/linux-5.10/drivers/reset/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 bool "Reset Controller Support"
9 Generic Reset Controller support.
11 This framework is designed to abstract reset handling of devices
12 via GPIOs or SoC-internal reset controller modules.
19 tristate "Altera Arria10 System Resource Reset"
22 This option enables support for the external reset functions for
26 bool "AR71xx Reset Driver" if COMPILE_TEST
29 This enables the ATH79 reset controller driver that supports the
30 AR71xx SoC reset controller.
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Dreset-simple.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Simple Reset Controller Driver
7 * Based on Allwinner SoCs Reset Controller driver
11 * Maxime Ripard <maxime.ripard@free-electrons.com>
21 #include <linux/reset-controller.h>
22 #include <linux/reset/reset-simple.h>
41 spin_lock_irqsave(&data->lock, flags); in reset_simple_update()
43 reg = readl(data->membase + (bank * reg_width)); in reset_simple_update()
44 if (assert ^ data->active_low) in reset_simple_update()
48 writel(reg, data->membase + (bank * reg_width)); in reset_simple_update()
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/kernel/linux/linux-6.6/drivers/reset/
Dreset-simple.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Simple Reset Controller Driver
7 * Based on Allwinner SoCs Reset Controller driver
11 * Maxime Ripard <maxime.ripard@free-electrons.com>
20 #include <linux/reset-controller.h>
21 #include <linux/reset/reset-simple.h>
40 spin_lock_irqsave(&data->lock, flags); in reset_simple_update()
42 reg = readl(data->membase + (bank * reg_width)); in reset_simple_update()
43 if (assert ^ data->active_low) in reset_simple_update()
47 writel(reg, data->membase + (bank * reg_width)); in reset_simple_update()
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 bool "Reset Controller Support"
9 Generic Reset Controller support.
11 This framework is designed to abstract reset handling of devices
12 via GPIOs or SoC-internal reset controller modules.
19 tristate "Altera Arria10 System Resource Reset"
22 This option enables support for the external reset functions for
26 bool "AR71xx Reset Driver" if COMPILE_TEST
29 This enables the ATH79 reset controller driver that supports the
30 AR71xx SoC reset controller.
[all …]
/kernel/linux/linux-5.10/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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/kernel/linux/linux-6.6/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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