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/kernel/linux/linux-6.6/arch/arm/boot/dts/broadcom/
Dbcm7445.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #address-cells = <2>;
6 #size-cells = <2>;
8 compatible = "brcm,bcm7445", "brcm,brcmstb";
9 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <0>;
20 compatible = "brcm,brahma-b15";
22 enable-method = "brcm,brahma-b15";
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dbcm7445.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #address-cells = <2>;
6 #size-cells = <2>;
8 compatible = "brcm,bcm7445", "brcm,brcmstb";
9 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <0>;
20 compatible = "brcm,brahma-b15";
22 enable-method = "brcm,brahma-b15";
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/gpio/
Dbrcm,brcmstb-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/brcm,brcmstb-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom STB "UPG GIO" GPIO controller
10 The controller's registers are organized as sets of eight 32-bit
15 - Doug Berger <opendmb@gmail.com>
16 - Florian Fainelli <f.fainelli@gmail.com>
21 - enum:
22 - brcm,bcm7445-gpio
[all …]
/kernel/linux/linux-6.6/arch/mips/boot/dts/brcm/
Dbcm7360.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
[all …]
Dbcm7362.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
Dbcm7435.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <175625000>;
42 cpu_intc: interrupt-controller {
43 #address-cells = <0>;
44 compatible = "mti,cpu-interrupt-controller";
46 interrupt-controller;
[all …]
Dbcm7425.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
Dbcm7346.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
Dbcm7358.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
[all …]
Dbcm7125.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <202500000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
Dbcm7420.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <93750000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
/kernel/linux/linux-5.10/arch/mips/boot/dts/brcm/
Dbcm7360.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
[all …]
Dbcm7425.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
Dbcm7435.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <175625000>;
42 cpu_intc: interrupt-controller {
43 #address-cells = <0>;
44 compatible = "mti,cpu-interrupt-controller";
46 interrupt-controller;
[all …]
Dbcm7362.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
Dbcm7346.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
Dbcm7358.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
[all …]
Dbcm7125.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <202500000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
Dbcm7420.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <93750000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpio/
Dbrcm,brcmstb-gpio.txt1 Broadcom STB "UPG GIO" GPIO controller
3 The controller's registers are organized as sets of eight 32-bit
9 - compatible:
10 Must be "brcm,brcmstb-gpio"
12 - reg:
14 the brcmstb GPIO controller registers
16 - #gpio-cells:
19 bit[0]: polarity (0 for active-high, 1 for active-low)
21 - gpio-controller:
22 Specifies that the node is a GPIO controller.
[all …]
/kernel/linux/linux-6.6/drivers/gpio/
Dgpio-brcmstb.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (C) 2015-2017 Broadcom
5 #include <linux/gpio/driver.h>
59 #define GPIO_BANK(gpio) ((gpio) >> 5) argument
61 #define GPIO_BIT(gpio) ((gpio) & (MAX_GPIO_PER_BANK - 1)) argument
67 return bank->parent_priv; in brcmstb_gpio_gc_to_priv()
73 void __iomem *reg_base = bank->parent_priv->reg_base; in __brcmstb_gpio_get_active_irqs()
75 return bank->gc.read_reg(reg_base + GIO_STAT(bank->id)) & in __brcmstb_gpio_get_active_irqs()
76 bank->gc.read_reg(reg_base + GIO_MASK(bank->id)); in __brcmstb_gpio_get_active_irqs()
85 raw_spin_lock_irqsave(&bank->gc.bgpio_lock, flags); in brcmstb_gpio_get_active_irqs()
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 # generic gpio support: platform drivers, dedicated expander chips, etc
4 ccflags-$(CONFIG_DEBUG_GPIO) += -DDEBUG
6 obj-$(CONFIG_GPIOLIB) += gpiolib.o
7 obj-$(CONFIG_GPIOLIB) += gpiolib-devres.o
8 obj-$(CONFIG_GPIOLIB) += gpiolib-legacy.o
9 obj-$(CONFIG_OF_GPIO) += gpiolib-of.o
10 obj-$(CONFIG_GPIO_CDEV) += gpiolib-cdev.o
11 obj-$(CONFIG_GPIO_SYSFS) += gpiolib-sysfs.o
12 obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o
[all …]
/kernel/linux/linux-5.10/drivers/gpio/
Dgpio-brcmstb.c2 * Copyright (C) 2015-2017 Broadcom
15 #include <linux/gpio/driver.h>
69 #define GPIO_BANK(gpio) ((gpio) >> 5) argument
71 #define GPIO_BIT(gpio) ((gpio) & (MAX_GPIO_PER_BANK - 1)) argument
77 return bank->parent_priv; in brcmstb_gpio_gc_to_priv()
83 void __iomem *reg_base = bank->parent_priv->reg_base; in __brcmstb_gpio_get_active_irqs()
85 return bank->gc.read_reg(reg_base + GIO_STAT(bank->id)) & in __brcmstb_gpio_get_active_irqs()
86 bank->gc.read_reg(reg_base + GIO_MASK(bank->id)); in __brcmstb_gpio_get_active_irqs()
95 spin_lock_irqsave(&bank->gc.bgpio_lock, flags); in brcmstb_gpio_get_active_irqs()
97 spin_unlock_irqrestore(&bank->gc.bgpio_lock, flags); in brcmstb_gpio_get_active_irqs()
[all …]
/kernel/linux/linux-5.10/drivers/power/reset/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_POWER_RESET_AS3722) += as3722-poweroff.o
3 obj-$(CONFIG_POWER_RESET_AT91_POWEROFF) += at91-poweroff.o
4 obj-$(CONFIG_POWER_RESET_AT91_RESET) += at91-reset.o
5 obj-$(CONFIG_POWER_RESET_AT91_SAMA5D2_SHDWC) += at91-sama5d2_shdwc.o
6 obj-$(CONFIG_POWER_RESET_AXXIA) += axxia-reset.o
7 obj-$(CONFIG_POWER_RESET_BRCMKONA) += brcm-kona-reset.o
8 obj-$(CONFIG_POWER_RESET_BRCMSTB) += brcmstb-reboot.o
9 obj-$(CONFIG_POWER_RESET_GEMINI_POWEROFF) += gemini-poweroff.o
10 obj-$(CONFIG_POWER_RESET_GPIO) += gpio-poweroff.o
[all …]
/kernel/linux/linux-6.6/drivers/power/reset/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_POWER_RESET_AS3722) += as3722-poweroff.o
3 obj-$(CONFIG_POWER_RESET_AT91_POWEROFF) += at91-poweroff.o
4 obj-$(CONFIG_POWER_RESET_AT91_RESET) += at91-reset.o
5 obj-$(CONFIG_POWER_RESET_AT91_SAMA5D2_SHDWC) += at91-sama5d2_shdwc.o
6 obj-$(CONFIG_POWER_RESET_ATC260X) += atc260x-poweroff.o
7 obj-$(CONFIG_POWER_RESET_AXXIA) += axxia-reset.o
8 obj-$(CONFIG_POWER_RESET_BRCMKONA) += brcm-kona-reset.o
9 obj-$(CONFIG_POWER_RESET_BRCMSTB) += brcmstb-reboot.o
10 obj-$(CONFIG_POWER_RESET_GEMINI_POWEROFF) += gemini-poweroff.o
[all …]

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