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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/ata/
Dahci-ceva.txt4 - reg: Physical base address and size of the controller's register area.
5 - compatible: Compatibility string. Must be 'ceva,ahci-1v84'.
6 - clocks: Input clock specifier. Refer to common clock bindings.
7 - interrupts: Interrupt specifier. Refer to interrupt binding.
8 - ceva,p0-cominit-params: OOB timing value for COMINIT parameter for port 0.
9 - ceva,p1-cominit-params: OOB timing value for COMINIT parameter for port 1.
11 ceva,pN-cominit-params = /bits/ 8 <CIBGMN CIBGMX CIBGN CINMP>;
16 - ceva,p0-comwake-params: OOB timing value for COMWAKE parameter for port 0.
17 - ceva,p1-comwake-params: OOB timing value for COMWAKE parameter for port 1.
19 ceva,pN-comwake-params = /bits/ 8 <CWBGMN CWBGMX CWBGN CWNMP>;
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/ata/
Dceva,ahci-1v84.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/ceva,ahci-1v84.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Piyush Mehta <piyush.mehta@amd.com>
14 special extensions to add functionality, is a high-performance dual-port
21 const: ceva,ahci-1v84
29 dma-coherent: true
37 power-domains:
40 ceva,p0-cominit-params:
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/kernel/linux/linux-5.10/drivers/pci/controller/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
50 bool "Renesas R-Car Gen2 Internal PCI controller"
54 Say Y here if you want internal PCI support on R-Car Gen2 SoC.
56 built-in EHCI/OHCI host controller present on each one.
59 bool "Renesas R-Car PCIe controller"
64 Say Y here if you want PCIe controller support on R-Car SoCs.
68 bool "Renesas R-Car PCIe host controller"
73 Say Y here if you want PCIe controller support on R-Car SoCs in host
77 bool "Renesas R-Car PCIe endpoint controller"
81 Say Y here if you want PCIe controller support on R-Car SoCs in
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Dpcie-rcar-host.c1 // SPDX-License-Identifier: GPL-2.0
3 * PCIe driver for Renesas R-Car SoCs
4 * Copyright (C) 2014-2020 Renesas Electronics Europe Ltd
7 * arch/sh/drivers/pci/pcie-sh7786.c
8 * arch/sh/drivers/pci/ops-sh7786.c
9 * Copyright (C) 2009 - 2011 Paul Mundt
33 #include "pcie-rcar.h"
74 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_config_access()
83 * While each channel has its own memory-mapped extended config in rcar_pcie_config_access()
91 * the same channel <-> device access works for any PCI_SLOT() in rcar_pcie_config_access()
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/kernel/linux/linux-5.10/drivers/ata/
Dahci_ceva.c1 // SPDX-License-Identifier: GPL-2.0-only
72 #define DRV_NAME "ahci-ceva"
77 MODULE_PARM_DESC(rx_watermark, "RxWaterMark value (0 - 0x80)");
123 void __iomem *mmio = hpriv->mmio; in ahci_ceva_setup()
124 struct ceva_ahci_priv *cevapriv = hpriv->plat_data; in ahci_ceva_setup()
141 * Set Mem Addr Read ID, Write ID for non-data transfers in ahci_ceva_setup()
149 if (cevapriv->is_cci_enabled) { in ahci_ceva_setup()
163 writel(cevapriv->pp2c[i], mmio + AHCI_VEND_PP2C); in ahci_ceva_setup()
166 writel(cevapriv->pp3c[i], mmio + AHCI_VEND_PP3C); in ahci_ceva_setup()
169 writel(cevapriv->pp4c[i], mmio + AHCI_VEND_PP4C); in ahci_ceva_setup()
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Dahci_xgene.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * AppliedMicro X-Gene SoC SATA Host Controller Driver
22 #define DRV_NAME "xgene-ahci"
93 dev_dbg(ctx->dev, "Release memory from shutdown\n"); in xgene_ahci_init_memram()
94 writel(0x0, ctx->csr_diag + CFG_MEM_RAM_SHUTDOWN); in xgene_ahci_init_memram()
95 readl(ctx->csr_diag + CFG_MEM_RAM_SHUTDOWN); /* Force a barrier */ in xgene_ahci_init_memram()
97 if (readl(ctx->csr_diag + BLOCK_MEM_RDY) != 0xFFFFFFFF) { in xgene_ahci_init_memram()
98 dev_err(ctx->dev, "failed to release memory from shutdown\n"); in xgene_ahci_init_memram()
99 return -ENODEV; in xgene_ahci_init_memram()
105 * xgene_ahci_poll_reg_val- Poll a register on a specific value.
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/kernel/linux/linux-6.6/drivers/ata/
Dahci_ceva.c1 // SPDX-License-Identifier: GPL-2.0-only
73 #define DRV_NAME "ahci-ceva"
78 MODULE_PARM_DESC(rx_watermark, "RxWaterMark value (0 - 0x80)");
124 void __iomem *mmio = hpriv->mmio; in ahci_ceva_setup()
125 struct ceva_ahci_priv *cevapriv = hpriv->plat_data; in ahci_ceva_setup()
142 * Set Mem Addr Read ID, Write ID for non-data transfers in ahci_ceva_setup()
150 if (cevapriv->is_cci_enabled) { in ahci_ceva_setup()
164 writel(cevapriv->pp2c[i], mmio + AHCI_VEND_PP2C); in ahci_ceva_setup()
167 writel(cevapriv->pp3c[i], mmio + AHCI_VEND_PP3C); in ahci_ceva_setup()
170 writel(cevapriv->pp4c[i], mmio + AHCI_VEND_PP4C); in ahci_ceva_setup()
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Dahci_xgene.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * AppliedMicro X-Gene SoC SATA Host Controller Driver
22 #define DRV_NAME "xgene-ahci"
93 dev_dbg(ctx->dev, "Release memory from shutdown\n"); in xgene_ahci_init_memram()
94 writel(0x0, ctx->csr_diag + CFG_MEM_RAM_SHUTDOWN); in xgene_ahci_init_memram()
95 readl(ctx->csr_diag + CFG_MEM_RAM_SHUTDOWN); /* Force a barrier */ in xgene_ahci_init_memram()
97 if (readl(ctx->csr_diag + BLOCK_MEM_RDY) != 0xFFFFFFFF) { in xgene_ahci_init_memram()
98 dev_err(ctx->dev, "failed to release memory from shutdown\n"); in xgene_ahci_init_memram()
99 return -ENODEV; in xgene_ahci_init_memram()
105 * xgene_ahci_poll_reg_val- Poll a register on a specific value.
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/kernel/linux/linux-5.10/drivers/watchdog/
Drenesas_wdt.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-17 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
6 * Copyright (C) 2015-17 Renesas Electronics Corporation
36 DIV_ROUND_UP((d) * (p)->clk_rate, clk_divs[(p)->cks])
38 /* d is 16 bit, clk_divs 12 bit -> no 32 bit overflow */
39 #define DIV_BY_CLKS_PER_SEC(p, d) ((d) * clk_divs[(p)->cks] / (p)->clk_rate)
62 writel_relaxed(val, priv->base + reg); in rwdt_write()
69 rwdt_write(priv, 65536 - MUL_BY_CLKS_PER_SEC(priv, wdev->timeout), RWTCNT); in rwdt_init_timeout()
78 delay = DIV_ROUND_UP(cycles * 1000000, priv->clk_rate); in rwdt_wait_cycles()
88 pm_runtime_get_sync(wdev->parent); in rwdt_start()
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/kernel/linux/linux-6.6/drivers/watchdog/
Drenesas_wdt.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-17 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
6 * Copyright (C) 2015-17 Renesas Electronics Corporation
37 DIV_ROUND_UP((d) * (p)->clk_rate, clk_divs[(p)->cks])
39 /* d is 16 bit, clk_divs 12 bit -> no 32 bit overflow */
40 #define DIV_BY_CLKS_PER_SEC(p, d) ((d) * clk_divs[(p)->cks] / (p)->clk_rate)
64 writel_relaxed(val, priv->base + reg); in rwdt_write()
71 rwdt_write(priv, 65536 - MUL_BY_CLKS_PER_SEC(priv, wdev->timeout), RWTCNT); in rwdt_init_timeout()
80 delay = DIV_ROUND_UP(cycles * 1000000, priv->clk_rate); in rwdt_wait_cycles()
90 pm_runtime_get_sync(wdev->parent); in rwdt_start()
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/kernel/linux/linux-6.6/drivers/net/wireless/intel/iwlwifi/queue/
Dtx.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (C) 2020-2023 Intel Corporation
8 #include "iwl-debug.h"
9 #include "iwl-io.h"
15 #include "iwl-fh.h"
16 #include "iwl-scd.h"
20 * iwl_txq_update_byte_tbl - Set up entry in Tx byte-count array
26 int idx = iwl_txq_get_cmd_index(txq, txq->write_ptr); in iwl_pcie_gen2_update_byte_tbl()
31 if (WARN(idx >= txq->n_window, "%d >= %d\n", idx, txq->n_window)) in iwl_pcie_gen2_update_byte_tbl()
39 * to SRAM- 0 for one chunk, 1 for 2 and so on. in iwl_pcie_gen2_update_byte_tbl()
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/kernel/linux/linux-5.10/drivers/usb/host/
Dxhci-plat.c1 // SPDX-License-Identifier: GPL-2.0
3 * xhci-plat.c - xHCI host controller driver platform Bus Glue.
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com
12 #include <linux/dma-mapping.h>
24 #include "xhci-plat.h"
25 #include "xhci-mvebu.h"
26 #include "xhci-rcar.h"
43 if (priv->plat_start) in xhci_priv_plat_start()
44 priv->plat_start(hcd); in xhci_priv_plat_start()
51 if (!priv->plat_setup) in xhci_priv_plat_setup()
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/kernel/linux/linux-6.6/drivers/thermal/
Drcar_thermal.c1 // SPDX-License-Identifier: GPL-2.0
3 * R-Car THS/TSC thermal sensor driver
101 list_for_each_entry(pos, &common->head, list)
104 #define rcar_priv_to_dev(priv) ((priv)->common->dev)
105 #define rcar_has_irq_support(priv) ((priv)->common->base)
106 #define rcar_id_to_shift(priv) ((priv)->id * 8)
110 .compatible = "renesas,rcar-thermal",
114 .compatible = "renesas,rcar-gen2-thermal",
118 .compatible = "renesas,thermal-r8a774c0",
122 .compatible = "renesas,thermal-r8a77970",
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/kernel/linux/linux-5.10/drivers/thermal/
Drcar_thermal.c1 // SPDX-License-Identifier: GPL-2.0
3 * R-Car THS/TSC thermal sensor driver
101 list_for_each_entry(pos, &common->head, list)
104 #define rcar_zone_to_priv(zone) ((zone)->devdata)
105 #define rcar_priv_to_dev(priv) ((priv)->common->dev)
106 #define rcar_has_irq_support(priv) ((priv)->common->base)
107 #define rcar_id_to_shift(priv) ((priv)->id * 8)
111 .compatible = "renesas,rcar-thermal",
115 .compatible = "renesas,rcar-gen2-thermal",
119 .compatible = "renesas,thermal-r8a774c0",
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/kernel/linux/linux-6.6/drivers/pci/controller/
Dpcie-rcar-host.c1 // SPDX-License-Identifier: GPL-2.0
3 * PCIe driver for Renesas R-Car SoCs
4 * Copyright (C) 2014-2020 Renesas Electronics Europe Ltd
7 * arch/sh/drivers/pci/pcie-sh7786.c
8 * arch/sh/drivers/pci/ops-sh7786.c
9 * Copyright (C) 2009 - 2011 Paul Mundt
16 #include <linux/clk-provider.h>
33 #include "pcie-rcar.h"
64 ret = -EINVAL; in rcar_pcie_wakeup()
108 " .arch armv7-a\n" \
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/kernel/linux/linux-5.10/drivers/media/platform/rcar-vin/
Drcar-dma.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for Renesas R-Car VIN
6 * Copyright (C) 2011-2013 Renesas Solutions Corp.
10 * Based on the soc-camera rcar_vin driver
17 #include <media/videobuf2-dma-contig.h>
19 #include "rcar-vin.h"
21 /* -----------------------------------------------------------------------------
25 /* Register offsets for R-Car VIN */
29 #define VNSLPRC_REG 0x0C /* Video n Start Line Pre-Clip Register */
30 #define VNELPRC_REG 0x10 /* Video n End Line Pre-Clip Register */
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/kernel/linux/linux-5.10/drivers/net/wireless/intel/iwlwifi/queue/
Dtx.c54 #include "iwl-debug.h"
55 #include "iwl-io.h"
58 #include "iwl-fh.h"
59 #include "iwl-scd.h"
63 * iwl_txq_gen2_tx_stop - Stop all Tx DMA channels
72 * Since we stop Tx altogether - mark the queues as stopped. in iwl_txq_gen2_tx_stop()
74 memset(trans->txqs.queue_stopped, 0, in iwl_txq_gen2_tx_stop()
75 sizeof(trans->txqs.queue_stopped)); in iwl_txq_gen2_tx_stop()
76 memset(trans->txqs.queue_used, 0, sizeof(trans->txqs.queue_used)); in iwl_txq_gen2_tx_stop()
79 for (txq_id = 0; txq_id < ARRAY_SIZE(trans->txqs.txq); txq_id++) { in iwl_txq_gen2_tx_stop()
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/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/icelakex/
Duncore-io.json94 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-7",
100 "PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 0-7",
193 "BriefDescription": "PCIe Completion Buffer Occupancy of completions with data : Part 0-7",
198 "PublicDescription": "PCIe Completion Buffer Occupancy : Part 0-7",
203 "BriefDescription": "PCIe Completion Buffer Occupancy of completions with data : Part 0-7",
208 "PublicDescription": "PCIe Completion Buffer Occupancy : Part 0-7",
299 …e. Includes all requests initiated by the main die, including reads and writes. : IOMMU - Type 0",
310 …e. Includes all requests initiated by the main die, including reads and writes. : IOMMU - Type 1",
409 …e. Includes all requests initiated by the main die, including reads and writes. : IOMMU - Type 0",
420 …e. Includes all requests initiated by the main die, including reads and writes. : IOMMU - Type 1",
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/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/snowridgex/
Duncore-io.json123 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-7",
129 "PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 0-7",
222 "BriefDescription": "PCIe Completion Buffer Occupancy of completions with data : Part 0-7",
227 "PublicDescription": "PCIe Completion Buffer Occupancy : Part 0-7",
232 "BriefDescription": "PCIe Completion Buffer Occupancy of completions with data : Part 0-7",
237 "PublicDescription": "PCIe Completion Buffer Occupancy : Part 0-7",
328 …e. Includes all requests initiated by the main die, including reads and writes. : IOMMU - Type 0",
339 …e. Includes all requests initiated by the main die, including reads and writes. : IOMMU - Type 1",
438 …e. Includes all requests initiated by the main die, including reads and writes. : IOMMU - Type 0",
449 …e. Includes all requests initiated by the main die, including reads and writes. : IOMMU - Type 1",
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Damdgpu_drv.c50 * - 3.0.0 - initial driver
51 * - 3.1.0 - allow reading more status registers (GRBM, SRBM, SDMA, CP)
52 * - 3.2.0 - GFX8: Uses EOP_TC_WB_ACTION_EN, so UMDs don't have to do the same
54 * - 3.3.0 - Add VM support for UVD on supported hardware.
55 * - 3.4.0 - Add AMDGPU_INFO_NUM_EVICTIONS.
56 * - 3.5.0 - Add support for new UVD_NO_OP register.
57 * - 3.6.0 - kmd involves use CONTEXT_CONTROL in ring buffer.
58 * - 3.7.0 - Add support for VCE clock list packet
59 * - 3.8.0 - Add support raster config init in the kernel
60 * - 3.9.0 - Add support for memory query info about VRAM and GTT.
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/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
Di915_drv.c1 /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
94 int domain = pci_domain_nr(dev_priv->drm.pdev->bus); in i915_get_bridge_dev()
96 dev_priv->bridge_dev = in i915_get_bridge_dev()
98 if (!dev_priv->bridge_dev) { in i915_get_bridge_dev()
99 drm_err(&dev_priv->drm, "bridge device not found\n"); in i915_get_bridge_dev()
100 return -1; in i915_get_bridge_dev()
115 pci_read_config_dword(dev_priv->bridge_dev, reg + 4, &temp_hi); in intel_alloc_mchbar_resource()
116 pci_read_config_dword(dev_priv->bridge_dev, reg, &temp_lo); in intel_alloc_mchbar_resource()
127 dev_priv->mch_res.name = "i915 MCHBAR"; in intel_alloc_mchbar_resource()
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/kernel/linux/linux-6.6/drivers/gpu/drm/i915/
Di915_driver.c1 /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
117 * need high-priority retirement, such as waiting for an explicit in i915_workqueues_init()
120 * It is also used for periodic low-priority events, such as in i915_workqueues_init()
121 * idle-timers and recording error state. in i915_workqueues_init()
127 dev_priv->wq = alloc_ordered_workqueue("i915", 0); in i915_workqueues_init()
128 if (dev_priv->wq == NULL) in i915_workqueues_init()
131 dev_priv->display.hotplug.dp_wq = alloc_ordered_workqueue("i915-dp", 0); in i915_workqueues_init()
132 if (dev_priv->display.hotplug.dp_wq == NULL) in i915_workqueues_init()
141 dev_priv->unordered_wq = alloc_workqueue("i915-unordered", 0, 0); in i915_workqueues_init()
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/kernel/linux/linux-6.6/drivers/media/platform/renesas/rcar-vin/
Drcar-dma.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for Renesas R-Car VIN
6 * Copyright (C) 2011-2013 Renesas Solutions Corp.
10 * Based on the soc-camera rcar_vin driver
17 #include <media/videobuf2-dma-contig.h>
19 #include "rcar-vin.h"
21 /* -----------------------------------------------------------------------------
25 /* Register offsets for R-Car VIN */
29 #define VNSLPRC_REG 0x0C /* Video n Start Line Pre-Clip Register */
30 #define VNELPRC_REG 0x10 /* Video n End Line Pre-Clip Register */
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
Dintel_display.c2 * Copyright © 2006-2007 Intel Corporation
29 #include <linux/intel-iommu.h>
32 #include <linux/dma-resv.h>
208 drm_WARN(&dev_priv->drm, (val & CCK_FREQUENCY_STATUS) != in vlv_get_cck_clock()
222 if (dev_priv->hpll_freq == 0) in vlv_get_cck_clock_hpll()
223 dev_priv->hpll_freq = vlv_get_hpll_vco(dev_priv); in vlv_get_cck_clock_hpll()
225 hpll = vlv_get_cck_clock(dev_priv, name, reg, dev_priv->hpll_freq); in vlv_get_cck_clock_hpll()
237 dev_priv->czclk_freq = vlv_get_cck_clock_hpll(dev_priv, "czclk", in intel_update_czclk()
240 drm_dbg(&dev_priv->drm, "CZ clock rate: %d kHz\n", in intel_update_czclk()
241 dev_priv->czclk_freq); in intel_update_czclk()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/
Dintel_display.c2 * Copyright © 2006-2007 Intel Corporation
27 #include <linux/dma-resv.h>
148 drm_WARN(&dev_priv->drm, (val & CCK_FREQUENCY_STATUS) != in vlv_get_cck_clock()
162 if (dev_priv->hpll_freq == 0) in vlv_get_cck_clock_hpll()
163 dev_priv->hpll_freq = vlv_get_hpll_vco(dev_priv); in vlv_get_cck_clock_hpll()
165 hpll = vlv_get_cck_clock(dev_priv, name, reg, dev_priv->hpll_freq); in vlv_get_cck_clock_hpll()
177 dev_priv->czclk_freq = vlv_get_cck_clock_hpll(dev_priv, "czclk", in intel_update_czclk()
180 drm_dbg(&dev_priv->drm, "CZ clock rate: %d kHz\n", in intel_update_czclk()
181 dev_priv->czclk_freq); in intel_update_czclk()
186 return (crtc_state->active_planes & in is_hdr_mode()
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