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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Dlantiq,etop-xway.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/lantiq,etop-xway.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - John Crispin <john@phrozen.org>
14 pattern: "^ethernet@[0-9a-f]+$"
17 const: lantiq,etop-xway
24 - description: TX interrupt
25 - description: RX interrupt
27 interrupt-names:
[all …]
Dsamsung-sxgbe.txt4 - compatible: Should be "samsung,sxgbe-v2.0a"
5 - reg: Address and length of the register set for the device
6 - interrupts: Should contain the SXGBE interrupts
9 index 0 - this is fixed common interrupt of SXGBE and it is always
11 index 1 to 25 - 8 variable transmit interrupts, variable 16 receive interrupts
13 - phy-mode: String, operation mode of the PHY interface.
15 - samsung,pbl: Integer, Programmable Burst Length.
17 - samsung,burst-map: Integer, Program the possible bursts supported by sxgbe
18 This is an integer and represents allowable DMA bursts when fixed burst.
19 Allowable range is 0x01-0x3F. When this field is set fixed burst is enabled.
[all …]
Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/
Ddwc3.txt3 DWC3- USB3 CONTROLLER. Complies to the generic USB binding properties
7 - compatible: must be "snps,dwc3"
8 - reg : Address and length of the register set for the device
9 - interrupts: Interrupts used by the dwc3 controller.
10 - clock-names: list of clock names. Ideally should be "ref",
12 - clocks: list of phandle and clock specifier pairs corresponding to
13 entries in the clock-names property.
16 clocks are optional if the parent node (i.e. glue-layer) is compatible to
18 "cavium,octeon-7130-usb-uctl"
20 "samsung,exynos5250-dwusb3"
[all …]
Dci-hdrc-usb2.txt4 - compatible: should be one of:
5 "fsl,imx23-usb"
6 "fsl,imx27-usb"
7 "fsl,imx28-usb"
8 "fsl,imx6q-usb"
9 "fsl,imx6sl-usb"
10 "fsl,imx6sx-usb"
11 "fsl,imx6ul-usb"
12 "fsl,imx7d-usb"
13 "fsl,imx7ulp-usb"
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dsamsung-sxgbe.txt4 - compatible: Should be "samsung,sxgbe-v2.0a"
5 - reg: Address and length of the register set for the device
6 - interrupts: Should contain the SXGBE interrupts
9 index 0 - this is fixed common interrupt of SXGBE and it is always
11 index 1 to 25 - 8 variable trasmit interrupts, variable 16 receive interrupts
13 - phy-mode: String, operation mode of the PHY interface.
15 - samsung,pbl: Integer, Programmable Burst Length.
17 - samsung,burst-map: Integer, Program the possible bursts supported by sxgbe
18 This is an integer and represents allowable DMA bursts when fixed burst.
19 Allowable range is 0x01-0x3F. When this field is set fixed burst is enabled.
[all …]
Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.50a
25 - snps,dwmac-3.610
26 - snps,dwmac-3.70a
[all …]
Dsnps,dwc-qos-ethernet.txt13 - compatible: One of:
14 - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10"
15 Represents the IP core when integrated into the Axis ARTPEC-6 SoC.
16 - "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10"
18 - "snps,dwc-qos-ethernet-4.10"
20 "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10". It is supported to be
22 - reg: Address and length of the register set for the device
23 - clocks: Phandle and clock specifiers for each entry in clock-names, in the
24 same order. See ../clock/clock-bindings.txt.
25 - clock-names: May contain any/all of the following depending on the IP
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/
Dsnps,dw-axi-dmac.txt4 - compatible: "snps,axi-dma-1.01a"
5 - reg: Address range of the DMAC registers. This should include
6 all of the per-channel registers.
7 - interrupt: Should contain the DMAC interrupt number.
8 - dma-channels: Number of channels supported by hardware.
9 - snps,dma-masters: Number of AXI masters supported by the hardware.
10 - snps,data-width: Maximum AXI data width supported by hardware.
11 (0 - 8bits, 1 - 16bits, 2 - 32bits, ..., 6 - 512bits)
12 - snps,priority: Priority of channel. Array size is equal to the number of
13 dma-channels. Priority value must be programmed within [0:dma-channels-1]
[all …]
Dsnps,dma-spear1340.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/dma/snps,dma-spear1340.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viresh Kumar <vireshk@kernel.org>
11 - Andy Shevchenko <andriy.shevchenko@linux.intel.com>
14 - $ref: "dma-controller.yaml#"
18 const: snps,dma-spear1340
20 "#dma-cells":
40 clock-names:
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/
Dsnps,dwc3.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Felipe Balbi <balbi@kernel.org>
14 be presented as a standalone DT node with an optional vendor-specific
18 - $ref: usb-drd.yaml#
19 - if:
25 - dr_mode
29 $ref: usb-xhci.yaml#
35 - const: snps,dwc3
[all …]
Dci-hdrc-usb2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/ci-hdrc-usb2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xu Yang <xu.yang_2@nxp.com>
11 - Peng Fan <peng.fan@nxp.com>
16 - enum:
17 - chipidea,usb2
18 - lsi,zevio-usb
19 - nvidia,tegra20-ehci
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/
Dti,gpmc-child.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
11 - Roger Quadros <rogerq@kernel.org>
24 gpmc,sync-clk-ps:
28 # Chip-select signal timings corresponding to GPMC_CONFIG2:
29 gpmc,cs-on-ns:
33 gpmc,cs-rd-off-ns:
[all …]
/kernel/linux/linux-6.6/drivers/video/fbdev/
Docfb.c12 #include <linux/dma-mapping.h>
36 #define OCFB_CTRL_PC 0x00000800 /* 8-bit Pseudo Color Enable*/
41 #define OCFB_CTRL_VBL1 0x00000000 /* Burst Length 1 */
42 #define OCFB_CTRL_VBL2 0x00000080 /* Burst Length 2 */
43 #define OCFB_CTRL_VBL4 0x00000100 /* Burst Length 4 */
44 #define OCFB_CTRL_VBL8 0x00000180 /* Burst Length 8 */
89 if (fbdev->little_endian) in ocfb_readreg()
90 return ioread32(fbdev->regs + offset); in ocfb_readreg()
92 return ioread32be(fbdev->regs + offset); in ocfb_readreg()
97 if (fbdev->little_endian) in ocfb_writereg()
[all …]
/kernel/linux/linux-5.10/drivers/video/fbdev/
Docfb.c12 #include <linux/dma-mapping.h>
36 #define OCFB_CTRL_PC 0x00000800 /* 8-bit Pseudo Color Enable*/
41 #define OCFB_CTRL_VBL1 0x00000000 /* Burst Length 1 */
42 #define OCFB_CTRL_VBL2 0x00000080 /* Burst Length 2 */
43 #define OCFB_CTRL_VBL4 0x00000100 /* Burst Length 4 */
44 #define OCFB_CTRL_VBL8 0x00000180 /* Burst Length 8 */
89 if (fbdev->little_endian) in ocfb_readreg()
90 return ioread32(fbdev->regs + offset); in ocfb_readreg()
92 return ioread32be(fbdev->regs + offset); in ocfb_readreg()
97 if (fbdev->little_endian) in ocfb_writereg()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/
Domap-gpmc.txt7 - compatible: Should be set to one of the following:
9 ti,omap2420-gpmc (omap2420)
10 ti,omap2430-gpmc (omap2430)
11 ti,omap3430-gpmc (omap3430 & omap3630)
12 ti,omap4430-gpmc (omap4430 & omap4460 & omap543x)
13 ti,am3352-gpmc (am335x devices)
15 - reg: A resource specifier for the register space
17 - ti,hwmods: Should be set to "ti,gpmc" until the DT transition is
19 - #address-cells: Must be set to 2 to allow memory address translation
20 - #size-cells: Must be set to 1 to allow CS address passing
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/dma/
Dsnps,dma-spear1340.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/dma/snps,dma-spear1340.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viresh Kumar <vireshk@kernel.org>
11 - Andy Shevchenko <andriy.shevchenko@linux.intel.com>
14 - $ref: dma-controller.yaml#
19 - const: snps,dma-spear1340
20 - items:
21 - enum:
[all …]
Dsnps,dw-axi-dmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/snps,dw-axi-dmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
16 - $ref: dma-controller.yaml#
21 - snps,axi-dma-1.01a
22 - intel,kmb-axi-dma
23 - starfive,jh7110-axi-dma
28 - description: Address range of the DMAC registers
[all …]
/kernel/linux/linux-6.6/drivers/dma/qcom/
Dqcom_adm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
10 #include <linux/dma-mapping.h>
27 #include "../virt-dma.h"
29 /* ADM registers - calculated from channel number and security domain */
99 #define ADM_MAX_XFER (SZ_64K - 1)
100 #define ADM_MAX_ROWS (SZ_64K - 1)
123 size_t length; member
177 * adm_free_chan - Frees dma resources associated with the specific channel
190 * adm_get_blksize - Get block size from burst value
[all …]
/kernel/linux/linux-5.10/arch/mips/lantiq/xway/
Ddma.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/dma-mapping.h>
43 #define DMA_PCTRL_2W_BURST 0x1 /* 2 word burst length */
44 #define DMA_PCTRL_4W_BURST 0x2 /* 4 word burst length */
45 #define DMA_PCTRL_8W_BURST 0x3 /* 8 word burst length */
46 #define DMA_TX_BURST_SHIFT 4 /* tx burst shift */
47 #define DMA_RX_BURST_SHIFT 2 /* rx burst shift */
65 ltq_dma_w32(ch->nr, LTQ_DMA_CS); in ltq_dma_enable_irq()
66 ltq_dma_w32_mask(0, 1 << ch->nr, LTQ_DMA_IRNEN); in ltq_dma_enable_irq()
77 ltq_dma_w32(ch->nr, LTQ_DMA_CS); in ltq_dma_disable_irq()
[all …]
/kernel/linux/linux-6.6/drivers/dma/
Didma64.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Driver for the Intel integrated DMA 64-bit
16 #include <linux/io-64-nonatomic-lo-hi.h>
18 #include "virt-dma.h"
46 #define IDMA64C_CTLL_DST_MSIZE(x) ((x) << 11) /* burst, #elements */
48 #define IDMA64C_CTLL_FC_M2P (1 << 20) /* mem-to-periph */
49 #define IDMA64C_CTLL_FC_P2M (2 << 20) /* periph-to-mem */
54 #define IDMA64C_CTLH_BLOCK_TS_MASK ((1 << 17) - 1)
59 #define IDMA64C_CFGL_DST_BURST_ALIGN (1 << 0) /* dst burst align */
60 #define IDMA64C_CFGL_SRC_BURST_ALIGN (1 << 1) /* src burst align */
[all …]
/kernel/linux/linux-5.10/drivers/dma/
Didma64.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Driver for the Intel integrated DMA 64-bit
16 #include <linux/io-64-nonatomic-lo-hi.h>
18 #include "virt-dma.h"
46 #define IDMA64C_CTLL_DST_MSIZE(x) ((x) << 11) /* burst, #elements */
48 #define IDMA64C_CTLL_FC_M2P (1 << 20) /* mem-to-periph */
49 #define IDMA64C_CTLL_FC_P2M (2 << 20) /* periph-to-mem */
54 #define IDMA64C_CTLH_BLOCK_TS_MASK ((1 << 17) - 1)
59 #define IDMA64C_CFGL_DST_BURST_ALIGN (1 << 0) /* dst burst align */
60 #define IDMA64C_CFGL_SRC_BURST_ALIGN (1 << 1) /* src burst align */
[all …]
/kernel/linux/linux-5.10/drivers/gpu/ipu-v3/
Dipu-cpmem.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright 2005-2012 Freescale Semiconductor, Inc. All Rights Reserved.
11 #include "ipu-prv.h"
95 struct ipu_cpmem *cpmem = ch->ipu->cpmem_priv; in ipu_get_cpmem()
97 return cpmem->base + ch->num; in ipu_get_cpmem()
108 u32 mask = (1 << size) - 1; in ipu_ch_param_write_field()
113 val = readl(&base->word[word].data[i]); in ipu_ch_param_write_field()
116 writel(val, &base->word[word].data[i]); in ipu_ch_param_write_field()
118 if ((bit + size - 1) / 32 > i) { in ipu_ch_param_write_field()
119 val = readl(&base->word[word].data[i + 1]); in ipu_ch_param_write_field()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/ipu-v3/
Dipu-cpmem.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright 2005-2012 Freescale Semiconductor, Inc. All Rights Reserved.
11 #include "ipu-prv.h"
95 struct ipu_cpmem *cpmem = ch->ipu->cpmem_priv; in ipu_get_cpmem()
97 return cpmem->base + ch->num; in ipu_get_cpmem()
108 u32 mask = (1 << size) - 1; in ipu_ch_param_write_field()
113 val = readl(&base->word[word].data[i]); in ipu_ch_param_write_field()
116 writel(val, &base->word[word].data[i]); in ipu_ch_param_write_field()
118 if ((bit + size - 1) / 32 > i) { in ipu_ch_param_write_field()
119 val = readl(&base->word[word].data[i + 1]); in ipu_ch_param_write_field()
[all …]
/kernel/linux/linux-6.6/Documentation/scheduler/
Dsched-bwc.rst7 The SCHED_RT case is covered in Documentation/scheduler/sched-rt-group.rst
14 microseconds of CPU time. That quota is assigned to per-cpu run queues in
22 is transferred to cpu-local "silos" on a demand basis. The amount transferred
25 Burst feature
26 -------------
30 Traditional (UP-EDF) bandwidth control is something like:
40 The burst feature observes that a workload doesn't always executes the full
62 The interferenece when using burst is valued by the possibilities for
66 https://lore.kernel.org/lkml/5371BD36-55AE-4F71-B9D7-B86DC32E3D2B@linux.alibaba.com/
69 ----------
[all …]

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