| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/ |
| D | qcom_hidma_mgmt.txt | 14 instance can use like maximum read/write request and number of bytes to
15 read/write in a single burst.
18 - compatible: "qcom,hidma-mgmt-1.0";
19 - reg: Address range for DMA device
20 - dma-channels: Number of channels supported by this DMA controller.
21 - max-write-burst-bytes: Maximum write burst in bytes that HIDMA can
26 - max-read-burst-bytes: Maximum read burst in bytes that HIDMA can
31 - max-write-transactions: This value is how many times a write burst is
34 - max-read-transactions: This value is how many times a read burst is
36 - channel-reset-timeout-cycles: Channel reset timeout in cycles for this SOC.
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| D | renesas,nbpfaxi.txt | 1 * Renesas "Type-AXI" NBPFAXI* DMA controllers
7 - compatible: must be one of
17 - #dma-cells: must be 2: the first integer is a terminal number, to which this
26 - max-burst-mem-read: limit burst size for memory reads
28 than using the maximum burst size allowed by the hardware's buffer size.
29 - max-burst-mem-write: limit burst size for memory writes
31 than using the maximum burst size allowed by the hardware's buffer size.
32 If both max-burst-mem-read and max-burst-mem-write are set, DMA_MEM_TO_MEM
35 You can use dma-channels and dma-requests as described in dma.txt, although they
40 dma: dma-controller@48000000 {
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/dma/ |
| D | qcom_hidma_mgmt.txt | 14 instance can use like maximum read/write request and number of bytes to
15 read/write in a single burst.
18 - compatible: "qcom,hidma-mgmt-1.0";
19 - reg: Address range for DMA device
20 - dma-channels: Number of channels supported by this DMA controller.
21 - max-write-burst-bytes: Maximum write burst in bytes that HIDMA can
26 - max-read-burst-bytes: Maximum read burst in bytes that HIDMA can
31 - max-write-transactions: This value is how many times a write burst is
34 - max-read-transactions: This value is how many times a read burst is
36 - channel-reset-timeout-cycles: Channel reset timeout in cycles for this SOC.
[all …]
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| D | renesas,nbpfaxi.txt | 1 * Renesas "Type-AXI" NBPFAXI* DMA controllers
7 - compatible: must be one of
17 - #dma-cells: must be 2: the first integer is a terminal number, to which this
26 - max-burst-mem-read: limit burst size for memory reads
28 than using the maximum burst size allowed by the hardware's buffer size.
29 - max-burst-mem-write: limit burst size for memory writes
31 than using the maximum burst size allowed by the hardware's buffer size.
32 If both max-burst-mem-read and max-burst-mem-write are set, DMA_MEM_TO_MEM
35 You can use dma-channels and dma-requests as described in dma.txt, although they
40 dma: dma-controller@48000000 {
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/ |
| D | ti,gpmc-child.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
11 - Roger Quadros <rogerq@kernel.org>
24 gpmc,sync-clk-ps:
28 # Chip-select signal timings corresponding to GPMC_CONFIG2:
29 gpmc,cs-on-ns:
33 gpmc,cs-rd-off-ns:
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/ |
| D | omap-gpmc.txt | 7 - compatible: Should be set to one of the following:
9 ti,omap2420-gpmc (omap2420)
10 ti,omap2430-gpmc (omap2430)
11 ti,omap3430-gpmc (omap3430 & omap3630)
12 ti,omap4430-gpmc (omap4430 & omap4460 & omap543x)
13 ti,am3352-gpmc (am335x devices)
15 - reg: A resource specifier for the register space
17 - ti,hwmods: Should be set to "ti,gpmc" until the DT transition is
19 - #address-cells: Must be set to 2 to allow memory address translation
20 - #size-cells: Must be set to 1 to allow CS address passing
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| /kernel/linux/linux-5.10/include/linux/platform_data/ |
| D | gpmc-omap.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2014 Texas Instruments, Inc. - https://www.ti.com
34 /* Chip-select signal timings corresponding to GPMC_CS_CONFIG2 */
36 u32 cs_rd_off; /* Read deassertion time */
41 u32 adv_rd_off; /* Read deassertion time */
44 u32 adv_aad_mux_rd_off; /* ADV read deassertion time for AAD */
59 u32 access; /* Start-cycle to first data valid delay */
60 u32 rd_cycle; /* Total read cycle time */
95 u32 t_rd_cycle; /* read cycle time */
96 u32 t_cez_r; /* read CS deassertion to high Z */
[all …]
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| /kernel/linux/linux-6.6/include/linux/platform_data/ |
| D | gpmc-omap.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2014 Texas Instruments, Inc. - https://www.ti.com
34 /* Chip-select signal timings corresponding to GPMC_CS_CONFIG2 */
36 u32 cs_rd_off; /* Read deassertion time */
41 u32 adv_rd_off; /* Read deassertion time */
44 u32 adv_aad_mux_rd_off; /* ADV read deassertion time for AAD */
59 u32 access; /* Start-cycle to first data valid delay */
60 u32 rd_cycle; /* Total read cycle time */
95 u32 t_rd_cycle; /* read cycle time */
96 u32 t_cez_r; /* read CS deassertion to high Z */
[all …]
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| /kernel/linux/linux-5.10/samples/pktgen/ |
| D | pktgen_sample03_burst_single_flow.sh | 2 # SPDX-License-Identifier: GPL-2.0
5 # - If correctly tuned[1], single CPU 10G wirespeed small pkts is possible[2]
7 # Using pktgen "burst" option (use -b $N)
8 # - To boost max performance
9 # - Avail since: kernel v3.18
10 # * commit 38b2cf2982dc73 ("net: pktgen: packet bursting via skb->xmit_more")
11 # - This avoids writing the HW tailptr on every driver xmit
12 # - The performance boost is impressive, see commit and blog [2]
19 # [1] http://netoptimizer.blogspot.dk/2014/06/pktgen-for-network-overload-testing.html
20 # [2] http://netoptimizer.blogspot.dk/2014/10/unlocked-10gbps-tx-wirespeed-smallest.html
[all …]
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| D | pktgen_sample05_flow_per_thread.sh | 2 # SPDX-License-Identifier: GPL-2.0
4 # Script will generate one flow per thread (-t N)
5 # - Same destination IP
6 # - Fake source IPs for each flow (fixed based on thread number)
10 # separate-flow should not access shared variables/data. This script
20 if [ -z "$DEST_IP" ]; then
21 [ -z "$IP6" ] && DEST_IP="198.18.0.42" || DEST_IP="FD00::1"
23 [ -z "$DST_MAC" ] && DST_MAC="90:e2:ba:ff:ff:ff"
24 [ -z "$CLONE_SKB" ] && CLONE_SKB="0"
25 [ -z "$BURST" ] && BURST=32
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| D | pktgen_bench_xmit_mode_netif_receive.sh | 2 # SPDX-License-Identifier: GPL-2.0
5 # - developed for benchmarking ingress qdisc path
16 # ------------------------------------------------------------------
24 # (3) ingress on this dev, handle_ing() -> tc_classify()
38 if [ -z "$DEST_IP" ]; then
39 [ -z "$IP6" ] && DEST_IP="198.18.0.42" || DEST_IP="FD00::1"
41 [ -z "$DST_MAC" ] && DST_MAC="90:e2:ba:ff:ff:ff"
42 [ -z "$BURST" ] && BURST=1024
43 [ -z "$COUNT" ] && COUNT="10000000" # Zero means indefinitely
44 if [ -n "$DEST_IP" ]; then
[all …]
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| /kernel/linux/linux-6.6/samples/pktgen/ |
| D | pktgen_sample03_burst_single_flow.sh | 2 # SPDX-License-Identifier: GPL-2.0
5 # - If correctly tuned[1], single CPU 10G wirespeed small pkts is possible[2]
7 # Using pktgen "burst" option (use -b $N)
8 # - To boost max performance
9 # - Avail since: kernel v3.18
10 # * commit 38b2cf2982dc73 ("net: pktgen: packet bursting via skb->xmit_more")
11 # - This avoids writing the HW tailptr on every driver xmit
12 # - The performance boost is impressive, see commit and blog [2]
19 # [1] http://netoptimizer.blogspot.dk/2014/06/pktgen-for-network-overload-testing.html
20 # [2] http://netoptimizer.blogspot.dk/2014/10/unlocked-10gbps-tx-wirespeed-smallest.html
[all …]
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| D | pktgen_sample05_flow_per_thread.sh | 2 # SPDX-License-Identifier: GPL-2.0
4 # Script will generate one flow per thread (-t N)
5 # - Same destination IP
6 # - Fake source IPs for each flow (fixed based on thread number)
10 # separate-flow should not access shared variables/data. This script
24 if [ -z "$DEST_IP" ]; then
25 [ -z "$IP6" ] && DEST_IP="198.18.0.42" || DEST_IP="FD00::1"
27 [ -z "$DST_MAC" ] && DST_MAC="90:e2:ba:ff:ff:ff"
28 [ -z "$CLONE_SKB" ] && CLONE_SKB="0"
29 [ -z "$BURST" ] && BURST=32
[all …]
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| D | pktgen_bench_xmit_mode_netif_receive.sh | 2 # SPDX-License-Identifier: GPL-2.0
5 # - developed for benchmarking ingress qdisc path
16 # ------------------------------------------------------------------
24 # (3) ingress on this dev, handle_ing() -> tc_classify()
42 if [ -z "$DEST_IP" ]; then
43 [ -z "$IP6" ] && DEST_IP="198.18.0.42" || DEST_IP="FD00::1"
45 [ -z "$DST_MAC" ] && DST_MAC="90:e2:ba:ff:ff:ff"
46 [ -z "$BURST" ] && BURST=1024
47 [ -z "$COUNT" ] && COUNT="10000000" # Zero means indefinitely
48 if [ -n "$DEST_IP" ]; then
[all …]
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| /kernel/linux/linux-6.6/drivers/char/tpm/ |
| D | tpm_tis_i2c_cr50.c | 1 // SPDX-License-Identifier: GPL-2.0
10 * - Use an interrupt for transaction status instead of hardcoded delays.
11 * - Must use write+wait+read read protocol.
12 * - All 4 bytes of status register must be read/written at once.
13 * - Burst count max is 63 bytes, and burst count behaves slightly differently
15 * - When reading from FIFO the full burstcnt must be read instead of just
45 * struct tpm_i2c_cr50_priv_data - Driver private data.
60 * tpm_cr50_i2c_int_handler() - cr50 interrupt handler.
74 struct tpm_i2c_cr50_priv_data *priv = dev_get_drvdata(&chip->dev); in tpm_cr50_i2c_int_handler()
76 complete(&priv->tpm_ready); in tpm_cr50_i2c_int_handler()
[all …]
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| /kernel/linux/linux-5.10/drivers/dma/dw-edma/ |
| D | dw-edma-core.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018-2019 Synopsys, Inc. and/or its affiliates.
18 #include <linux/dma-mapping.h>
20 #include "dw-edma-core.h"
21 #include "dw-edma-v0-core.h"
23 #include "../virt-dma.h"
28 return &dchan->dev->device; in dchan2dev()
34 return &chan->vc.chan.dev->device; in chan2dev()
45 struct dw_edma_burst *burst; in dw_edma_alloc_burst() local
47 burst = kzalloc(sizeof(*burst), GFP_NOWAIT); in dw_edma_alloc_burst()
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | omap2420-n8x0-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
11 stdout-path = &uart3;
16 compatible = "i2c-cbus-gpio";
21 #address-cells = <1>;
22 #size-cells = <0>;
25 interrupt-parent = <&gpio4>;
34 clock-frequency = <400000>;
44 clock-frequency = <400000>;
50 /* gpio-irq for dma: 26 */
53 #address-cells = <1>;
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| D | omap3-gta04a5one.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-18 H. Nikolaus Schaller <hns@goldelico.com>
6 #include "omap3-gta04a5.dts"
14 pinctrl-single,pins = <
45 pinctrl-names = "default";
46 pinctrl-0 = <&gpmc_pins>;
48 /delete-node/ nand@0,0;
52 #address-cells = <1>;
53 #size-cells = <1>;
54 compatible = "ti,omap2-onenand";
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/ |
| D | omap2420-n8x0-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
11 stdout-path = &uart3;
16 compatible = "i2c-cbus-gpio";
21 #address-cells = <1>;
22 #size-cells = <0>;
25 interrupt-parent = <&gpio4>;
34 clock-frequency = <400000>;
44 clock-frequency = <400000>;
50 /* gpio-irq for dma: 26 */
53 #address-cells = <1>;
[all …]
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| D | omap3-gta04a5one.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-18 H. Nikolaus Schaller <hns@goldelico.com>
6 #include "omap3-gta04a5.dts"
13 gpmc_pins: gpmc-pins {
14 pinctrl-single,pins = <
45 pinctrl-names = "default";
46 pinctrl-0 = <&gpmc_pins>;
48 /delete-node/ nand@0,0;
52 #address-cells = <1>;
53 #size-cells = <1>;
[all …]
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| /kernel/linux/linux-5.10/drivers/dma/qcom/ |
| D | hidma_mgmt.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
20 #include <linux/dma-mapping.h>
48 "maximum write burst (default: ACPI/DT value)");
53 "maximum read burst (default: ACPI/DT value)");
63 "maximum number of read transactions (default: ACPI/DT value)");
70 if (!is_power_of_2(mgmtdev->max_write_request) || in hidma_mgmt_setup()
71 (mgmtdev->max_write_request < 128) || in hidma_mgmt_setup()
72 (mgmtdev->max_write_request > 1024)) { in hidma_mgmt_setup()
73 dev_err(&mgmtdev->pdev->dev, "invalid write request %d\n", in hidma_mgmt_setup()
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| /kernel/linux/linux-6.6/drivers/dma/qcom/ |
| D | hidma_mgmt.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
22 #include <linux/dma-mapping.h>
50 "maximum write burst (default: ACPI/DT value)");
55 "maximum read burst (default: ACPI/DT value)");
65 "maximum number of read transactions (default: ACPI/DT value)");
72 if (!is_power_of_2(mgmtdev->max_write_request) || in hidma_mgmt_setup()
73 (mgmtdev->max_write_request < 128) || in hidma_mgmt_setup()
74 (mgmtdev->max_write_request > 1024)) { in hidma_mgmt_setup()
75 dev_err(&mgmtdev->pdev->dev, "invalid write request %d\n", in hidma_mgmt_setup()
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| /kernel/linux/linux-6.6/include/linux/iio/imu/ |
| D | adis.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
26 * struct adis_timeouts - ADIS chip variant timeouts
27 * @reset_ms - Wait time after rst pin goes inactive
28 * @sw_reset_ms - Wait time after sw reset command
29 * @self_test_ms - Wait time after self test command
38 * struct adis_data - ADIS chip variant specific data
39 * @read_delay: SPI delay for read operations in us
47 * @self_test_mask: Bitmask of supported self-test operations
49 * @self_test_no_autoclear: True if device's self-test needs clear of ctrl reg
[all …]
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| /kernel/linux/linux-6.6/drivers/dma/dw-edma/ |
| D | dw-edma-core.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018-2019 Synopsys, Inc. and/or its affiliates.
17 #include <linux/dma-mapping.h>
19 #include "dw-edma-core.h"
20 #include "dw-edma-v0-core.h"
21 #include "dw-hdma-v0-core.h"
23 #include "../virt-dma.h"
28 return &dchan->dev->device; in dchan2dev()
34 return &chan->vc.chan.dev->device; in chan2dev()
46 struct dw_edma_chip *chip = chan->dw->chip; in dw_edma_get_pci_address()
[all …]
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| /kernel/linux/linux-5.10/include/linux/iio/imu/ |
| D | adis.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
25 * struct adis_timeouts - ADIS chip variant timeouts
26 * @reset_ms - Wait time after rst pin goes inactive
27 * @sw_reset_ms - Wait time after sw reset command
28 * @self_test_ms - Wait time after self test command
37 * struct adis_data - ADIS chip variant specific data
38 * @read_delay: SPI delay for read operations in us
46 * @self_test_mask: Bitmask of supported self-test operations
48 * @self_test_no_autoclear: True if device's self-test needs clear of ctrl reg
[all …]
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