| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/ |
| D | ti,gpmc-child.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
11 - Roger Quadros <rogerq@kernel.org>
24 gpmc,sync-clk-ps:
28 # Chip-select signal timings corresponding to GPMC_CONFIG2:
29 gpmc,cs-on-ns:
33 gpmc,cs-rd-off-ns:
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/ |
| D | omap-gpmc.txt | 7 - compatible: Should be set to one of the following:
9 ti,omap2420-gpmc (omap2420)
10 ti,omap2430-gpmc (omap2430)
11 ti,omap3430-gpmc (omap3430 & omap3630)
12 ti,omap4430-gpmc (omap4430 & omap4460 & omap543x)
13 ti,am3352-gpmc (am335x devices)
15 - reg: A resource specifier for the register space
17 - ti,hwmods: Should be set to "ti,gpmc" until the DT transition is
19 - #address-cells: Must be set to 2 to allow memory address translation
20 - #size-cells: Must be set to 1 to allow CS address passing
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | omap2420-n8x0-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
11 stdout-path = &uart3;
16 compatible = "i2c-cbus-gpio";
21 #address-cells = <1>;
22 #size-cells = <0>;
25 interrupt-parent = <&gpio4>;
34 clock-frequency = <400000>;
44 clock-frequency = <400000>;
50 /* gpio-irq for dma: 26 */
53 #address-cells = <1>;
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| D | omap3-gta04a5one.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-18 H. Nikolaus Schaller <hns@goldelico.com>
6 #include "omap3-gta04a5.dts"
14 pinctrl-single,pins = <
45 pinctrl-names = "default";
46 pinctrl-0 = <&gpmc_pins>;
48 /delete-node/ nand@0,0;
52 #address-cells = <1>;
53 #size-cells = <1>;
54 compatible = "ti,omap2-onenand";
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| D | omap3-igep.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
8 /dts-v1/;
19 stdout-path = &uart3;
23 compatible = "ti,omap-twl4030";
28 vdd33: regulator-vdd33 {
29 compatible = "regulator-fixed";
30 regulator-name = "vdd33";
31 regulator-always-on;
38 pinctrl-single,pins = <
45 pinctrl-single,pins = <
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| D | omap3-n950-n9.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap3-n950-n9.dtsi - Device Tree file for Nokia N950 & N9 (common stuff)
13 cpu0-supply = <&vcc>;
23 compatible = "regulator-fixed";
24 regulator-name = "VEMMC";
25 regulator-min-microvolt = <2900000>;
26 regulator-max-microvolt = <2900000>;
28 startup-delay-us = <150>;
29 enable-active-high;
33 compatible = "regulator-fixed";
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| D | artpec6.dtsi | 2 * Device Tree Source for the Axis ARTPEC-6 SoC
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/interrupt-controller/arm-gic.h>
44 #include <dt-bindings/dma/nbpfaxi.h>
45 #include <dt-bindings/clock/axis,artpec6-clkctrl.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
51 interrupt-parent = <&intc>;
54 #address-cells = <1>;
55 #size-cells = <0>;
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/ |
| D | omap2420-n8x0-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
11 stdout-path = &uart3;
16 compatible = "i2c-cbus-gpio";
21 #address-cells = <1>;
22 #size-cells = <0>;
25 interrupt-parent = <&gpio4>;
34 clock-frequency = <400000>;
44 clock-frequency = <400000>;
50 /* gpio-irq for dma: 26 */
53 #address-cells = <1>;
[all …]
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| D | omap3-gta04a5one.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-18 H. Nikolaus Schaller <hns@goldelico.com>
6 #include "omap3-gta04a5.dts"
13 gpmc_pins: gpmc-pins {
14 pinctrl-single,pins = <
45 pinctrl-names = "default";
46 pinctrl-0 = <&gpmc_pins>;
48 /delete-node/ nand@0,0;
52 #address-cells = <1>;
53 #size-cells = <1>;
[all …]
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| D | omap3-igep.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
8 /dts-v1/;
19 stdout-path = &uart3;
23 compatible = "ti,omap-twl4030";
28 vdd33: regulator-vdd33 {
29 compatible = "regulator-fixed";
30 regulator-name = "vdd33";
31 regulator-always-on;
37 gpmc_pins: gpmc-pins {
38 pinctrl-single,pins = <
[all …]
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| D | omap3-n950-n9.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap3-n950-n9.dtsi - Device Tree file for Nokia N950 & N9 (common stuff)
13 cpu0-supply = <&vcc>;
23 compatible = "regulator-fixed";
24 regulator-name = "VEMMC";
25 regulator-min-microvolt = <2900000>;
26 regulator-max-microvolt = <2900000>;
28 startup-delay-us = <150>;
29 enable-active-high;
33 compatible = "regulator-fixed";
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| /kernel/linux/linux-5.10/include/linux/platform_data/ |
| D | gpmc-omap.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2014 Texas Instruments, Inc. - https://www.ti.com
34 /* Chip-select signal timings corresponding to GPMC_CS_CONFIG2 */
59 u32 access; /* Start-cycle to first data valid delay */
105 u32 t_bacc; /* burst access valid clock to output delay */
131 #define GPMC_BURST_4 4 /* 4 word burst */
132 #define GPMC_BURST_8 8 /* 8 word burst */
133 #define GPMC_BURST_16 16 /* 16 word burst */
134 #define GPMC_DEVWIDTH_8BIT 1 /* 8-bit device width */
135 #define GPMC_DEVWIDTH_16BIT 2 /* 16-bit device width */
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| /kernel/linux/linux-6.6/include/linux/platform_data/ |
| D | gpmc-omap.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2014 Texas Instruments, Inc. - https://www.ti.com
34 /* Chip-select signal timings corresponding to GPMC_CS_CONFIG2 */
59 u32 access; /* Start-cycle to first data valid delay */
105 u32 t_bacc; /* burst access valid clock to output delay */
131 #define GPMC_BURST_4 4 /* 4 word burst */
132 #define GPMC_BURST_8 8 /* 8 word burst */
133 #define GPMC_BURST_16 16 /* 16 word burst */
134 #define GPMC_DEVWIDTH_8BIT 1 /* 8-bit device width */
135 #define GPMC_DEVWIDTH_16BIT 2 /* 16-bit device width */
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| /kernel/linux/linux-5.10/drivers/net/ethernet/amazon/ena/ |
| D | ena_eth_com.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
3 * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.
17 /* For LLQ, header buffer - pushed to the device mem space */
69 writel(intr_reg->intr_control, io_cq->unmask_reg); in ena_com_unmask_intr()
76 next_to_comp = io_sq->next_to_comp; in ena_com_free_q_entries()
77 tail = io_sq->tail; in ena_com_free_q_entries()
78 cnt = tail - next_to_comp; in ena_com_free_q_entries()
80 return io_sq->q_depth - 1 - cnt; in ena_com_free_q_entries()
89 if (io_sq->mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST) in ena_com_sq_have_enough_space()
97 temp = required_buffers / io_sq->llq_info.descs_per_entry + 2; in ena_com_sq_have_enough_space()
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/axis/ |
| D | artpec6.dtsi | 2 * Device Tree Source for the Axis ARTPEC-6 SoC
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/interrupt-controller/arm-gic.h>
44 #include <dt-bindings/dma/nbpfaxi.h>
45 #include <dt-bindings/clock/axis,artpec6-clkctrl.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
51 interrupt-parent = <&intc>;
54 #address-cells = <1>;
55 #size-cells = <0>;
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| /kernel/linux/linux-5.10/drivers/gpu/drm/savage/ |
| D | savage_drv.h | 1 /* savage_drv.h -- Private header for the savage driver */
20 * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR
52 * wide and thus very long lived (unlikely to ever wrap). The size
60 unsigned int wrap; member
77 * 10kbytes for 255 40-byte vertices in one drawing command. */
171 /* BCI and status-related stuff */
192 /* config/hardware-dependent function pointers */
235 #define SAVAGE_BCI_FIFO_SIZE 32 /* number of entries in on-chip
263 /* GBD - BCI enable */
486 BCI_WRITE(BCI_CMD_DMA | (((n) >> 1) - 1))
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| /kernel/linux/linux-6.6/drivers/net/ethernet/amazon/ena/ |
| D | ena_eth_com.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
3 * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.
15 #define ENA_LLQ_HEADER (128UL - ENA_LLQ_ENTRY_DESC_CHUNK_SIZE)
16 #define ENA_LLQ_LARGE_HEADER (256UL - ENA_LLQ_ENTRY_DESC_CHUNK_SIZE)
21 /* For LLQ, header buffer - pushed to the device mem space */
73 writel(intr_reg->intr_control, io_cq->unmask_reg); in ena_com_unmask_intr()
80 next_to_comp = io_sq->next_to_comp; in ena_com_free_q_entries()
81 tail = io_sq->tail; in ena_com_free_q_entries()
82 cnt = tail - next_to_comp; in ena_com_free_q_entries()
84 return io_sq->q_depth - 1 - cnt; in ena_com_free_q_entries()
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| /kernel/linux/linux-6.6/drivers/usb/cdns3/ |
| D | cdnsp-debug.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
61 return "Stopped - Length Invalid"; in cdnsp_trb_comp_code_string()
63 return "Stopped - Short Packet"; in cdnsp_trb_comp_code_string()
97 return "No-Op"; in cdnsp_trb_type_string()
119 return "No-Op Command"; in cdnsp_trb_type_string()
129 return "MFINDEX Wrap Event"; in cdnsp_trb_type_string()
180 int ep_id = TRB_TO_EP_INDEX(field3) - 1; in cdnsp_decode_trb()
380 "type '%s' -> raw %08x %08x %08x %08x", in cdnsp_decode_trb()
385 if (ret == size - 1) in cdnsp_decode_trb()
403 s = "full-speed"; in cdnsp_decode_slot_context()
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| /kernel/linux/linux-5.10/net/dccp/ |
| D | ackvec.c | 1 // SPDX-License-Identifier: GPL-2.0-only
22 av->av_buf_head = av->av_buf_tail = DCCPAV_MAX_ACKVEC_LEN - 1; in dccp_ackvec_alloc()
23 INIT_LIST_HEAD(&av->av_records); in dccp_ackvec_alloc()
32 list_for_each_entry_safe(cur, next, &av->av_records, avr_node) in dccp_ackvec_purge_records()
34 INIT_LIST_HEAD(&av->av_records); in dccp_ackvec_purge_records()
46 * dccp_ackvec_update_records - Record information about sent Ack Vectors
57 return -ENOBUFS; in dccp_ackvec_update_records()
59 avr->avr_ack_seqno = seqno; in dccp_ackvec_update_records()
60 avr->avr_ack_ptr = av->av_buf_head; in dccp_ackvec_update_records()
61 avr->avr_ack_ackno = av->av_buf_ackno; in dccp_ackvec_update_records()
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| /kernel/linux/linux-6.6/net/dccp/ |
| D | ackvec.c | 1 // SPDX-License-Identifier: GPL-2.0-only
22 av->av_buf_head = av->av_buf_tail = DCCPAV_MAX_ACKVEC_LEN - 1; in dccp_ackvec_alloc()
23 INIT_LIST_HEAD(&av->av_records); in dccp_ackvec_alloc()
32 list_for_each_entry_safe(cur, next, &av->av_records, avr_node) in dccp_ackvec_purge_records()
34 INIT_LIST_HEAD(&av->av_records); in dccp_ackvec_purge_records()
46 * dccp_ackvec_update_records - Record information about sent Ack Vectors
57 return -ENOBUFS; in dccp_ackvec_update_records()
59 avr->avr_ack_seqno = seqno; in dccp_ackvec_update_records()
60 avr->avr_ack_ptr = av->av_buf_head; in dccp_ackvec_update_records()
61 avr->avr_ack_ackno = av->av_buf_ackno; in dccp_ackvec_update_records()
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| /kernel/linux/linux-5.10/block/ |
| D | bfq-iosched.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
16 * BFQ is a proportional-share I/O scheduler, with some extra
17 * low-latency capabilities. BFQ also supports full hierarchical
20 * limitations can be found in Documentation/block/bfq-iosched.rst.
22 * BFQ is a proportional-share storage-I/O scheduling algorithm based
23 * on the slice-by-slice service scheme of CFQ. But BFQ assigns
25 * time slices. The device is not granted to the in-service process
31 * B-WF2Q+, to schedule processes according to their budgets. More
33 * process/queue is assigned a user-configurable weight, and B-WF2Q+
36 * B-WF2Q+, BFQ can afford to assign high budgets to I/O-bound
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| /kernel/linux/linux-6.6/sound/soc/codecs/ |
| D | rt5677-spi.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5677-spi.c -- RT5677 ALSA SoC audio codec driver
30 #include "rt5677-spi.h"
39 * DataPhase word size of 16-bit commands is 2 bytes.
40 * DataPhase word size of 32-bit commands is 4 bytes.
41 * DataPhase word size of burst commands is 8 bytes.
42 * The DSP CPU is little-endian.
54 #define RT5677_MIC_BUF_BYTES ((u32)(RT5677_BUF_BYTES_TOTAL - \
66 size_t dma_offset; /* zero-based offset into runtime->dma_area */
68 u32 mic_read_offset; /* zero-based offset into DSP's mic buffer */
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| /kernel/linux/linux-5.10/sound/soc/codecs/ |
| D | rt5677-spi.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5677-spi.c -- RT5677 ALSA SoC audio codec driver
30 #include "rt5677-spi.h"
39 * DataPhase word size of 16-bit commands is 2 bytes.
40 * DataPhase word size of 32-bit commands is 4 bytes.
41 * DataPhase word size of burst commands is 8 bytes.
42 * The DSP CPU is little-endian.
54 #define RT5677_MIC_BUF_BYTES ((u32)(RT5677_BUF_BYTES_TOTAL - \
66 size_t dma_offset; /* zero-based offset into runtime->dma_area */
68 u32 mic_read_offset; /* zero-based offset into DSP's mic buffer */
[all …]
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| /kernel/linux/linux-6.6/drivers/ata/ |
| D | pata_cs5530.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * pata-cs5530.c - CS5530 PATA for new ATA layer
28 unsigned long bmdma = (unsigned long)ap->ioaddr.bmdma_addr; in cs5530_port_base()
30 return (void __iomem *)((bmdma & ~0x0F) + 0x20 + 0x10 * ap->port_no); in cs5530_port_base()
34 * cs5530_set_piomode - PIO setup
57 if (adev->devno) in cs5530_set_piomode()
60 iowrite32(cs5530_pio_timings[format][adev->pio_mode - XFER_PIO_0], base); in cs5530_set_piomode()
64 * cs5530_set_dmamode - DMA timing setup
82 switch(adev->dma_mode) { in cs5530_set_dmamode()
100 if (adev->devno == 0) /* Master */ in cs5530_set_dmamode()
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| /kernel/linux/linux-5.10/drivers/ata/ |
| D | pata_cs5530.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * pata-cs5530.c - CS5530 PATA for new ATA layer
28 unsigned long bmdma = (unsigned long)ap->ioaddr.bmdma_addr; in cs5530_port_base()
30 return (void __iomem *)((bmdma & ~0x0F) + 0x20 + 0x10 * ap->port_no); in cs5530_port_base()
34 * cs5530_set_piomode - PIO setup
57 if (adev->devno) in cs5530_set_piomode()
60 iowrite32(cs5530_pio_timings[format][adev->pio_mode - XFER_PIO_0], base); in cs5530_set_piomode()
64 * cs5530_set_dmamode - DMA timing setup
82 switch(adev->dma_mode) { in cs5530_set_dmamode()
100 if (adev->devno == 0) /* Master */ in cs5530_set_dmamode()
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