| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| D | rv1_clk_mgr_clk.c | 52 void rv1_dump_clk_registers(struct clk_state_registers *regs, struct clk_bypass *bypass, struct clk… in rv1_dump_clk_registers() argument 58 bypass->dcfclk_bypass = REG_READ(CLK0_CLK8_BYPASS_CNTL) & 0x0007; in rv1_dump_clk_registers() 59 if (bypass->dcfclk_bypass < 0 || bypass->dcfclk_bypass > 4) in rv1_dump_clk_registers() 60 bypass->dcfclk_bypass = 0; in rv1_dump_clk_registers() 69 bypass->dispclk_pypass = REG_READ(CLK0_CLK10_BYPASS_CNTL) & 0x0007; in rv1_dump_clk_registers() 70 if (bypass->dispclk_pypass < 0 || bypass->dispclk_pypass > 4) in rv1_dump_clk_registers() 71 bypass->dispclk_pypass = 0; in rv1_dump_clk_registers() 75 bypass->dprefclk_bypass = REG_READ(CLK0_CLK11_BYPASS_CNTL) & 0x0007; in rv1_dump_clk_registers() 76 if (bypass->dprefclk_bypass < 0 || bypass->dprefclk_bypass > 4) in rv1_dump_clk_registers() 77 bypass->dprefclk_bypass = 0; in rv1_dump_clk_registers()
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| D | rv1_clk_mgr_clk.c | 52 void rv1_dump_clk_registers(struct clk_state_registers *regs, struct clk_bypass *bypass, struct clk… in rv1_dump_clk_registers() argument 58 bypass->dcfclk_bypass = REG_READ(CLK0_CLK8_BYPASS_CNTL) & 0x0007; in rv1_dump_clk_registers() 59 if (bypass->dcfclk_bypass < 0 || bypass->dcfclk_bypass > 4) in rv1_dump_clk_registers() 60 bypass->dcfclk_bypass = 0; in rv1_dump_clk_registers() 69 bypass->dispclk_pypass = REG_READ(CLK0_CLK10_BYPASS_CNTL) & 0x0007; in rv1_dump_clk_registers() 70 if (bypass->dispclk_pypass < 0 || bypass->dispclk_pypass > 4) in rv1_dump_clk_registers() 71 bypass->dispclk_pypass = 0; in rv1_dump_clk_registers() 75 bypass->dprefclk_bypass = REG_READ(CLK0_CLK11_BYPASS_CNTL) & 0x0007; in rv1_dump_clk_registers() 76 if (bypass->dprefclk_bypass < 0 || bypass->dprefclk_bypass > 4) in rv1_dump_clk_registers() 77 bypass->dprefclk_bypass = 0; in rv1_dump_clk_registers()
|
| /kernel/linux/linux-6.6/sound/soc/codecs/ |
| D | wm8990.c | 104 SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER3, 106 SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3, 108 SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3, 110 SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER5, 112 SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8990_OUTPUT_MIXER5, 114 SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8990_OUTPUT_MIXER5, 118 SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER4, 120 SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4, 122 SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4, 124 SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER6, [all …]
|
| D | wm8400.c | 140 SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8400_OUTPUT_MIXER3, 142 SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8400_OUTPUT_MIXER3, 144 SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8400_OUTPUT_MIXER3, 146 SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8400_OUTPUT_MIXER5, 148 SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8400_OUTPUT_MIXER5, 150 SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8400_OUTPUT_MIXER5, 154 SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8400_OUTPUT_MIXER4, 156 SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8400_OUTPUT_MIXER4, 158 SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8400_OUTPUT_MIXER4, 160 SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8400_OUTPUT_MIXER6, [all …]
|
| D | wm8991.c | 176 SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8991_OUTPUT_MIXER3, 178 SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER3, 180 SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER3, 182 SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8991_OUTPUT_MIXER5, 184 SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8991_OUTPUT_MIXER5, 186 SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8991_OUTPUT_MIXER5, 190 SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8991_OUTPUT_MIXER4, 192 SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER4, 194 SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER4, 196 SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8991_OUTPUT_MIXER6, [all …]
|
| D | tlv320aic3x.c | 331 SOC_SINGLE_TLV("Left Line Mixer PGAR Bypass Volume", 336 SOC_SINGLE_TLV("Right Line Mixer PGAL Bypass Volume", 341 SOC_SINGLE_TLV("Left HP Mixer PGAR Bypass Volume", 346 SOC_SINGLE_TLV("Right HP Mixer PGAL Bypass Volume", 351 SOC_SINGLE_TLV("Left HPCOM Mixer PGAR Bypass Volume", 356 SOC_SINGLE_TLV("Right HPCOM Mixer PGAL Bypass Volume", 362 SOC_DOUBLE_R_TLV("Line PGA Bypass Volume", 369 SOC_DOUBLE_R_TLV("HP PGA Bypass Volume", 376 SOC_DOUBLE_R_TLV("HPCOM PGA Bypass Volume", 431 SOC_SINGLE_TLV("Left Line Mixer Line2R Bypass Volume", [all …]
|
| D | wm9712.c | 166 SOC_SINGLE("PCBeep Bypass Headphone Volume", AC97_PC_BEEP, 12, 7, 1), 167 SOC_SINGLE("PCBeep Bypass Speaker Volume", AC97_PC_BEEP, 8, 7, 1), 168 SOC_SINGLE("PCBeep Bypass Phone Volume", AC97_PC_BEEP, 4, 7, 1), 288 WM9712_HP_MIXER_CTRL("PCBeep Bypass Switch", HPL_MIXER, 5), 290 WM9712_HP_MIXER_CTRL("Phone Bypass Switch", HPL_MIXER, 3), 291 WM9712_HP_MIXER_CTRL("Line Bypass Switch", HPL_MIXER, 2), 298 WM9712_HP_MIXER_CTRL("PCBeep Bypass Switch", HPR_MIXER, 5), 300 WM9712_HP_MIXER_CTRL("Phone Bypass Switch", HPR_MIXER, 3), 301 WM9712_HP_MIXER_CTRL("Line Bypass Switch", HPR_MIXER, 2), 308 SOC_DAPM_SINGLE("PCBeep Bypass Switch", AC97_PC_BEEP, 11, 1, 1), [all …]
|
| /kernel/linux/linux-5.10/sound/soc/codecs/ |
| D | wm8990.c | 104 SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER3, 106 SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3, 108 SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3, 110 SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER5, 112 SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8990_OUTPUT_MIXER5, 114 SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8990_OUTPUT_MIXER5, 118 SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER4, 120 SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4, 122 SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4, 124 SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER6, [all …]
|
| D | wm8400.c | 140 SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8400_OUTPUT_MIXER3, 142 SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8400_OUTPUT_MIXER3, 144 SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8400_OUTPUT_MIXER3, 146 SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8400_OUTPUT_MIXER5, 148 SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8400_OUTPUT_MIXER5, 150 SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8400_OUTPUT_MIXER5, 154 SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8400_OUTPUT_MIXER4, 156 SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8400_OUTPUT_MIXER4, 158 SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8400_OUTPUT_MIXER4, 160 SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8400_OUTPUT_MIXER6, [all …]
|
| D | wm8991.c | 176 SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8991_OUTPUT_MIXER3, 178 SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER3, 180 SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER3, 182 SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8991_OUTPUT_MIXER5, 184 SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8991_OUTPUT_MIXER5, 186 SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8991_OUTPUT_MIXER5, 190 SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8991_OUTPUT_MIXER4, 192 SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER4, 194 SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER4, 196 SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8991_OUTPUT_MIXER6, [all …]
|
| D | tlv320aic3x.c | 337 SOC_SINGLE_TLV("Left Line Mixer PGAR Bypass Volume", 342 SOC_SINGLE_TLV("Right Line Mixer PGAL Bypass Volume", 347 SOC_SINGLE_TLV("Left HP Mixer PGAR Bypass Volume", 352 SOC_SINGLE_TLV("Right HP Mixer PGAL Bypass Volume", 357 SOC_SINGLE_TLV("Left HPCOM Mixer PGAR Bypass Volume", 362 SOC_SINGLE_TLV("Right HPCOM Mixer PGAL Bypass Volume", 368 SOC_DOUBLE_R_TLV("Line PGA Bypass Volume", 375 SOC_DOUBLE_R_TLV("HP PGA Bypass Volume", 382 SOC_DOUBLE_R_TLV("HPCOM PGA Bypass Volume", 437 SOC_SINGLE_TLV("Left Line Mixer Line2R Bypass Volume", [all …]
|
| D | wm9712.c | 166 SOC_SINGLE("PCBeep Bypass Headphone Volume", AC97_PC_BEEP, 12, 7, 1), 167 SOC_SINGLE("PCBeep Bypass Speaker Volume", AC97_PC_BEEP, 8, 7, 1), 168 SOC_SINGLE("PCBeep Bypass Phone Volume", AC97_PC_BEEP, 4, 7, 1), 288 WM9712_HP_MIXER_CTRL("PCBeep Bypass Switch", HPL_MIXER, 5), 290 WM9712_HP_MIXER_CTRL("Phone Bypass Switch", HPL_MIXER, 3), 291 WM9712_HP_MIXER_CTRL("Line Bypass Switch", HPL_MIXER, 2), 298 WM9712_HP_MIXER_CTRL("PCBeep Bypass Switch", HPR_MIXER, 5), 300 WM9712_HP_MIXER_CTRL("Phone Bypass Switch", HPR_MIXER, 3), 301 WM9712_HP_MIXER_CTRL("Line Bypass Switch", HPR_MIXER, 2), 308 SOC_DAPM_SINGLE("PCBeep Bypass Switch", AC97_PC_BEEP, 11, 1, 1), [all …]
|
| /kernel/linux/linux-6.6/include/linux/ |
| D | irqbypass.h | 3 * IRQ offload/bypass manager 18 * The IRQ bypass manager is a simple set of lists and callbacks that allows 20 * consumers (ex. virtualization hardware that allows IRQ bypass or offload) 32 * struct irq_bypass_producer - IRQ bypass producer definition 33 * @node: IRQ bypass manager private list management 41 * The IRQ bypass producer structure represents an interrupt source for 42 * participation in possible host bypass, for instance an interrupt vector 58 * struct irq_bypass_consumer - IRQ bypass consumer definition 59 * @node: IRQ bypass manager private list management 66 * The IRQ bypass consumer structure represents an interrupt sink for [all …]
|
| /kernel/linux/linux-5.10/include/linux/ |
| D | irqbypass.h | 3 * IRQ offload/bypass manager 18 * The IRQ bypass manager is a simple set of lists and callbacks that allows 20 * consumers (ex. virtualization hardware that allows IRQ bypass or offload) 32 * struct irq_bypass_producer - IRQ bypass producer definition 33 * @node: IRQ bypass manager private list management 41 * The IRQ bypass producer structure represents an interrupt source for 42 * participation in possible host bypass, for instance an interrupt vector 58 * struct irq_bypass_consumer - IRQ bypass consumer definition 59 * @node: IRQ bypass manager private list management 66 * The IRQ bypass consumer structure represents an interrupt sink for [all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| D | clk_mgr.h | 56 uint32_t CLK1_CLK0_BYPASS_CNTL; //dispclk bypass 57 uint32_t CLK1_CLK1_BYPASS_CNTL; //dppclk bypass 58 uint32_t CLK1_CLK2_BYPASS_CNTL; //dprefclk bypass 59 uint32_t CLK1_CLK3_BYPASS_CNTL; //dcfclk bypass 72 uint32_t CLK1_CLK0_BYPASS_CNTL; //dispclk bypass 73 uint32_t CLK1_CLK1_BYPASS_CNTL; //dppclk bypass 74 uint32_t CLK1_CLK2_BYPASS_CNTL; //dprefclk bypass 75 uint32_t CLK1_CLK3_BYPASS_CNTL; //dcfclk bypass 174 uint32_t CLK0_CLK8_BYPASS_CNTL; //dcfclk bypass 175 uint32_t CLK0_CLK10_BYPASS_CNTL; //dprefclk bypass [all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| D | clk_mgr.h | 57 uint32_t CLK1_CLK0_BYPASS_CNTL; //dispclk bypass 58 uint32_t CLK1_CLK1_BYPASS_CNTL; //dppclk bypass 59 uint32_t CLK1_CLK2_BYPASS_CNTL; //dprefclk bypass 60 uint32_t CLK1_CLK3_BYPASS_CNTL; //dcfclk bypass 149 uint32_t CLK0_CLK8_BYPASS_CNTL; //dcfclk bypass 150 uint32_t CLK0_CLK10_BYPASS_CNTL; //dprefclk bypass 151 uint32_t CLK0_CLK11_BYPASS_CNTL; //dispclk bypass 162 uint32_t CLK1_CLK0_BYPASS_CNTL; //dispclk bypass 163 uint32_t CLK1_CLK1_BYPASS_CNTL; //dppclk bypass 164 uint32_t CLK1_CLK2_BYPASS_CNTL; //dprefclk bypass [all …]
|
| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/broadwell/ |
| D | frontend.json | 46 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 55 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 64 …n Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also… 73 …n Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also… 82 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 90 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 98 …e uops being delivered to the Alloc stage since uops can be delivered by bypass skipping the Instr… 106 …n Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also… 115 …nstruction Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ.", 123 …n Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also… [all …]
|
| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/broadwellde/ |
| D | frontend.json | 46 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 55 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 64 …n Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also… 73 …n Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also… 82 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 90 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 98 …e uops being delivered to the Alloc stage since uops can be delivered by bypass skipping the Instr… 106 …n Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also… 115 …nstruction Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ.", 123 …n Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also… [all …]
|
| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/broadwellx/ |
| D | frontend.json | 46 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 55 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 64 …n Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also… 73 …n Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also… 82 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 90 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 98 …e uops being delivered to the Alloc stage since uops can be delivered by bypass skipping the Instr… 106 …n Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also… 115 …nstruction Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ.", 123 …n Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also… [all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/ |
| D | smsc,usb3503.yaml | 37 bypass-gpios: 40 GPIO for bypass. 41 Control signal to select between HUB MODE and BYPASS MODE. 57 Specifies initial mode. 1 for Hub mode, 2 for standby mode and 3 for bypass mode. 58 In bypass mode the downstream port 3 is connected to the upstream port with low 91 bypass-gpios: false 95 - bypass-gpios 138 bypass-gpios = <&gpx3 6 1>;
|
| /kernel/linux/linux-6.6/drivers/usb/misc/ |
| D | usb3503.c | 49 struct gpio_desc *bypass; member 113 int rst, bypass, conn; in usb3503_switch_mode() local 119 bypass = 0; in usb3503_switch_mode() 124 bypass = 1; in usb3503_switch_mode() 130 bypass = 1; in usb3503_switch_mode() 143 if (hub->bypass) in usb3503_switch_mode() 144 gpiod_set_value_cansleep(hub->bypass, bypass); in usb3503_switch_mode() 261 hub->bypass = devm_gpiod_get_optional(dev, "bypass", GPIOD_OUT_HIGH); in usb3503_probe() 262 if (IS_ERR(hub->bypass)) { in usb3503_probe() 263 err = PTR_ERR(hub->bypass); in usb3503_probe() [all …]
|
| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/broadwell/ |
| D | frontend.json | 3 …e uops being delivered to the Alloc stage since uops can be delivered by bypass skipping the Instr… 13 …n Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also… 23 …nstruction Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ.", 34 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 44 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 55 …(IDQ) while the Microcode Sequencer (MS) is busy. Counting includes uops that may bypass the IDQ.", 65 …(IDQ) while the Microcode Sequencer (MS) is busy. Counting includes uops that may bypass the IDQ.", 76 …(DSB) while the Microcode Sequencer (MS) is busy. Counting includes uops that may bypass the IDQ.", 88 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 99 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", [all …]
|
| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/broadwellx/ |
| D | frontend.json | 8 …e uops being delivered to the Alloc stage since uops can be delivered by bypass skipping the Instr… 18 …n Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also… 29 …nstruction Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ.", 39 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 50 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 60 …(IDQ) while the Microcode Sequencer (MS) is busy. Counting includes uops that may bypass the IDQ.", 71 …(IDQ) while the Microcode Sequencer (MS) is busy. Counting includes uops that may bypass the IDQ.", 83 …(DSB) while the Microcode Sequencer (MS) is busy. Counting includes uops that may bypass the IDQ.", 94 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 105 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", [all …]
|
| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/broadwellde/ |
| D | frontend.json | 8 …e uops being delivered to the Alloc stage since uops can be delivered by bypass skipping the Instr… 18 …n Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also… 29 …nstruction Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ.", 39 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 50 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 60 …(IDQ) while the Microcode Sequencer (MS) is busy. Counting includes uops that may bypass the IDQ.", 71 …(IDQ) while the Microcode Sequencer (MS) is busy. Counting includes uops that may bypass the IDQ.", 83 …(DSB) while the Microcode Sequencer (MS) is busy. Counting includes uops that may bypass the IDQ.", 94 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", 105 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.", [all …]
|
| /kernel/linux/linux-5.10/include/trace/events/ |
| D | bcache.h | 124 TP_PROTO(struct bio *bio, bool hit, bool bypass), 125 TP_ARGS(bio, hit, bypass), 133 __field(bool, bypass ) 142 __entry->bypass = bypass; 145 TP_printk("%d,%d %s %llu + %u hit %u bypass %u", 148 __entry->nr_sector, __entry->cache_hit, __entry->bypass) 153 bool writeback, bool bypass), 154 TP_ARGS(c, inode, bio, writeback, bypass), 163 __field(bool, bypass ) 173 __entry->bypass = bypass; [all …]
|