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Searched +full:ce4100 +full:- +full:lapic (Results 1 – 7 of 7) sorted by relevance

/kernel/linux/linux-6.6/Documentation/devicetree/bindings/interrupt-controller/
Dintel,ce4100-lapic.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/intel,ce4100-lapic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Intel Local Advanced Programmable Interrupt Controller (LAPIC)
10 - Rahul Tanwar <rtanwar@maxlinear.com>
15 architecture design, with a local component (LAPIC) integrated
17 (lapic) receives interrupts from the processor's interrupt pins,
22 Many of the Intel's generic devices like hpet, ioapic, lapic have
23 the ce4100 name in their compatible property names because they
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Dintel,ce4100-ioapic.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/intel,ce4100-ioapic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rahul Tanwar <rtanwar@maxlinear.com>
15 architecture design, with a local component (LAPIC) integrated
17 (lapic) receives interrupts from the processor's interrupt pins,
22 Many of the Intel's generic devices like hpet, ioapic, lapic have
23 the ce4100 name in their compatible property names because they
24 first appeared in CE4100 SoC.
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/kernel/linux/linux-5.10/arch/x86/platform/ce4100/
Dfalconfalls.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * CE4100 on Falcon Falls
7 /dts-v1/;
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "intel,ce4100";
22 lapic = <&lapic0>;
27 #address-cells = <1>;
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/kernel/linux/linux-6.6/arch/x86/platform/ce4100/
Dfalconfalls.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * CE4100 on Falcon Falls
7 /dts-v1/;
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "intel,ce4100";
22 lapic = <&lapic0>;
27 #address-cells = <1>;
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Dintel,ce4100-ioapic.txt2 ---------------
7 --------------------
8 compatible = "intel,ce4100-ioapic";
9 #interrupt-cells = <2>;
18 0 - Edge Rising
19 1 - Level Low
20 2 - Level High
21 3 - Edge Falling
26 compatible = "intel,ce4100-lapic";
/kernel/linux/linux-6.6/arch/x86/kernel/
Ddevicetree.c1 // SPDX-License-Identifier: GPL-2.0
40 * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
43 { .compatible = "intel,ce4100-cp", },
67 prop = of_get_property(np, "bus-range", NULL); in pcibios_get_phb_of_node()
71 if (bus->number == bus_min) in pcibios_get_phb_of_node()
91 return -EINVAL; in x86_of_pci_irq_enable()
92 dev->irq = virq; in x86_of_pci_irq_enable()
114 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet"); in dtb_setup_hpet()
150 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic"); in dtb_lapic_setup()
167 pic_mode = !of_property_read_bool(dn, "intel,virtual-wire-mode"); in dtb_lapic_setup()
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/kernel/linux/linux-5.10/arch/x86/kernel/
Ddevicetree.c1 // SPDX-License-Identifier: GPL-2.0
50 * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
53 { .compatible = "intel,ce4100-cp", },
77 prop = of_get_property(np, "bus-range", NULL); in pcibios_get_phb_of_node()
81 if (bus->number == bus_min) in pcibios_get_phb_of_node()
101 return -EINVAL; in x86_of_pci_irq_enable()
102 dev->irq = virq; in x86_of_pci_irq_enable()
124 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet"); in dtb_setup_hpet()
162 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic"); in dtb_lapic_setup()
223 if (WARN_ON(fwspec->param_count < 2)) in dt_irqdomain_alloc()
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