| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | lbc.txt | 1 * Chipselect/Local Bus
6 chipselect number, and the remaining cells are the
7 offset into the chipselect.
8 - #size-cells : Either one or two, depending on how large each chipselect
10 - ranges : Each range corresponds to a single chipselect, and cover
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | lbc.txt | 1 * Chipselect/Local Bus
6 chipselect number, and the remaining cells are the
7 offset into the chipselect.
8 - #size-cells : Either one or two, depending on how large each chipselect
10 - ranges : Each range corresponds to a single chipselect, and cover
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/ |
| D | davinci-nand.txt | 20 - ti,davinci-chipselect: number of chipselect. Indicates on the
21 davinci_nand driver which chipselect is used
39 - ti,davinci-mask-chipsel: mask for chipselect address. Needed to mask
40 addresses for given chipselect.
82 ti,davinci-chipselect = <1>;
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/ |
| D | davinci-nand.txt | 20 - ti,davinci-chipselect: number of chipselect. Indicates on the
21 davinci_nand driver which chipselect is used
39 - ti,davinci-mask-chipsel: mask for chipselect address. Needed to mask
40 addresses for given chipselect.
82 ti,davinci-chipselect = <1>;
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| /kernel/linux/linux-6.6/drivers/spi/ |
| D | spi-xcomm.c | 36 uint16_t chipselect; member
53 put_unaligned_be16(spi_xcomm->chipselect, &buf[3]); in spi_xcomm_sync_config()
62 uint16_t chipselect = spi_xcomm->chipselect; in spi_xcomm_chipselect() local
65 chipselect |= BIT(cs); in spi_xcomm_chipselect()
67 chipselect &= ~BIT(cs); in spi_xcomm_chipselect()
69 spi_xcomm->chipselect = chipselect; in spi_xcomm_chipselect()
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| D | spi-bitbang-txrx.h | 6 * - GPIO/parport bitbangers. Provide chipselect() and txrx_word[](),
10 * chipselect() and txrx_word[](), with custom setup()/cleanup() methods
11 * that use your controller's clock and chipselect registers.
16 * duplex (MicroWire) controllers. Provide chipselect() and txrx_bufs(),
|
| /kernel/linux/linux-5.10/drivers/spi/ |
| D | spi-xcomm.c | 36 uint16_t chipselect; member
53 put_unaligned_be16(spi_xcomm->chipselect, &buf[3]); in spi_xcomm_sync_config()
62 uint16_t chipselect = spi_xcomm->chipselect; in spi_xcomm_chipselect() local
65 chipselect |= BIT(cs); in spi_xcomm_chipselect()
67 chipselect &= ~BIT(cs); in spi_xcomm_chipselect()
69 spi_xcomm->chipselect = chipselect; in spi_xcomm_chipselect()
|
| D | spi-bitbang-txrx.h | 6 * - GPIO/parport bitbangers. Provide chipselect() and txrx_word[](),
10 * chipselect() and txrx_word[](), with custom setup()/cleanup() methods
11 * that use your controller's clock and chipselect registers.
16 * duplex (MicroWire) controllers. Provide chipselect() and txrx_bufs(),
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/fsl/ |
| D | ifc.txt | 10 chipselect number, and the remaining cells are the
11 offset into the chipselect.
12 - #size-cells : Either one or two, depending on how large each chipselect
24 - ranges : Each range corresponds to a single chipselect, and covers
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/fsl/ |
| D | fsl,ifc.yaml | 29 Should be either two or three. The first cell is the chipselect
30 number, and the remaining cells are the offset into the chipselect.
35 Either one or two, depending on how large each chipselect can be.
57 Each range corresponds to a single chipselect, and covers the entire
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/adc/ |
| D | renesas,gyroadc.txt | 3 The GyroADC block is a reduced SPI block with up to 8 chipselect lines,
38 MB88101A is required. The Cx chipselect lines of the
48 8 chips are required. A 3:8 chipselect demuxer is
57 8 chips are required. A 3:8 chipselect demuxer is
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/iio/adc/ |
| D | renesas,rcar-gyroadc.yaml | 13 The GyroADC block is a reduced SPI block with up to 8 chipselect lines,
72 operation, single MB88101A is required. The Cx chipselect lines
81 A 3:8 chipselect demuxer is required to connect the nCS line
89 A 3:8 chipselect demuxer is required to connect the nCS line
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| /kernel/linux/linux-5.10/drivers/mtd/nand/raw/ |
| D | hisi504_nand.c | 133 int chipselect; member
215 | ((host->chipselect & HINFC504_DMA_CTRL_CS_MASK) in hisi_nfc_dma_transfer()
289 | ((host->chipselect & HINFC504_OP_NF_CS_MASK) in hisi_nfc_send_cmd_erase()
308 | ((host->chipselect & HINFC504_OP_NF_CS_MASK) in hisi_nfc_send_cmd_readid()
323 | ((host->chipselect & HINFC504_OP_NF_CS_MASK) in hisi_nfc_send_cmd_status()
332 static int hisi_nfc_send_cmd_reset(struct hinfc_host *host, int chipselect) in hisi_nfc_send_cmd_reset() argument
337 | ((chipselect & HINFC504_OP_NF_CS_MASK) in hisi_nfc_send_cmd_reset()
347 static void hisi_nfc_select_chip(struct nand_chip *chip, int chipselect) in hisi_nfc_select_chip() argument
351 if (chipselect < 0) in hisi_nfc_select_chip()
354 host->chipselect = chipselect; in hisi_nfc_select_chip()
[all …]
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| /kernel/linux/linux-6.6/drivers/mtd/nand/raw/ |
| D | hisi504_nand.c | 133 int chipselect; member
215 | ((host->chipselect & HINFC504_DMA_CTRL_CS_MASK) in hisi_nfc_dma_transfer()
289 | ((host->chipselect & HINFC504_OP_NF_CS_MASK) in hisi_nfc_send_cmd_erase()
308 | ((host->chipselect & HINFC504_OP_NF_CS_MASK) in hisi_nfc_send_cmd_readid()
323 | ((host->chipselect & HINFC504_OP_NF_CS_MASK) in hisi_nfc_send_cmd_status()
332 static int hisi_nfc_send_cmd_reset(struct hinfc_host *host, int chipselect) in hisi_nfc_send_cmd_reset() argument
337 | ((chipselect & HINFC504_OP_NF_CS_MASK) in hisi_nfc_send_cmd_reset()
347 static void hisi_nfc_select_chip(struct nand_chip *chip, int chipselect) in hisi_nfc_select_chip() argument
351 if (chipselect < 0) in hisi_nfc_select_chip()
354 host->chipselect = chipselect; in hisi_nfc_select_chip()
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpio/ |
| D | spear_spics.txt | 5 PL022 control. If chipselect remain under PL022 control then they would be
12 directly control each PL022 chipselect. Hence, it is natural for SPEAr to export
21 * st-spics,cs-value-bit: bit offset to drive chipselect low or high
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/gpio/ |
| D | spear_spics.txt | 5 PL022 control. If chipselect remain under PL022 control then they would be
12 directly control each PL022 chipselect. Hence, it is natural for SPEAr to export
21 * st-spics,cs-value-bit: bit offset to drive chipselect low or high
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/rtc/ |
| D | nxp,rtc-2123.txt | 6 - reg: should be the SPI slave chipselect address
9 - spi-cs-high: PCF2123 needs chipselect high
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/rtc/ |
| D | nxp,rtc-2123.txt | 6 - reg: should be the SPI slave chipselect address
9 - spi-cs-high: PCF2123 needs chipselect high
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/ |
| D | ti-aemif.txt | 73 - ti,cs-chipselect: number of chipselect. Indicates on the aemif driver
74 which chipselect is used for accessing the memory. For
163 ti,cs-chipselect = <2>;
192 ti,cs-chipselect = <0>;
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/ |
| D | ti-aemif.txt | 73 - ti,cs-chipselect: number of chipselect. Indicates on the aemif driver
74 which chipselect is used for accessing the memory. For
163 ti,cs-chipselect = <2>;
192 ti,cs-chipselect = <0>;
|
| /kernel/linux/linux-6.6/drivers/gpio/ |
| D | gpio-spear-spics.c | 3 * SPEAr platform SPI chipselect abstraction over gpiolib
25 * It provides control for spi chip select lines so that any chipselect
35 * @cs_value_bit: bit to program high or low chipselect
36 * @cs_enable_mask: mask to select bits required to select chipselect
|
| /kernel/linux/linux-5.10/drivers/gpio/ |
| D | gpio-spear-spics.c | 2 * SPEAr platform SPI chipselect abstraction over gpiolib
28 * It provides control for spi chip select lines so that any chipselect
38 * @cs_value_bit: bit to program high or low chipselect
39 * @cs_enable_mask: mask to select bits required to select chipselect
|
| /kernel/linux/linux-5.10/arch/mips/bcm63xx/ |
| D | cs.c | 32 * Configure chipselect base address and size (bytes).
64 * configure chipselect timing (ns)
92 * configure other chipselect parameter (data bus size, ...)
|
| /kernel/linux/linux-6.6/arch/mips/bcm63xx/ |
| D | cs.c | 32 * Configure chipselect base address and size (bytes).
64 * configure chipselect timing (ns)
92 * configure other chipselect parameter (data bus size, ...)
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-mcp23s08.txt | 26 SPI uses this to specify the chipselect line which the chip is
28 multiple chips on the same chipselect. Have a look at
35 SPI chipselect. Set a bit in bit0-7 in this mask to 1 if there is a
39 possible to mix mcp23s08 and mcp23s17 on the same chipselect. Set at
|