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/kernel/linux/linux-5.10/Documentation/userspace-api/media/cec/
Dcec-pin-error-inj.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
7 has low-level support for the CEC bus. Most hardware today will have
8 high-level CEC support where the hardware deals with driving the CEC bus,
17 Currently only the cec-gpio driver (when the CEC line is directly
18 connected to a pull-up GPIO line) and the AllWinner A10/A20 drm driver
23 now an ``error-inj`` file.
30 With ``cat error-inj`` you can see both the possible commands and the current
33 $ cat /sys/kernel/debug/cec/cec0/error-inj
34 # Clear error injections:
35 # clear clear all rx and tx error injections
[all …]
/kernel/linux/linux-6.6/Documentation/userspace-api/media/cec/
Dcec-pin-error-inj.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
9 has low-level support for the CEC bus. Most hardware today will have
10 high-level CEC support where the hardware deals with driving the CEC bus,
19 Currently only the cec-gpio driver (when the CEC line is directly
20 connected to a pull-up GPIO line) and the AllWinner A10/A20 drm driver
25 now an ``error-inj`` file.
32 With ``cat error-inj`` you can see both the possible commands and the current
35 $ cat /sys/kernel/debug/cec/cec0/error-inj
36 # Clear error injections:
37 # clear clear all rx and tx error injections
[all …]
/kernel/linux/linux-6.6/fs/ntfs/
Dbitmap.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * bitmap.h - Defines for NTFS kernel bitmap handling. Part of the Linux-NTFS
22 * ntfs_bitmap_set_bits_in_run - set a run of bits in a bitmap to a value
24 * @start_bit: first bit to set
28 * Set @count bits starting at bit @start_bit in the bitmap described by the
31 * Return 0 on success and -errno on error.
41 * ntfs_bitmap_set_run - set a run of bits in a bitmap
43 * @start_bit: first bit to set
46 * Set @count bits starting at bit @start_bit in the bitmap described by the
49 * Return 0 on success and -errno on error.
[all …]
/kernel/linux/linux-5.10/fs/ntfs/
Dbitmap.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * bitmap.h - Defines for NTFS kernel bitmap handling. Part of the Linux-NTFS
22 * ntfs_bitmap_set_bits_in_run - set a run of bits in a bitmap to a value
24 * @start_bit: first bit to set
28 * Set @count bits starting at bit @start_bit in the bitmap described by the
31 * Return 0 on success and -errno on error.
41 * ntfs_bitmap_set_run - set a run of bits in a bitmap
43 * @start_bit: first bit to set
46 * Set @count bits starting at bit @start_bit in the bitmap described by the
49 * Return 0 on success and -errno on error.
[all …]
/kernel/linux/linux-5.10/drivers/media/cec/core/
Dcec-pin-error-inj.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <media/cec-pin.h>
11 #include "cec-pin-priv.h"
20 { CEC_ERROR_INJ_RX_NACK_OFFSET, -1, "rx-nack" },
22 CEC_ERROR_INJ_RX_LOW_DRIVE_ARG_IDX, "rx-low-drive" },
23 { CEC_ERROR_INJ_RX_ADD_BYTE_OFFSET, -1, "rx-add-byte" },
24 { CEC_ERROR_INJ_RX_REMOVE_BYTE_OFFSET, -1, "rx-remove-byte" },
26 CEC_ERROR_INJ_RX_ARB_LOST_ARG_IDX, "rx-arb-lost" },
28 { CEC_ERROR_INJ_TX_NO_EOM_OFFSET, -1, "tx-no-eom" },
29 { CEC_ERROR_INJ_TX_EARLY_EOM_OFFSET, -1, "tx-early-eom" },
[all …]
/kernel/linux/linux-6.6/drivers/media/cec/core/
Dcec-pin-error-inj.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <media/cec-pin.h>
11 #include "cec-pin-priv.h"
20 { CEC_ERROR_INJ_RX_NACK_OFFSET, -1, "rx-nack" },
22 CEC_ERROR_INJ_RX_LOW_DRIVE_ARG_IDX, "rx-low-drive" },
23 { CEC_ERROR_INJ_RX_ADD_BYTE_OFFSET, -1, "rx-add-byte" },
24 { CEC_ERROR_INJ_RX_REMOVE_BYTE_OFFSET, -1, "rx-remove-byte" },
26 CEC_ERROR_INJ_RX_ARB_LOST_ARG_IDX, "rx-arb-lost" },
28 { CEC_ERROR_INJ_TX_NO_EOM_OFFSET, -1, "tx-no-eom" },
29 { CEC_ERROR_INJ_TX_EARLY_EOM_OFFSET, -1, "tx-early-eom" },
[all …]
/kernel/liteos_m/arch/risc-v/nuclei/gcc/nmsis/Core/Include/
Dcore_feature_timer.h4 * SPDX-License-Identifier: Apache-2.0
10 * www.apache.org/licenses/LICENSE-2.0
48 * - MSFTRST register is introduced in Nuclei N Core version 1.3(\ref __NUCLEI_N_REV >= 0x0103)
49 …* - MSTOP register is renamed to MTIMECTL register in Nuclei N Core version 1.4(\ref __NUCLEI_N_RE…
50 …* - CMPCLREN and CLKSRC bit in MTIMECTL register is introduced in Nuclei N Core version 1.4(\ref _…
55 __IOM uint32_t RESERVED0[0x3F8]; /*!< Offset: 0x010 - 0xFEC Reserved */
63 … 0U /*!< SysTick Timer MTIMECTL: TIMESTOP bit Position */
65 … 1U /*!< SysTick Timer MTIMECTL: CMPCLREN bit Position */
67 … 2U /*!< SysTick Timer MTIMECTL: CLKSRC bit Position */
70 … 0U /*!< SysTick Timer MSIP: MSIP bit Position */
[all …]
/kernel/linux/linux-5.10/include/uapi/linux/
Dpps.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
5 * Copyright (C) 2005-2009 Rodolfo Giometti <giometti@linux.it>
31 /* Implementation note: the logical states ``assert'' and ``clear''
33 * means the bit is set. */
43 /* 32-bit vs. 64-bit compatibility.
69 __u32 clear_sequence; /* seq. num. of clear event */
71 struct pps_ktime clear_tu; /* time of clear event */
77 __u32 clear_sequence; /* seq. num. of clear event */
79 struct pps_ktime_compat clear_tu; /* time of clear event */
87 struct pps_ktime clear_off_tu; /* offset compensation for clear */
[all …]
/kernel/linux/linux-6.6/include/uapi/linux/
Dpps.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
5 * Copyright (C) 2005-2009 Rodolfo Giometti <giometti@linux.it>
31 /* Implementation note: the logical states ``assert'' and ``clear''
33 * means the bit is set. */
43 /* 32-bit vs. 64-bit compatibility.
69 __u32 clear_sequence; /* seq. num. of clear event */
71 struct pps_ktime clear_tu; /* time of clear event */
77 __u32 clear_sequence; /* seq. num. of clear event */
79 struct pps_ktime_compat clear_tu; /* time of clear event */
87 struct pps_ktime clear_off_tu; /* offset compensation for clear */
[all …]
/kernel/linux/linux-5.10/include/linux/
Dwait_bit.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Linux wait-bit related types and methods:
21 #define __WAIT_BIT_KEY_INITIALIZER(word, bit) \ argument
22 { .flags = word, .bit_nr = bit, }
26 void __wake_up_bit(struct wait_queue_head *wq_head, void *word, int bit);
29 void wake_up_bit(void *word, int bit);
33 struct wait_queue_head *bit_waitqueue(void *word, int bit);
38 #define DEFINE_WAIT_BIT(name, word, bit) \ argument
40 .key = __WAIT_BIT_KEY_INITIALIZER(word, bit), \
55 * wait_on_bit - wait for a bit to be cleared
[all …]
/kernel/linux/linux-6.6/include/linux/
Dwait_bit.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Linux wait-bit related types and methods:
21 #define __WAIT_BIT_KEY_INITIALIZER(word, bit) \ argument
22 { .flags = word, .bit_nr = bit, }
26 void __wake_up_bit(struct wait_queue_head *wq_head, void *word, int bit);
29 void wake_up_bit(void *word, int bit);
33 struct wait_queue_head *bit_waitqueue(void *word, int bit);
38 #define DEFINE_WAIT_BIT(name, word, bit) \ argument
40 .key = __WAIT_BIT_KEY_INITIALIZER(word, bit), \
55 * wait_on_bit - wait for a bit to be cleared
[all …]
/kernel/linux/linux-5.10/arch/powerpc/mm/book3s32/
Dhash_low.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
8 * Low-level exception handlers and MMU support
12 * This file contains low-level assembler routines for managing
24 #include <asm/asm-offsets.h>
26 #include <asm/feature-fixups.h>
27 #include <asm/code-patching-asm.h>
40 * r9 contains the SRR1 value, from which we use the MSR_PR bit.
46 * Uses r0, r3 - r6, r8, r10, ctr, lr.
51 lis r8, (mmu_hash_lock - PAGE_OFFSET)@h
[all …]
/kernel/linux/linux-6.6/include/asm-generic/bitops/
Dinstrumented-lock.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * This file provides wrappers with sanitizer instrumentation for bit
8 * the below bit operations with an arch_ prefix (e.g. arch_set_bit(),
17 * clear_bit_unlock - Clear a bit in memory, for unlock
18 * @nr: the bit to set
31 * __clear_bit_unlock - Clears a bit in memory
32 * @nr: Bit to clear
35 * This is a non-atomic operation but implies a release barrier before the
47 * test_and_set_bit_lock - Set a bit and return its old value, for lock
48 * @nr: Bit to set
[all …]
Dlock.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 * arch_test_and_set_bit_lock - Set a bit and return its old value, for lock
11 * @nr: Bit to set
16 * It can be used to implement bit locks.
34 * arch_clear_bit_unlock - Clear a bit in memory, for unlock
35 * @nr: the bit to set
48 * arch___clear_bit_unlock - Clear a bit in memory, for unlock
49 * @nr: the bit to set
70 * arch_clear_bit_unlock_is_negative_byte - Clear a bit in memory and test if bottom
72 * @nr: the bit to clear
[all …]
/kernel/linux/linux-5.10/include/asm-generic/bitops/
Dinstrumented-lock.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * This file provides wrappers with sanitizer instrumentation for bit
8 * the below bit operations with an arch_ prefix (e.g. arch_set_bit(),
17 * clear_bit_unlock - Clear a bit in memory, for unlock
18 * @nr: the bit to set
30 * __clear_bit_unlock - Clears a bit in memory
31 * @nr: Bit to clear
34 * This is a non-atomic operation but implies a release barrier before the
45 * test_and_set_bit_lock - Set a bit and return its old value, for lock
46 * @nr: Bit to set
[all …]
Dlock.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 * test_and_set_bit_lock - Set a bit and return its old value, for lock
11 * @nr: Bit to set
16 * It can be used to implement bit locks.
34 * clear_bit_unlock - Clear a bit in memory, for unlock
35 * @nr: the bit to set
47 * __clear_bit_unlock - Clear a bit in memory, for unlock
48 * @nr: the bit to set
69 * clear_bit_unlock_is_negative_byte - Clear a bit in memory and test if bottom
71 * @nr: the bit to clear
[all …]
/kernel/linux/linux-6.6/arch/powerpc/mm/book3s32/
Dhash_low.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
8 * Low-level exception handlers and MMU support
12 * This file contains low-level assembler routines for managing
25 #include <asm/asm-offsets.h>
26 #include <asm/feature-fixups.h>
27 #include <asm/code-patching-asm.h>
41 * r9 contains the SRR1 value, from which we use the MSR_PR bit.
47 * Uses r0, r3 - r6, r8, r10, ctr, lr.
52 lis r8, (mmu_hash_lock - PAGE_OFFSET)@h
[all …]
/kernel/linux/linux-6.6/arch/m68k/fpsp040/
Dround.S21 | round --- round result according to precision/mode
36 | a0 is preserved and the g-r-s bits in d0 are cleared.
37 | The result is not typed - the tag field is invalid. The
40 | The INEX bit of USER_FPSR will be set if the rounded result was
41 | inexact (i.e. if any of the g-r-s bits were set).
51 | ;the appropriate g-r-s bits.
112 | If (g=1), then add 1 to l and if (r=s=0), then clear l
117 asll #1,%d0 |shift g-bit to c-bit
124 | ext_grs --- extract guard, round and sticky bits
144 moveml %d2/%d3,-(%a7) |make some temp registers
[all …]
/kernel/linux/linux-5.10/arch/m68k/fpsp040/
Dround.S21 | round --- round result according to precision/mode
36 | a0 is preserved and the g-r-s bits in d0 are cleared.
37 | The result is not typed - the tag field is invalid. The
40 | The INEX bit of USER_FPSR will be set if the rounded result was
41 | inexact (i.e. if any of the g-r-s bits were set).
51 | ;the appropriate g-r-s bits.
112 | If (g=1), then add 1 to l and if (r=s=0), then clear l
117 asll #1,%d0 |shift g-bit to c-bit
124 | ext_grs --- extract guard, round and sticky bits
144 moveml %d2/%d3,-(%a7) |make some temp registers
[all …]
/kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh3/
Dserial-sh7720.c1 // SPDX-License-Identifier: GPL-2.0
14 if (port->mapbase == 0xa4430000) { /* SCIF0 */ in sh7720_sci_init_pins()
15 /* Clear PTCR bit 9-2; enable all scif pins but sck */ in sh7720_sci_init_pins()
18 } else if (port->mapbase == 0xa4438000) { /* SCIF1 */ in sh7720_sci_init_pins()
19 /* Clear PVCR bit 9-2 */ in sh7720_sci_init_pins()
24 if (port->mapbase == 0xa4430000) { /* SCIF0 */ in sh7720_sci_init_pins()
25 /* Clear PTCR bit 5-2; enable only tx and rx */ in sh7720_sci_init_pins()
28 } else if (port->mapbase == 0xa4438000) { /* SCIF1 */ in sh7720_sci_init_pins()
29 /* Clear PVCR bit 5-2 */ in sh7720_sci_init_pins()
/kernel/linux/linux-6.6/arch/sh/kernel/cpu/sh3/
Dserial-sh7720.c1 // SPDX-License-Identifier: GPL-2.0
14 if (port->mapbase == 0xa4430000) { /* SCIF0 */ in sh7720_sci_init_pins()
15 /* Clear PTCR bit 9-2; enable all scif pins but sck */ in sh7720_sci_init_pins()
18 } else if (port->mapbase == 0xa4438000) { /* SCIF1 */ in sh7720_sci_init_pins()
19 /* Clear PVCR bit 9-2 */ in sh7720_sci_init_pins()
24 if (port->mapbase == 0xa4430000) { /* SCIF0 */ in sh7720_sci_init_pins()
25 /* Clear PTCR bit 5-2; enable only tx and rx */ in sh7720_sci_init_pins()
28 } else if (port->mapbase == 0xa4438000) { /* SCIF1 */ in sh7720_sci_init_pins()
29 /* Clear PVCR bit 5-2 */ in sh7720_sci_init_pins()
/kernel/linux/linux-6.6/arch/ia64/include/asm/
Dbitops.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Copyright (C) 1998-2003 Hewlett-Packard Co
7 * David Mosberger-Tang <davidm@hpl.hp.com>
23 * set_bit - Atomically set a bit in memory
24 * @nr: the bit to set
30 * restricted to acting on a single-word quantity.
34 * operate on hw-defined data-structures, so we can't easily change these
37 * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
42 __u32 bit, old, new; in set_bit() local
47 bit = 1 << (nr & 31); in set_bit()
[all …]
/kernel/linux/linux-5.10/arch/ia64/include/asm/
Dbitops.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Copyright (C) 1998-2003 Hewlett-Packard Co
7 * David Mosberger-Tang <davidm@hpl.hp.com>
23 * set_bit - Atomically set a bit in memory
24 * @nr: the bit to set
30 * restricted to acting on a single-word quantity.
34 * operate on hw-defined data-structures, so we can't easily change these
37 * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
42 __u32 bit, old, new; in set_bit() local
47 bit = 1 << (nr & 31); in set_bit()
[all …]
/kernel/linux/linux-6.6/arch/powerpc/kernel/
Dcpu_setup_ppc970.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 #include <asm/asm-offsets.h>
21 * pages are enabled with HID4:61 and clear HID5:DCBZ_size and
26 rldimi r3,r0,40,23 /* clear bit 23 (rm_ci) */
27 rldimi r3,r0,2,61 /* clear bit 61 (lg_pg_en) */
33 rldimi r3,r0,6,56 /* clear bits 56 & 57 (DCBZ*) */
41 li r3,0x1200 /* enable i-fetch cacheability */
48 /* Clear HIOR */
51 mtspr SPRN_HIOR,0 /* Clear interrupt prefix */
77 li r11,5 /* clear DOZE and SLEEP */
[all …]
/kernel/linux/linux-5.10/arch/powerpc/kernel/
Dcpu_setup_ppc970.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 #include <asm/asm-offsets.h>
21 * pages are enabled with HID4:61 and clear HID5:DCBZ_size and
26 rldimi r3,r0,40,23 /* clear bit 23 (rm_ci) */
27 rldimi r3,r0,2,61 /* clear bit 61 (lg_pg_en) */
33 rldimi r3,r0,6,56 /* clear bits 56 & 57 (DCBZ*) */
41 li r3,0x1200 /* enable i-fetch cacheability */
48 /* Clear HIOR */
51 mtspr SPRN_HIOR,0 /* Clear interrupt prefix */
77 li r11,5 /* clear DOZE and SLEEP */
[all …]

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