Searched +full:clk +full:- +full:phase +full:- +full:sd +full:- +full:hs (Results 1 – 25 of 27) sorted by relevance
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| /kernel/linux/linux-6.6/drivers/mmc/core/ |
| D | host.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * Copyright (C) 2007-2008 Pierre Ossman 25 #include <linux/mmc/slot-gpio.h> 30 #include "slot-gpio.h" 47 if (!host->bus_ops) in mmc_host_class_prepare() 51 if (host->bus_ops->pre_suspend) in mmc_host_class_prepare() 52 return host->bus_ops->pre_suspend(host); in mmc_host_class_prepare() 77 wakeup_source_unregister(host->ws); in mmc_host_classdev_release() 78 if (of_alias_get_id(host->parent->of_node, "mmc") < 0) in mmc_host_classdev_release() 79 ida_simple_remove(&mmc_host_ida, host->index); in mmc_host_classdev_release() [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/ |
| D | mmc-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ulf Hansson <ulf.hansson@linaro.org> 25 "#address-cells": 30 "#size-cells": 37 broken-cd: 42 cd-gpios: 46 non-removable: [all …]
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| D | arasan,sdhci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 10 - Adrian Hunter <adrian.hunter@intel.com> 13 - $ref: "mmc-controller.yaml#" 14 - if: 18 const: arasan,sdhci-5.1 21 - phys 22 - phy-names 23 - if: [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/intel/socfpga/ |
| D | socfpga_arria10_socdk_sdmmc.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2014-2015 Altera Corporation <www.altera.com> 6 /dts-v1/; 11 cap-sd-highspeed; 12 cap-mmc-highspeed; 13 broken-cd; 14 bus-width = <4>; 15 clk-phase-sd-hs = <0>, <135>; 19 sdmmca-ecc@ff8c2c00 { 20 compatible = "altr,socfpga-sdmmc-ecc"; [all …]
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| D | socfpga_arria5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 16 clock-frequency = <25000000>; 22 broken-cd; 23 bus-width = <4>; 24 cap-mmc-highspeed; 25 cap-sd-highspeed; 26 clk-phase-sd-hs = <0>, <135>; 30 cpu1-start-addr = <0xffd080c4>;
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| D | socfpga_cyclone5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 /dts-v1/; 16 clock-frequency = <25000000>; 22 broken-cd; 23 bus-width = <4>; 24 cap-mmc-highspeed; 25 cap-sd-highspeed; 26 clk-phase-sd-hs = <0>, <135>; 30 cpu1-start-addr = <0xffd080c4>;
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| D | socfpga_cyclone5_mcv.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 10 compatible = "altr,socfpga-cyclone5", "altr,socfpga"; 19 &mmc0 { /* On-SoM eMMC */ 20 bus-width = <8>; 21 clk-phase-sd-hs = <0>, <135>;
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| D | socfpga_arria10_mercury_aa1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 11 compatible = "enclustra,mercury-aa1", "altr,socfpga-arria10", "altr,socfpga"; 25 stdout-path = "serial1:115200n8"; 30 phy-mode = "rgmii"; 31 phy-addr = <0xffffffff>; /* probe for phy addr */ 33 max-frame-size = <3800>; 35 phy-handle = <&phy3>; 38 #address-cells = <1>; 39 #size-cells = <0>; 40 compatible = "snps,dwmac-mdio"; [all …]
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| /kernel/linux/linux-6.6/drivers/mmc/host/ |
| D | dw_mmc-pltfm.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 20 #include <linux/mfd/altera-sysmgr.h> 24 #include "dw_mmc-pltfm.h" 36 host = devm_kzalloc(&pdev->dev, sizeof(struct dw_mci), GFP_KERNEL); in dw_mci_pltfm_register() 38 return -ENOMEM; in dw_mci_pltfm_register() 40 host->irq = platform_get_irq(pdev, 0); in dw_mci_pltfm_register() 41 if (host->irq < 0) in dw_mci_pltfm_register() 42 return host->irq; in dw_mci_pltfm_register() 44 host->drv_data = drv_data; in dw_mci_pltfm_register() 45 host->dev = &pdev->dev; in dw_mci_pltfm_register() [all …]
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| D | sdhci-of-arasan.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 4 * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu> 9 * Based on sdhci-of-esdhc.c 18 #include <linux/clk-provider.h> 26 #include <linux/firmware/xlnx-zynqmp.h> 29 #include "sdhci-cqhci.h" 30 #include "sdhci-pltfm.h" 92 * On some SoCs the syscon area has a feature where the upper 16-bits of 93 * each 32-bit register act as a write mask for the lower 16-bits. This allows 101 * struct sdhci_arasan_soc_ctl_field - Field used in sdhci_arasan_soc_ctl_map [all …]
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| D | sdhci-msm.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * drivers/mmc/host/sdhci-msm.c - Qualcomm SDHCI Platform driver 5 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. 23 #include "sdhci-cqhci.h" 24 #include "sdhci-pltfm.h" 123 #define INVALID_TUNING_PHASE -1 140 /* Max load for eMMC Vdd-io supply */ 143 /* Max load for SD Vdd supply */ 146 /* Max load for SD Vdd-io supply */ 150 msm_host->var_ops->msm_readl_relaxed(host, offset) [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/aspeed/ |
| D | aspeed-ast2600-evb.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 4 /dts-v1/; 6 #include "aspeed-g6.dtsi" 7 #include <dt-bindings/gpio/aspeed-gpio.h> 11 compatible = "aspeed,ast2600-evb", "aspeed,ast2600"; 26 reserved-memory { 27 #address-cells = <1>; 28 #size-cells = <1>; 34 compatible = "shared-dma-pool"; 41 compatible = "shared-dma-pool"; [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/ |
| D | mmc-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ulf Hansson <ulf.hansson@linaro.org> 25 "#address-cells": 30 "#size-cells": 37 broken-cd: 42 cd-gpios: 47 non-removable: [all …]
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| D | arasan,sdhci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Adrian Hunter <adrian.hunter@intel.com> 13 - $ref: mmc-controller.yaml# 14 - if: 18 const: arasan,sdhci-5.1 21 - phys 22 - phy-names 23 - if: [all …]
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| /kernel/linux/linux-5.10/drivers/mmc/host/ |
| D | sdhci-of-arasan.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 4 * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu> 9 * Based on sdhci-of-esdhc.c 18 #include <linux/clk-provider.h> 25 #include <linux/firmware/xlnx-zynqmp.h> 28 #include "sdhci-cqhci.h" 29 #include "sdhci-pltfm.h" 56 * On some SoCs the syscon area has a feature where the upper 16-bits of 57 * each 32-bit register act as a write mask for the lower 16-bits. This allows 65 * struct sdhci_arasan_soc_ctl_field - Field used in sdhci_arasan_soc_ctl_map [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/xilinx/ |
| D | zynqmp-sck-kv-g-revB.dtso | 1 // SPDX-License-Identifier: GPL-2.0 5 * (C) Copyright 2020 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/net/ti-dp83867.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 16 /dts-v1/; 20 si5332_0: si5332-0 { /* u17 */ 21 compatible = "fixed-clock"; [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/intel/ |
| D | socfpga_n5x_socdk.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 compatible = "intel,n5x-socdk", "intel,socfpga-agilex"; 19 stdout-path = "serial0:115200n8"; 29 sdram_edac: memory-controller@f87f8000 { 30 compatible = "snps,ddrc-3.80a"; 39 compatible = "intel,easic-n5x-clkmgr"; 44 phy-mode = "rgmii"; 45 phy-handle = <&phy0>; 47 max-frame-size = <9000>; 50 #address-cells = <1>; [all …]
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| D | socfpga_agilex_socdk.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 compatible = "intel,socfpga-agilex-socdk", "intel,socfpga-agilex"; 19 stdout-path = "serial0:115200n8"; 23 compatible = "gpio-leds"; 53 phy-mode = "rgmii"; 54 phy-handle = <&phy0>; 56 max-frame-size = <9000>; 59 #address-cells = <1>; 60 #size-cells = <0>; 61 compatible = "snps,dwmac-mdio"; [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/altera/ |
| D | socfpga_stratix10_socdk.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 10 compatible = "altr,socfpga-stratix10-socdk", "altr,socfpga-stratix10"; 20 stdout-path = "serial0:115200n8"; 24 compatible = "gpio-leds"; 25 led-hps0 { 30 led-hps1 { 35 led-hps2 { 47 ref_033v: regulator-v-ref { 48 compatible = "regulator-fixed"; 49 regulator-name = "0.33V"; [all …]
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| /kernel/linux/patches/linux-5.10/imx8mm_patch/patches/drivers/ |
| D | 0030_linux_drivers_pci_misc_nvmem_of_mtd_mmc.patch | 7 Change-Id: Iec160bd007994d82f416debdccfbc0d9bdb40470 9 diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig 11 --- a/drivers/misc/Kconfig 13 @@ -314,6 +314,26 @@ config ISL29020 40 diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile 42 --- a/drivers/misc/Makefile 44 @@ -19,6 +19,8 @@ obj-$(CONFIG_TIFM_7XX1) += tifm_7xx1.o 45 obj-$(CONFIG_PHANTOM) += phantom.o 46 obj-$(CONFIG_QCOM_COINCELL) += qcom-coincell.o 47 obj-$(CONFIG_QCOM_FASTRPC) += fastrpc.o [all …]
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| D | 0027_linux_drivers_media.patch | 7 Change-Id: I049bfa49539911e2f2699823b3f446166db22bbe 9 diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig 11 --- a/drivers/media/Kconfig 13 @@ -43,7 +43,7 @@ config MEDIA_SUBDRV_AUTOSELECT 17 - default y if MEDIA_SUPPORT_FILTER 20 By default, a media driver auto-selects all possible ancillary 22 diff --git a/drivers/media/i2c/ov5640.c b/drivers/media/i2c/ov5640.c 24 --- a/drivers/media/i2c/ov5640.c 26 @@ -98,7 +98,8 @@ 30 - OV5640_MODE_QCIF_176_144 = 0, [all …]
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| D | 0020_linux_drivers_gpu.patch | 7 Change-Id: Ie95ebc16d7424b75135df39b9e20893d1a5171d6 9 diff --git a/drivers/gpu/Makefile b/drivers/gpu/Makefile 11 --- a/drivers/gpu/Makefile 13 @@ -3,6 +3,7 @@ 16 obj-$(CONFIG_TEGRA_HOST1X) += host1x/ 17 +obj-y += imx/ 18 obj-y += drm/ vga/ 19 obj-$(CONFIG_IMX_IPUV3_CORE) += ipu-v3/ 20 obj-$(CONFIG_TRACE_GPU_MEM) += trace/ 21 diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile [all …]
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| /kernel/linux/patches/linux-5.10/hispark_taurus_patch/ |
| D | hispark_taurus.patch | 1 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig 3 --- a/arch/arm/Kconfig 5 @@ -322,7 +322,7 @@ config ARCH_MULTIPLATFORM 9 - select AUTO_ZRELADDR 14 @@ -650,6 +650,8 @@ source "arch/arm/mach-highbank/Kconfig" 16 source "arch/arm/mach-hisi/Kconfig" 18 +source "arch/arm/mach-hibvt/Kconfig" 20 source "arch/arm/mach-imx/Kconfig" 22 source "arch/arm/mach-integrator/Kconfig" 23 diff --git a/arch/arm/Makefile b/arch/arm/Makefile [all …]
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| /kernel/linux/linux-6.6/drivers/scsi/ |
| D | ncr53c8xx.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 ** Device driver for the PCI-SCSI NCR538XX controller family. 8 **----------------------------------------------------------------------------- 22 ** Stefan Esser <se@mi.Uni-Koeln.de> 27 **----------------------------------------------------------------------------- 38 ** Support for Fast-20 scsi. 42 ** Support for Fast-40 scsi. 43 ** Support for on-Board RAM. 46 ** Full support for scsi scripts instructions pre-fetching. 57 ** Low PCI traffic for command handling when on-chip RAM is present. [all …]
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| /kernel/linux/linux-5.10/drivers/scsi/ |
| D | ncr53c8xx.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 ** Device driver for the PCI-SCSI NCR538XX controller family. 8 **----------------------------------------------------------------------------- 22 ** Stefan Esser <se@mi.Uni-Koeln.de> 27 **----------------------------------------------------------------------------- 38 ** Support for Fast-20 scsi. 42 ** Support for Fast-40 scsi. 43 ** Support for on-Board RAM. 46 ** Full support for scsi scripts instructions pre-fetching. 57 ** Low PCI traffic for command handling when on-chip RAM is present. [all …]
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