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/kernel/linux/linux-5.10/include/linux/platform_data/
Dsi5351.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Si5351A/B/C programmable clock generator platform_data.
10 * enum si5351_pll_src - Si5351 pll clock source
12 * @SI5351_PLL_SRC_XTAL: pll source clock is XTAL input
13 * @SI5351_PLL_SRC_CLKIN: pll source clock is CLKIN input (Si5351C only)
22 * enum si5351_multisynth_src - Si5351 multisynth clock source
24 * @SI5351_MULTISYNTH_SRC_VCO0: multisynth source clock is VCO0
25 * @SI5351_MULTISYNTH_SRC_VCO1: multisynth source clock is VCO1/VXCO
34 * enum si5351_clkout_src - Si5351 clock output clock source
36 * @SI5351_CLKOUT_SRC_MSYNTH_N: clkout N source clock is multisynth N
[all …]
/kernel/linux/linux-6.6/include/linux/platform_data/
Dsi5351.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Si5351A/B/C programmable clock generator platform_data.
10 * enum si5351_pll_src - Si5351 pll clock source
12 * @SI5351_PLL_SRC_XTAL: pll source clock is XTAL input
13 * @SI5351_PLL_SRC_CLKIN: pll source clock is CLKIN input (Si5351C only)
22 * enum si5351_multisynth_src - Si5351 multisynth clock source
24 * @SI5351_MULTISYNTH_SRC_VCO0: multisynth source clock is VCO0
25 * @SI5351_MULTISYNTH_SRC_VCO1: multisynth source clock is VCO1/VXCO
34 * enum si5351_clkout_src - Si5351 clock output clock source
36 * @SI5351_CLKOUT_SRC_MSYNTH_N: clkout N source clock is multisynth N
[all …]
/kernel/linux/linux-6.6/drivers/clk/samsung/
Dclk-exynos-clkout.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Clock driver for Exynos clock output
11 #include <linux/clk-provider.h>
53 .compatible = "samsung,exynos3250-pmu",
56 .compatible = "samsung,exynos4210-pmu",
59 .compatible = "samsung,exynos4212-pmu",
62 .compatible = "samsung,exynos4412-pmu",
65 .compatible = "samsung,exynos5250-pmu",
68 .compatible = "samsung,exynos5410-pmu",
71 .compatible = "samsung,exynos5420-pmu",
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/kernel/linux/linux-5.10/drivers/clk/samsung/
Dclk-exynos-clkout.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Clock driver for Exynos clock output
11 #include <linux/clk-provider.h>
35 static struct exynos_clkout *clkout; variable
39 clkout->pmu_debug_save = readl(clkout->reg + EXYNOS_PMU_DEBUG_REG); in exynos_clkout_suspend()
46 writel(clkout->pmu_debug_save, clkout->reg + EXYNOS_PMU_DEBUG_REG); in exynos_clkout_resume()
62 clkout = kzalloc(struct_size(clkout, data.hws, EXYNOS_CLKOUT_NR_CLKS), in exynos_clkout_init()
64 if (!clkout) in exynos_clkout_init()
67 spin_lock_init(&clkout->slock); in exynos_clkout_init()
73 snprintf(name, sizeof(name), "clkout%d", i); in exynos_clkout_init()
[all …]
Dclk-s3c2410-dclk.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Common Clock Framework support for s3c24xx external clock output.
11 #include <linux/clk-provider.h>
14 #include <linux/platform_data/clk-s3c2410.h>
45 * Clock for output-parent selection in misccr
59 struct s3c24xx_clkout *clkout = to_s3c24xx_clkout(hw); in s3c24xx_clkout_get_parent() local
63 val = clkout->modify_misccr(0, 0) >> clkout->shift; in s3c24xx_clkout_get_parent()
64 val >>= clkout->shift; in s3c24xx_clkout_get_parent()
65 val &= clkout->mask; in s3c24xx_clkout_get_parent()
68 return -EINVAL; in s3c24xx_clkout_get_parent()
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/kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/
Ddm814x-clocks.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 * "2.6.11 Connected Outputs of DPLLJ". Only clkout is
10 #clock-cells = <1>;
11 compatible = "ti,dm814-adpll-s-clock";
14 clock-names = "clkinp", "clkinpulow", "clkinphif";
15 clock-output-names = "481c5040.adpll.dcoclkldo",
16 "481c5040.adpll.clkout",
22 #clock-cells = <1>;
23 compatible = "ti,dm814-adpll-lj-clock";
26 clock-names = "clkinp", "clkinpulow";
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Ddm814x-clocks.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 * "2.6.11 Connected Outputs of DPLLJ". Only clkout is
10 #clock-cells = <1>;
11 compatible = "ti,dm814-adpll-s-clock";
14 clock-names = "clkinp", "clkinpulow", "clkinphif";
15 clock-output-names = "481c5040.adpll.dcoclkldo",
16 "481c5040.adpll.clkout",
22 #clock-cells = <1>;
23 compatible = "ti,dm814-adpll-lj-clock";
26 clock-names = "clkinp", "clkinpulow";
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/adc/
Dst,stm32-dfsdm-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabrice Gasnier <fabrice.gasnier@st.com>
11 - Olivier Moysan <olivier.moysan@st.com>
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
17 - Sigma delta modulators (motor control, metering...)
18 - PDM microphones (audio digital microphone)
28 - st,stm32h7-dfsdm
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/iio/adc/
Dst,stm32-dfsdm-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
11 - Olivier Moysan <olivier.moysan@foss.st.com>
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
17 - Sigma delta modulators (motor control, metering...)
18 - PDM microphones (audio digital microphone)
28 - st,stm32h7-dfsdm
[all …]
/kernel/linux/linux-6.6/drivers/clk/
Dclk-lmk04832.c1 // SPDX-License-Identifier: GPL-2.0
3 * LMK04832 Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner
14 #include <linux/clk-provider.h>
22 /* 0x000 - 0x00d System Functions */
34 /* 0x100 - 0x137 Device Clock and SYSREF Clock Output Control */
75 /* 0x138 - 0x145 SYSREF, SYNC, and Device Config */
124 /* 0x146 - 0x14a CLKin Control */
134 /* 0x14b - 0x152 Holdover */
136 /* 0x153 - 0x15f PLL1 Configuration */
143 /* 0x160 - 0x16e PLL2 Configuration */
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Dclk-si5351.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * clk-si5351.c: Skyworks / Silicon Labs Si5351A/B/C I2C Clock Generator
6 * Rabeeh Khoury <rabeeh@solid-run.com>
10 * https://www.skyworksinc.com/-/media/Skyworks/SL/documents/public/data-sheets/Si5351-B.pdf
12 * https://www.skyworksinc.com/-/media/Skyworks/SL/documents/public/application-notes/AN619.pdf
18 #include <linux/clk-provider.h>
31 #include "clk-si5351.h"
63 struct si5351_hw_data *clkout; member
88 ret = regmap_read(drvdata->regmap, reg, &val); in si5351_reg_read()
90 dev_err(&drvdata->client->dev, in si5351_reg_read()
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Dti,lmk04832.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/ti,lmk04832.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments LMK04832 Clock Controller
10 - Liam Beguin <liambeguin@gmail.com>
13 Devicetree binding for the LMK04832, a clock conditioner with JEDEC JESD204B
21 - ti,lmk04832
26 '#address-cells':
29 '#size-cells':
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Dcirrus,lochnagar.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/cirrus,lochnagar.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
15 Logic devices on mini-cards, as well as allowing connection of various
21 This binding document describes the binding for the clock portion of the
25 [1] Clock : ../clock/clock-bindings.txt
28 [2] include/dt-bindings/clock/lochnagar.h
36 - cirrus,lochnagar1-clk
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/kernel/linux/linux-5.10/drivers/staging/clocking-wizard/
Dclk-xlnx-clock-wizard.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013 - 2014 Xilinx
12 #include <linux/clk-provider.h>
42 * @clk_data: Clock data
45 * @clk_in1: Handle to input clock 'clk_in1'
46 * @axi_clk: Handle to input clock 's_axi_aclk'
48 * @clkout: Output clocks
59 struct clk *clkout[WZRD_NUM_OUTPUTS]; member
80 if (clk_wzrd->suspended) in clk_wzrd_clk_notifier()
83 if (ndata->clk == clk_wzrd->clk_in1) in clk_wzrd_clk_notifier()
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/kernel/linux/linux-5.10/drivers/clk/
Dclk-si5351.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * clk-si5351.c: Silicon Laboratories Si5351A/B/C I2C Clock Generator
6 * Rabeeh Khoury <rabeeh@solid-run.com>
18 #include <linux/clk-provider.h>
31 #include "clk-si5351.h"
63 struct si5351_hw_data *clkout; member
88 ret = regmap_read(drvdata->regmap, reg, &val); in si5351_reg_read()
90 dev_err(&drvdata->client->dev, in si5351_reg_read()
101 return regmap_bulk_read(drvdata->regmap, reg, buf, count); in si5351_bulk_read()
107 return regmap_write(drvdata->regmap, reg, val); in si5351_reg_write()
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/kernel/linux/linux-5.10/sound/soc/sh/rcar/
Dadg.c1 // SPDX-License-Identifier: GPL-2.0
3 // Helper routines for R-Car sound ADG.
7 #include <linux/clk-provider.h>
16 #define CLKOUT 0 macro
30 struct clk *clkout[CLKOUTMAX]; member
49 ((pos) = adg->clk[i]); \
54 ((pos) = adg->clkout[i]); \
56 #define rsnd_priv_to_adg(priv) ((struct rsnd_adg *)(priv)->adg)
72 for (i = 3; i >= 0; i--) { in rsnd_adg_calculate_rbgx()
75 return (u32)((i << 8) | ((div / ratio) - 1)); in rsnd_adg_calculate_rbgx()
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Drealtek,rtl82xx.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
18 - $ref: ethernet-phy.yaml#
21 realtek,clkout-disable:
24 Disable CLKOUT clock, CLKOUT clock default is enabled after hardware reset.
27 realtek,aldps-enable:
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/can/
Dcc770.txt8 - compatible : should be "bosch,cc770" for the CC770 and "intc,82527"
11 - reg : should specify the chip select, address offset and size required
14 - interrupts : property with a value describing the interrupt source
19 - bosch,external-clock-frequency : frequency of the external oscillator
20 clock in Hz. Note that the internal clock frequency used by the
24 - bosch,clock-out-frequency : slock frequency in Hz on the CLKOUT pin.
25 If not specified or if the specified value is 0, the CLKOUT pin
28 - bosch,slew-rate : slew rate of the CLKOUT signal. If not specified,
31 - bosch,disconnect-rx0-input : see data sheet.
33 - bosch,disconnect-rx1-input : see data sheet.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/can/
Dcc770.txt8 - compatible : should be "bosch,cc770" for the CC770 and "intc,82527"
11 - reg : should specify the chip select, address offset and size required
14 - interrupts : property with a value describing the interrupt source
19 - bosch,external-clock-frequency : frequency of the external oscillator
20 clock in Hz. Note that the internal clock frequency used by the
24 - bosch,clock-out-frequency : slock frequency in Hz on the CLKOUT pin.
25 If not specified or if the specified value is 0, the CLKOUT pin
28 - bosch,slew-rate : slew rate of the CLKOUT signal. If not specified,
31 - bosch,disconnect-rx0-input : see data sheet.
33 - bosch,disconnect-rx1-input : see data sheet.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dcirrus,lochnagar.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/cirrus,lochnagar.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
15 Logic devices on mini-cards, as well as allowing connection of various
21 This binding document describes the binding for the clock portion of the
25 [1] Clock : ../clock/clock-bindings.txt
28 [2] include/dt-bindings/clock/lochnagar.h
36 - cirrus,lochnagar1-clk
[all …]
/kernel/linux/linux-5.10/drivers/clk/renesas/
Dr9a06g032-clocks.c1 // SPDX-License-Identifier: GPL-2.0
3 * R9A06G032 clock driver
11 #include <linux/clk-provider.h>
24 #include <dt-bindings/clock/r9a06g032-sysctrl.h>
31 /* This is used to describe a clock for instantiation */
46 /* For fixed-factor ones */
92 /* Internal clock IDs */
133 D_ROOT(CLKOUT, "clkout", 25, 1),
135 D_FFC(CLKOUT_D10, "clkout_d10", CLKOUT, 10),
136 D_FFC(CLKOUT_D16, "clkout_d16", CLKOUT, 16),
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/kernel/linux/linux-5.10/drivers/net/can/cc770/
Dcc770_platform.c1 // SPDX-License-Identifier: GPL-2.0-only
10 * in your board-specific code:
29 * interrupt-parent = <&mpic>;
30 * bosch,external-clock-frequency = <16000000>;
53 MODULE_DESCRIPTION("Socket-CAN driver for CC770 on the platform bus");
61 return ioread8(priv->reg_base + reg); in cc770_platform_read_reg()
67 iowrite8(val, priv->reg_base + reg); in cc770_platform_write_reg()
73 struct device_node *np = pdev->dev.of_node; in cc770_get_of_node_data()
78 prop = of_get_property(np, "bosch,external-clock-frequency", in cc770_get_of_node_data()
84 priv->can.clock.freq = clkext; in cc770_get_of_node_data()
[all …]
/kernel/linux/linux-6.6/drivers/net/can/cc770/
Dcc770_platform.c1 // SPDX-License-Identifier: GPL-2.0-only
10 * in your board-specific code:
29 * interrupt-parent = <&mpic>;
30 * bosch,external-clock-frequency = <16000000>;
53 MODULE_DESCRIPTION("Socket-CAN driver for CC770 on the platform bus");
61 return ioread8(priv->reg_base + reg); in cc770_platform_read_reg()
67 iowrite8(val, priv->reg_base + reg); in cc770_platform_write_reg()
73 struct device_node *np = pdev->dev.of_node; in cc770_get_of_node_data()
78 prop = of_get_property(np, "bosch,external-clock-frequency", in cc770_get_of_node_data()
84 priv->can.clock.freq = clkext; in cc770_get_of_node_data()
[all …]
/kernel/linux/linux-6.6/sound/soc/sh/rcar/
Dadg.c1 // SPDX-License-Identifier: GPL-2.0
3 // Helper routines for R-Car sound ADG.
6 #include <linux/clk-provider.h>
16 #define CLKOUT 0 macro
34 struct clk *clkout[CLKOUTMAX]; member
50 (i < adg->clkin_size) && \
51 ((pos) = adg->clkin[i]); \
55 (i < adg->clkout_size) && \
56 ((pos) = adg->clkout[i]); \
58 #define rsnd_priv_to_adg(priv) ((struct rsnd_adg *)(priv)->adg)
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ti/
Dadpll.txt1 Binding for Texas Instruments ADPLL clock.
3 Binding status: Unstable - ABI compatibility may be broken in the future
5 This binding uses the common clock binding[1]. It assumes a
6 register-mapped ADPLL with two to three selectable input clocks
9 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
12 - compatible : shall be one of "ti,dm814-adpll-s-clock" or
13 "ti,dm814-adpll-lj-clock" depending on the type of the ADPLL
14 - #clock-cells : from common clock binding; shall be set to 1.
15 - clocks : link phandles of parent clocks clkinp and clkinpulow, note
16 that the adpll-s-clock also has an optional clkinphif
[all …]

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