| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | fixed-clock.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Binding for simple fixed-rate clock sources
10 - Michael Turquette <mturquette@baylibre.com>
11 - Stephen Boyd <sboyd@kernel.org>
15 const: fixed-clock
17 "#clock-cells":
20 clock-frequency: true
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ |
| D | fixed-clock.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Simple fixed-rate clock sources
10 - Michael Turquette <mturquette@baylibre.com>
11 - Stephen Boyd <sboyd@kernel.org>
15 const: fixed-clock
17 "#clock-cells":
20 clock-frequency: true
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| /kernel/linux/linux-6.6/drivers/clk/ |
| D | clk-fixed-rate.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
6 * Fixed rate clock implementation
9 #include <linux/clk-provider.h>
18 * DOC: basic fixed-rate clock that cannot gate
20 * Traits of this clock:
21 * prepare - clk_(un)prepare only ensures parents are prepared
22 * enable - clk_enable only ensures parents are enabled
23 * rate - rate is always a fixed value. No clk_set_rate support
[all …]
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| D | clk.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
6 * Standard functionality for the common clock API. See Documentation/driver-api/clk.rst
10 #include <linux/clk-provider.h>
11 #include <linux/clk/clk-conf.h>
85 unsigned long accuracy; member
116 if (!core->rpm_enabled) in clk_pm_runtime_get()
119 return pm_runtime_resume_and_get(core->dev); in clk_pm_runtime_get()
124 if (!core->rpm_enabled) in clk_pm_runtime_put()
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| /kernel/linux/linux-5.10/drivers/clk/ |
| D | clk-fixed-rate.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
6 * Fixed rate clock implementation
9 #include <linux/clk-provider.h>
18 * DOC: basic fixed-rate clock that cannot gate
20 * Traits of this clock:
21 * prepare - clk_(un)prepare only ensures parents are prepared
22 * enable - clk_enable only ensures parents are enabled
23 * rate - rate is always a fixed value. No clk_set_rate support
[all …]
|
| D | clk.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
6 * Standard functionality for the common clock API. See Documentation/driver-api/clk.rst
10 #include <linux/clk-provider.h>
11 #include <linux/clk/clk-conf.h>
85 unsigned long accuracy; member
118 if (!core->rpm_enabled) in clk_pm_runtime_get()
121 ret = pm_runtime_get_sync(core->dev); in clk_pm_runtime_get()
123 pm_runtime_put_noidle(core->dev); in clk_pm_runtime_get()
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| /kernel/linux/linux-5.10/Documentation/timers/ |
| D | timekeeping.rst | 2 Clock sources, Clock events, sched_clock() and delay timers
10 If you grep through the kernel source you will find a number of architecture-
11 specific implementations of clock sources, clockevents and several likewise
12 architecture-specific overrides of the sched_clock() function and some
15 To provide timekeeping for your platform, the clock source provides
16 the basic timeline, whereas clock events shoot interrupts on certain points
17 on this timeline, providing facilities such as high-resolution timers.
22 Clock sources
23 -------------
25 The purpose of the clock source is to provide a timeline for the system that
[all …]
|
| /kernel/linux/linux-6.6/Documentation/timers/ |
| D | timekeeping.rst | 2 Clock sources, Clock events, sched_clock() and delay timers
10 If you grep through the kernel source you will find a number of architecture-
11 specific implementations of clock sources, clockevents and several likewise
12 architecture-specific overrides of the sched_clock() function and some
15 To provide timekeeping for your platform, the clock source provides
16 the basic timeline, whereas clock events shoot interrupts on certain points
17 on this timeline, providing facilities such as high-resolution timers.
22 Clock sources
23 -------------
25 The purpose of the clock source is to provide a timeline for the system that
[all …]
|
| /kernel/linux/linux-6.6/Documentation/hwmon/ |
| D | pc87360.rst | 22 -----------------
27 - 0: None
28 - **1**: Forcibly enable internal voltage and temperature channels,
30 - 2: Forcibly enable all voltage and temperature channels, except in9
31 - 3: Forcibly enable all voltage and temperature channels, including in9
42 -----------
56 PC87360 - 2 2 - 0xE1
57 PC87363 - 2 2 - 0xE8
58 PC87364 - 3 3 - 0xE4
60 PC87366 11 3 3 3-4 0xE9
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|
| D | shtc1.rst | 41 -----------
48 address 0x70. See Documentation/i2c/instantiating-devices.rst for methods to
53 1. blocking (pull the I2C clock line down while performing the measurement) or
54 non-blocking mode. Blocking mode will guarantee the fastest result but
55 the I2C bus will be busy during that time. By default, non-blocking mode
56 is used. Make sure clock-stretching works properly on your device if you
58 2. high or low accuracy. High accuracy is used by default and using it is
61 sysfs-Interface
62 ---------------
65 - temperature input
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|
| /kernel/linux/linux-5.10/Documentation/hwmon/ |
| D | pc87360.rst | 22 -----------------
27 - 0: None
28 - **1**: Forcibly enable internal voltage and temperature channels,
30 - 2: Forcibly enable all voltage and temperature channels, except in9
31 - 3: Forcibly enable all voltage and temperature channels, including in9
42 -----------
56 PC87360 - 2 2 - 0xE1
57 PC87363 - 2 2 - 0xE8
58 PC87364 - 3 3 - 0xE4
60 PC87366 11 3 3 3-4 0xE9
[all …]
|
| D | shtc1.rst | 41 -----------
48 address 0x70. See Documentation/i2c/instantiating-devices.rst for methods to
53 1. blocking (pull the I2C clock line down while performing the measurement) or
54 non-blocking mode. Blocking mode will guarantee the fastest result but
55 the I2C bus will be busy during that time. By default, non-blocking mode
56 is used. Make sure clock-stretching works properly on your device if you
58 2. high or low accuracy. High accuracy is used by default and using it is
61 sysfs-Interface
62 ---------------
65 - temperature input
[all …]
|
| D | sht3x.rst | 6 * Sensirion SHT3x-DIS
16 - David Frey <david.frey@sensirion.com>
17 - Pascal Sachs <pascal.sachs@sensirion.com>
20 -----------
22 This driver implements support for the Sensirion SHT3x-DIS chip, a humidity
29 Documentation/i2c/instantiating-devices.rst for methods to instantiate the device.
33 1. blocking (pull the I2C clock line down while performing the measurement) or
34 non-blocking mode. Blocking mode will guarantee the fastest result but
35 the I2C bus will be busy during that time. By default, non-blocking mode
36 is used. Make sure clock-stretching works properly on your device if you
[all …]
|
| /kernel/linux/linux-5.10/include/linux/ |
| D | clk-provider.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2010-2011 Jeremy Kerr <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
14 * top-level framework. custom flags for dealing with hardware specifics
20 #define CLK_SET_PARENT_GATE BIT(1) /* must be gated across re-parent */
26 #define CLK_SET_RATE_NO_REPARENT BIT(7) /* don't re-parent on rate change */
27 #define CLK_GET_ACCURACY_NOCACHE BIT(8) /* do not use the cached clk accuracy */
29 #define CLK_SET_RATE_UNGATE BIT(10) /* clock needs to run to set rate */
31 /* parents need enable during gate/ungate, set rate and re-parent */
33 /* duty cycle call may be forwarded to the parent clock */
[all …]
|
| /kernel/linux/linux-6.6/include/linux/ |
| D | clk-provider.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2010-2011 Jeremy Kerr <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
14 * top-level framework. custom flags for dealing with hardware specifics
20 #define CLK_SET_PARENT_GATE BIT(1) /* must be gated across re-parent */
26 #define CLK_SET_RATE_NO_REPARENT BIT(7) /* don't re-parent on rate change */
27 #define CLK_GET_ACCURACY_NOCACHE BIT(8) /* do not use the cached clk accuracy */
29 #define CLK_SET_RATE_UNGATE BIT(10) /* clock needs to run to set rate */
31 /* parents need enable during gate/ungate, set rate and re-parent */
33 /* duty cycle call may be forwarded to the parent clock */
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/alphascale/ |
| D | alphascale-asm9260.dtsi | 2 * Copyright 2014 Oleksij Rempel <linux@rempel-privat.de>
7 #include <dt-bindings/clock/alphascale,asm9260.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&icoll>;
20 #address-cells = <0>;
21 #size-cells = <0>;
24 compatible = "arm,arm926ej-s";
31 compatible = "fixed-clock";
32 #clock-cells = <0>;
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | alphascale-asm9260.dtsi | 2 * Copyright 2014 Oleksij Rempel <linux@rempel-privat.de>
7 #include <dt-bindings/clock/alphascale,asm9260.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&icoll>;
20 #address-cells = <0>;
21 #size-cells = <0>;
24 compatible = "arm,arm926ej-s";
31 compatible = "fixed-clock";
32 #clock-cells = <0>;
[all …]
|
| D | pxa300-raumfeld-tuneable-clock.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/maxim,max9485.h>
6 xo_27mhz: oscillator-27mhz {
7 compatible = "fixed-clock";
8 #clock-cells = <0>;
9 clock-frequency = <27000000>;
10 clock-accuracy = <100>;
14 compatible = "simple-audio-card";
15 simple-audio-card,name = "Raumfeld Speaker";
16 #address-cells = <1>;
[all …]
|
| /kernel/linux/linux-6.6/Documentation/sound/designs/ |
| D | timestamping.rst | 7 - Trigger_tstamp is the system time snapshot taken when the .trigger
11 estimate with a delay. In the latter two cases, the low-level driver
17 - tstamp is the current system timestamp updated during the last
19 The difference (tstamp - trigger_tstamp) defines the elapsed time.
29 - ``avail`` reports how much can be written in the ring buffer
30 - ``delay`` reports the time it will take to hear a new sample after all
43 ascii-art, this could be represented as follows (for the playback
47 --------------------------------------------------------------> time
53 |< codec delay >|<--hw delay-->|<queued samples>|<---avail->|
54 |<----------------- delay---------------------->| |
[all …]
|
| /kernel/linux/linux-5.10/Documentation/sound/designs/ |
| D | timestamping.rst | 7 - Trigger_tstamp is the system time snapshot taken when the .trigger
11 estimate with a delay. In the latter two cases, the low-level driver
17 - tstamp is the current system timestamp updated during the last
19 The difference (tstamp - trigger_tstamp) defines the elapsed time.
29 - ``avail`` reports how much can be written in the ring buffer
30 - ``delay`` reports the time it will take to hear a new sample after all
43 ascii-art, this could be represented as follows (for the playback
47 --------------------------------------------------------------> time
53 |< codec delay >|<--hw delay-->|<queued samples>|<---avail->|
54 |<----------------- delay---------------------->| |
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/intel/pxa/ |
| D | pxa300-raumfeld-tuneable-clock.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/maxim,max9485.h>
6 xo_27mhz: oscillator-27mhz {
7 compatible = "fixed-clock";
8 #clock-cells = <0>;
9 clock-frequency = <27000000>;
10 clock-accuracy = <100>;
14 compatible = "simple-audio-card";
15 simple-audio-card,name = "Raumfeld Speaker";
16 #address-cells = <1>;
[all …]
|
| /kernel/linux/linux-5.10/drivers/clk/at91/ |
| D | dt-compat.c | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
31 const char *name = np->name; in of_sama5d2_clk_audio_pll_frac_setup()
48 "atmel,sama5d2-clk-audio-pll-frac",
54 const char *name = np->name; in of_sama5d2_clk_audio_pll_pad_setup()
71 "atmel,sama5d2-clk-audio-pll-pad",
77 const char *name = np->name; in of_sama5d2_clk_audio_pll_pmc_setup()
94 "atmel,sama5d2-clk-audio-pll-pmc",
148 if (of_property_read_string(np, "clock-output-names", &name)) in of_sama5d2_clk_generated_setup()
149 name = gcknp->name; in of_sama5d2_clk_generated_setup()
[all …]
|
| /kernel/linux/linux-5.10/arch/x86/kernel/ |
| D | tsc_msr.c | 1 // SPDX-License-Identifier: GPL-2.0
14 #include <asm/intel-family.h>
23 * lot of accuracy which leads to clock drift. As far as we know Bay Trail SoCs
26 * unclear if the root PLL outputs are used directly by the CPU clock PLL or
30 * So we can create a simplified model of the CPU clock setup using a reference
31 * clock of 100 MHz plus a quotient which gets us as close to the frequency
62 * Penwell and Clovertrail use spread spectrum clock,
161 * MSR-based CPU/TSC frequency discovery for certain CPUs.
179 freq_desc = (struct freq_desc *)id->driver_data; in cpu_khz_from_msr()
180 if (freq_desc->use_msr_plat) { in cpu_khz_from_msr()
[all …]
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| /kernel/linux/linux-6.6/arch/x86/kernel/ |
| D | tsc_msr.c | 1 // SPDX-License-Identifier: GPL-2.0
14 #include <asm/intel-family.h>
23 * lot of accuracy which leads to clock drift. As far as we know Bay Trail SoCs
26 * unclear if the root PLL outputs are used directly by the CPU clock PLL or
30 * So we can create a simplified model of the CPU clock setup using a reference
31 * clock of 100 MHz plus a quotient which gets us as close to the frequency
62 * Penwell and Clovertrail use spread spectrum clock,
161 * MSR-based CPU/TSC frequency discovery for certain CPUs.
179 freq_desc = (struct freq_desc *)id->driver_data; in cpu_khz_from_msr()
180 if (freq_desc->use_msr_plat) { in cpu_khz_from_msr()
[all …]
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| /kernel/linux/linux-5.10/drivers/video/fbdev/kyro/ |
| D | STG4000InitDevice.c | 41 /* Core clock freq */
44 /* Reference Clock freq */
61 /* PLL Clock */
101 /* Program SD-RAM interface */ in InitSDRAMRegisters()
129 /* Translate clock in Hz */ in ProgramClock()
133 /* Work out acceptable clock in ProgramClock()
134 * The method calculates ~ +- 0.4% (1/256) in ProgramClock()
136 ulMinClock = coreClock - (coreClock >> 8); in ProgramClock()
139 /* Scale clock required for use in calculations */ in ProgramClock()
147 /* loop for pre-divider from min to max */ in ProgramClock()
[all …]
|