Searched +full:clock +full:- +full:delay (Results 1 – 25 of 1085) sorted by relevance
12345678910>>...44
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/ |
| D | sdhci-sprd.txt | 1 * Spreadtrum SDHCI controller (sdhci-sprd) 7 and the properties used by the sdhci-sprd driver. 10 - compatible: Should contain "sprd,sdhci-r11". 11 - reg: physical base address of the controller and length. 12 - interrupts: Interrupts used by the SDHCI controller. 13 - clocks: Should contain phandle for the clock feeding the SDHCI controller 14 - clock-names: Should contain the following: 15 "sdio" - SDIO source clock (required) 16 "enable" - gate clock which used for enabling/disabling the device (required) 17 "2x_enable" - gate clock controlling the device for some special platforms (optional) [all …]
|
| D | mtk-sd.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/mtk-sd.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chaotian Jing <chaotian.jing@mediatek.com> 11 - Wenbin Mei <wenbin.mei@mediatek.com> 16 - enum: 17 - mediatek,mt2701-mmc 18 - mediatek,mt2712-mmc 19 - mediatek,mt6779-mmc [all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/ |
| D | sdhci-sprd.txt | 1 * Spreadtrum SDHCI controller (sdhci-sprd) 7 and the properties used by the sdhci-sprd driver. 10 - compatible: Should contain "sprd,sdhci-r11". 11 - reg: physical base address of the controller and length. 12 - interrupts: Interrupts used by the SDHCI controller. 13 - clocks: Should contain phandle for the clock feeding the SDHCI controller 14 - clock-names: Should contain the following: 15 "sdio" - SDIO source clock (required) 16 "enable" - gate clock which used for enabling/disabling the device (required) 17 "2x_enable" - gate clock controlling the device for some special platforms (optional) [all …]
|
| D | mtk-sd.txt | 10 - compatible: value should be either of the following. 11 "mediatek,mt8135-mmc": for mmc host ip compatible with mt8135 12 "mediatek,mt8173-mmc": for mmc host ip compatible with mt8173 13 "mediatek,mt8183-mmc": for mmc host ip compatible with mt8183 14 "mediatek,mt8516-mmc": for mmc host ip compatible with mt8516 15 "mediatek,mt6779-mmc": for mmc host ip compatible with mt6779 16 "mediatek,mt2701-mmc": for mmc host ip compatible with mt2701 17 "mediatek,mt2712-mmc": for mmc host ip compatible with mt2712 18 "mediatek,mt7622-mmc": for MT7622 SoC 19 "mediatek,mt7623-mmc", "mediatek,mt2701-mmc": for MT7623 SoC [all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | mediatek-dwmac.txt | 9 - compatible: Should be "mediatek,mt2712-gmac" for MT2712 SoC 10 - reg: Address and length of the register set for the device 11 - interrupts: Should contain the MAC interrupts 12 - interrupt-names: Should contain a list of interrupt names corresponding to 15 - clocks: Must contain a phandle for each entry in clock-names. 16 - clock-names: The name of the clock listed in the clocks property. These are 18 - mac-address: See ethernet.txt in the same directory 19 - phy-mode: See ethernet.txt in the same directory 20 - mediatek,pericfg: A phandle to the syscon node that control ethernet 21 interface and timing delay. [all …]
|
| D | amlogic,meson-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: "http://devicetree.org/schemas/net/amlogic,meson-dwmac.yaml#" 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 11 - Neil Armstrong <narmstrong@baylibre.com> 12 - Martin Blumenstingl <martin.blumenstingl@googlemail.com> 20 - amlogic,meson6-dwmac 21 - amlogic,meson8b-dwmac 22 - amlogic,meson8m2-dwmac 23 - amlogic,meson-gxbb-dwmac [all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/c6x/ |
| D | clocks.txt | 1 C6X PLL Clock Controllers 2 ------------------------- 4 This is a first-cut support for the SoC clock controllers. This is still 6 clock support is added to the kernel. 10 - compatible: "ti,c64x+pll" 11 May also have SoC-specific value to support SoC-specific initialization 13 "ti,c6455-pll" 14 "ti,c6457-pll" 15 "ti,c6472-pll" 16 "ti,c6474-pll" [all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/ |
| D | amlogic,meson-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/net/amlogic,meson-dwmac.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Neil Armstrong <neil.armstrong@linaro.org> 12 - Martin Blumenstingl <martin.blumenstingl@googlemail.com> 20 - amlogic,meson6-dwmac 21 - amlogic,meson8b-dwmac 22 - amlogic,meson8m2-dwmac 23 - amlogic,meson-gxbb-dwmac [all …]
|
| D | motorcomm,yt8xxx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Frank Sae <frank.sae@motor-comm.com> 13 - $ref: ethernet-phy.yaml# 18 - ethernet-phy-id4f51.e91a 19 - ethernet-phy-id4f51.e91b 21 rx-internal-delay-ps: 23 RGMII RX Clock Delay used only when PHY operates in RGMII mode with 24 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds. [all …]
|
| D | adi,adin.yaml | 1 # SPDX-License-Identifier: GPL-2.0+ 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alexandru Tachici <alexandru.tachici@analog.com> 16 - $ref: ethernet-phy.yaml# 19 adi,rx-internal-delay-ps: 21 RGMII RX Clock Delay used only when PHY operates in RGMII mode with 22 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds. 26 adi,tx-internal-delay-ps: 28 RGMII TX Clock Delay used only when PHY operates in RGMII mode with [all …]
|
| D | fsl,fec.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shawn Guo <shawnguo@kernel.org> 11 - Wei Fang <wei.fang@nxp.com> 12 - NXP Linux Team <linux-imx@nxp.com> 15 - $ref: ethernet-controller.yaml# 20 - enum: 21 - fsl,imx25-fec 22 - fsl,imx27-fec [all …]
|
| D | mediatek-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/mediatek-dwmac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Biao Huang <biao.huang@mediatek.com> 21 - mediatek,mt2712-gmac 22 - mediatek,mt8188-gmac 23 - mediatek,mt8195-gmac 25 - compatible 28 - $ref: snps,dwmac.yaml# [all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | rt5682.txt | 7 - compatible : "realtek,rt5682" or "realtek,rt5682i" 9 - reg : The I2C address of the device. 13 - interrupts : The CODEC's interrupt output. 15 - realtek,dmic1-data-pin 20 - realtek,dmic1-clk-pin 21 0: using GPIO1 pin as dmic1 clock pin 22 1: using GPIO3 pin as dmic1 clock pin 24 - realtek,jd-src 28 - realtek,ldo1-en-gpios : The GPIO that controls the CODEC's LDO1_EN pin. 30 - realtek,btndet-delay [all …]
|
| /kernel/linux/linux-5.10/Documentation/timers/ |
| D | timekeeping.rst | 2 Clock sources, Clock events, sched_clock() and delay timers 10 If you grep through the kernel source you will find a number of architecture- 11 specific implementations of clock sources, clockevents and several likewise 12 architecture-specific overrides of the sched_clock() function and some 13 delay timers. 15 To provide timekeeping for your platform, the clock source provides 16 the basic timeline, whereas clock events shoot interrupts on certain points 17 on this timeline, providing facilities such as high-resolution timers. 18 sched_clock() is used for scheduling and timestamping, and delay timers 19 provide an accurate delay source using hardware counters. [all …]
|
| /kernel/linux/linux-6.6/Documentation/timers/ |
| D | timekeeping.rst | 2 Clock sources, Clock events, sched_clock() and delay timers 10 If you grep through the kernel source you will find a number of architecture- 11 specific implementations of clock sources, clockevents and several likewise 12 architecture-specific overrides of the sched_clock() function and some 13 delay timers. 15 To provide timekeeping for your platform, the clock source provides 16 the basic timeline, whereas clock events shoot interrupts on certain points 17 on this timeline, providing facilities such as high-resolution timers. 18 sched_clock() is used for scheduling and timestamping, and delay timers 19 provide an accurate delay source using hardware counters. [all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/spi/ |
| D | renesas,sh-msiof.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/spi/renesas,sh-msiof.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Geert Uytterhoeven <geert+renesas@glider.be> 13 - $ref: spi-controller.yaml# 18 - items: 19 - const: renesas,msiof-sh73a0 # SH-Mobile AG5 20 - const: renesas,sh-mobile-msiof # generic SH-Mobile compatible 22 - items: [all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/fsl/cpm_qe/ |
| D | fsl,cpm1-tsa.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: PowerQUICC CPM Time-slot assigner (TSA) controller 10 - Herve Codina <herve.codina@bootlin.com> 13 The TSA is the time-slot assigner that can be found on some PowerQUICC SoC. 14 Its purpose is to route some TDM time-slots to other internal serial 20 - enum: 21 - fsl,mpc885-tsa [all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/ |
| D | rt5682.txt | 7 - compatible : "realtek,rt5682" or "realtek,rt5682i" 9 - reg : The I2C address of the device. 11 - AVDD-supply: phandle to the regulator supplying analog power through the 14 - MICVDD-supply: phandle to the regulator supplying power for the microphone 17 - VBAT-supply: phandle to the regulator supplying battery power through the 20 - DBVDD-supply: phandle to the regulator supplying I/O power through the DBVDD 23 - LDO1-IN-supply: phandle to the regulator supplying power to the digital core 28 - interrupts : The CODEC's interrupt output. 30 - realtek,dmic1-data-pin 35 - realtek,dmic1-clk-pin [all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/ |
| D | arm,pl172.txt | 5 - compatible: Must be "arm,primecell" and exactly one from 8 - reg: Must contains offset/length value for controller. 10 - #address-cells: Must be 2. The partition number has to be encoded in the 11 first address cell and it may accept values 0..N-1 12 (N - total number of partitions). The second cell is the 15 - #size-cells: Must be set to 1. 17 - ranges: Must contain one or more chip select memory regions. 19 - clocks: Must contain references to controller clocks. 21 - clock-names: Must contain "mpmcclk" and "apb_pclk". 23 - clock-ranges: Empty property indicating that child nodes can inherit [all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/ |
| D | arm,pl172.txt | 5 - compatible: Must be "arm,primecell" and exactly one from 8 - reg: Must contains offset/length value for controller. 10 - #address-cells: Must be 2. The partition number has to be encoded in the 11 first address cell and it may accept values 0..N-1 12 (N - total number of partitions). The second cell is the 15 - #size-cells: Must be set to 1. 17 - ranges: Must contain one or more chip select memory regions. 19 - clocks: Must contain references to controller clocks. 21 - clock-names: Must contain "mpmcclk" and "apb_pclk". 23 - clock-ranges: Empty property indicating that child nodes can inherit [all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/spi/ |
| D | renesas,sh-msiof.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/spi/renesas,sh-msiof.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Geert Uytterhoeven <geert+renesas@glider.be> 13 - $ref: spi-controller.yaml# 18 - items: 19 - const: renesas,msiof-sh73a0 # SH-Mobile AG5 20 - const: renesas,sh-mobile-msiof # generic SH-Mobile compatible 22 - items: [all …]
|
| /kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/ |
| D | ipq9574.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved. 9 #include <dt-bindings/clock/qcom,apss-ipq.h> 10 #include <dt-bindings/clock/qcom,ipq9574-gcc.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/reset/qcom,ipq9574-gcc.h> 13 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&intc>; 17 #address-cells = <2>; 18 #size-cells = <2>; [all …]
|
| D | ipq8074.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/qcom,gcc-ipq8074.h> 10 #address-cells = <2>; 11 #size-cells = <2>; 15 interrupt-parent = <&intc>; 19 compatible = "fixed-clock"; 20 clock-frequency = <32768>; 21 #clock-cells = <0>; 25 compatible = "fixed-clock"; [all …]
|
| /kernel/linux/linux-6.6/include/linux/amba/ |
| D | pl022.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 5 * Copyright (C) 2008-2009 ST-Ericsson AB 11 * linux-2.6.17-rc3-mm1/drivers/spi/pxa2xx_spi.c 30 * enum ssp_interface - interfaces allowed for this SSP Controller 47 * enum ssp_hierarchy - whether SSP is configured as Master or Slave 55 * enum ssp_clock_params - clock parameters, to set SSP clock at a 64 * enum ssp_rx_endian - endianess of Rx FIFO Data 73 * enum ssp_tx_endian - endianess of Tx FIFO Data 81 * enum ssp_data_size - number of bits in one data element 97 * enum ssp_mode - SSP mode of operation (Communication modes) [all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/ddr/ |
| D | jedec,lpddr3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: LPDDR3 SDRAM compliant to JEDEC JESD209-3 10 - Krzysztof Kozlowski <krzk@kernel.org> 13 - $ref: jedec,lpddr-props.yaml# 18 - items: 19 - enum: 20 - samsung,K3QF2F20DB [all …]
|
12345678910>>...44