| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | xgene.txt | 1 Device Tree Clock bindings for APM X-Gene
3 This binding uses the common clock binding[1].
5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
8 - compatible : shall be one of the following:
9 "apm,xgene-socpll-clock" - for a X-Gene SoC PLL clock
10 "apm,xgene-pcppll-clock" - for a X-Gene PCP PLL clock
11 "apm,xgene-pmd-clock" - for a X-Gene PMD clock
12 "apm,xgene-device-clock" - for a X-Gene device clock
13 "apm,xgene-socpll-v2-clock" - for a X-Gene SoC PLL v2 clock
14 "apm,xgene-pcppll-v2-clock" - for a X-Gene PCP PLL v2 clock
[all …]
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| D | moxa,moxart-clock.txt | 1 Device Tree Clock bindings for arch-moxart
3 This binding uses the common clock binding[1].
5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
7 MOXA ART SoCs allow to determine PLL output and APB frequencies
14 - compatible : Must be "moxa,moxart-pll-clock"
15 - #clock-cells : Should be 0
16 - reg : Should contain registers location and length
17 - clocks : Should contain phandle + clock-specifier for the parent clock
20 - clock-output-names : Should contain clock name
26 - compatible : Must be "moxa,moxart-apb-clock"
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ |
| D | xgene.txt | 1 Device Tree Clock bindings for APM X-Gene
3 This binding uses the common clock binding[1].
5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
8 - compatible : shall be one of the following:
9 "apm,xgene-socpll-clock" - for a X-Gene SoC PLL clock
10 "apm,xgene-pcppll-clock" - for a X-Gene PCP PLL clock
11 "apm,xgene-pmd-clock" - for a X-Gene PMD clock
12 "apm,xgene-device-clock" - for a X-Gene device clock
13 "apm,xgene-socpll-v2-clock" - for a X-Gene SoC PLL v2 clock
14 "apm,xgene-pcppll-v2-clock" - for a X-Gene PCP PLL v2 clock
[all …]
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| D | moxa,moxart-clock.txt | 1 Device Tree Clock bindings for arch-moxart
3 This binding uses the common clock binding[1].
5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
7 MOXA ART SoCs allow to determine PLL output and APB frequencies
14 - compatible : Must be "moxa,moxart-pll-clock"
15 - #clock-cells : Should be 0
16 - reg : Should contain registers location and length
17 - clocks : Should contain phandle + clock-specifier for the parent clock
20 - clock-output-names : Should contain clock name
26 - compatible : Must be "moxa,moxart-apb-clock"
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/ |
| D | allwinner,sun8i-r40-tcon-top.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-r40-tcon-top.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 TCON for HDMI, muxes LCD and TV encoder GPIO output, selects TV
17 encoder clock source and contains additional TV TCON and DSI gates.
22 / [0] TCON-LCD0
25 \ / [1] TCON-LCD1 - LCD1/LVDS1
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/at91/ |
| D | dt-compat.c | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
31 const char *name = np->name; in of_sama5d2_clk_audio_pll_frac_setup() local
41 hw = at91_clk_register_audio_pll_frac(regmap, name, parent_name); in of_sama5d2_clk_audio_pll_frac_setup()
48 "atmel,sama5d2-clk-audio-pll-frac",
54 const char *name = np->name; in of_sama5d2_clk_audio_pll_pad_setup() local
64 hw = at91_clk_register_audio_pll_pad(regmap, name, parent_name); in of_sama5d2_clk_audio_pll_pad_setup()
71 "atmel,sama5d2-clk-audio-pll-pad",
77 const char *name = np->name; in of_sama5d2_clk_audio_pll_pmc_setup() local
87 hw = at91_clk_register_audio_pll_pmc(regmap, name, parent_name); in of_sama5d2_clk_audio_pll_pmc_setup()
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/at91/ |
| D | dt-compat.c | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
33 const char *name = np->name; in of_sama5d2_clk_audio_pll_frac_setup() local
46 hw = at91_clk_register_audio_pll_frac(regmap, name, parent_name); in of_sama5d2_clk_audio_pll_frac_setup()
53 "atmel,sama5d2-clk-audio-pll-frac",
59 const char *name = np->name; in of_sama5d2_clk_audio_pll_pad_setup() local
72 hw = at91_clk_register_audio_pll_pad(regmap, name, parent_name); in of_sama5d2_clk_audio_pll_pad_setup()
79 "atmel,sama5d2-clk-audio-pll-pad",
85 const char *name = np->name; in of_sama5d2_clk_audio_pll_pmc_setup() local
98 hw = at91_clk_register_audio_pll_pmc(regmap, name, parent_name); in of_sama5d2_clk_audio_pll_pmc_setup()
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mfd/ |
| D | x-powers,ac100.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mfd/x-powers,ac100.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: X-Powers AC100
10 - Chen-Yu Tsai <wens@csie.org>
14 const: x-powers,ac100
23 "#clock-cells":
27 const: x-powers,ac100-codec
32 clock-output-names:
[all …]
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| D | rockchip,rk809.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Zhong <zyw@rock-chips.com>
11 - Zhang Qing <zhangqing@rock-chips.com>
20 - rockchip,rk809
28 '#clock-cells':
30 See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
34 clock-output-names:
36 From common clock binding to override the default output clock name.
[all …]
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| D | rockchip,rk805.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Zhong <zyw@rock-chips.com>
11 - Zhang Qing <zhangqing@rock-chips.com>
20 - rockchip,rk805
28 '#clock-cells':
30 See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
34 clock-output-names:
36 From common clock binding to override the default output clock name.
[all …]
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| D | rockchip,rk817.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Zhong <zyw@rock-chips.com>
11 - Zhang Qing <zhangqing@rock-chips.com>
21 - rockchip,rk817
29 '#clock-cells':
31 See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
35 clock-output-names:
37 From common clock binding to override the default output clock name.
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/ |
| D | rohm,bd70528-pmic.txt | 3 BD70528MWV is an ultra-low quiescent current general purpose, single-chip,
4 power management IC for battery-powered portable devices. The IC
5 integrates 3 ultra-low current consumption buck converters, 3 LDOs and 2
6 LED Drivers. Also included are 4 GPIOs, a real-time clock (RTC), a 32kHz
7 clock gate, high-accuracy VREF for use with an external ADC, flexible
8 dual-input power path, 10 bit SAR ADC for battery temperature monitor and
12 - compatible : Should be "rohm,bd70528"
13 - reg : I2C slave address.
14 - interrupts : The interrupt line the device is connected to.
15 - interrupt-controller : To indicate BD70528 acts as an interrupt controller.
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/ti/ |
| D | adpll.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <linux/clk-provider.h>
177 const char *name; in ti_adpll_clk_get_name() local
181 err = of_property_read_string_index(d->np, in ti_adpll_clk_get_name()
182 "clock-output-names", in ti_adpll_clk_get_name()
184 &name); in ti_adpll_clk_get_name()
188 name = devm_kasprintf(d->dev, GFP_KERNEL, "%08lx.adpll.%s", in ti_adpll_clk_get_name()
189 d->pa, postfix); in ti_adpll_clk_get_name()
192 return name; in ti_adpll_clk_get_name()
197 static int ti_adpll_setup_clock(struct ti_adpll_data *d, struct clk *clock, in ti_adpll_setup_clock() argument
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ti/davinci/ |
| D | pll.txt | 5 an multiplexers for various clock signals.
8 - compatible: shall be one of:
9 - "ti,da850-pll0" for PLL0 on DA850/OMAP-L138/AM18XX
10 - "ti,da850-pll1" for PLL1 on DA850/OMAP-L138/AM18XX
11 - reg: physical base address and size of the controller's register area.
12 - clocks: phandles corresponding to the clock names
13 - clock-names: names of the clock sources - depends on compatible string
14 - for "ti,da850-pll0", shall be "clksrc", "extclksrc"
15 - for "ti,da850-pll1", shall be "clksrc"
18 - ti,clkmode-square-wave: Indicates that the board is supplying a square
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ti/davinci/ |
| D | pll.txt | 5 an multiplexers for various clock signals.
8 - compatible: shall be one of:
9 - "ti,da850-pll0" for PLL0 on DA850/OMAP-L138/AM18XX
10 - "ti,da850-pll1" for PLL1 on DA850/OMAP-L138/AM18XX
11 - reg: physical base address and size of the controller's register area.
12 - clocks: phandles corresponding to the clock names
13 - clock-names: names of the clock sources - depends on compatible string
14 - for "ti,da850-pll0", shall be "clksrc", "extclksrc"
15 - for "ti,da850-pll1", shall be "clksrc"
18 - ti,clkmode-square-wave: Indicates that the the board is supplying a square
[all …]
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| /kernel/linux/linux-6.6/drivers/media/platform/qcom/camss/ |
| D | camss-vfe.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * camss-vfe.c
5 * Qualcomm MSM Camera Subsystem - VFE (Video Front End) Module
7 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
8 * Copyright (C) 2015-2018 Linaro Ltd.
20 #include <media/media-entity.h>
21 #include <media/v4l2-device.h>
22 #include <media/v4l2-subdev.h>
24 #include "camss-vfe.h"
127 * vfe_get_bpp - map media bus format to bits per pixel
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/ |
| D | allwinner,sun8i-r40-tcon-top.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-r40-tcon-top.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 TCON for HDMI, muxes LCD and TV encoder GPIO output, selects TV
17 encoder clock source and contains additional TV TCON and DSI gates.
22 / [0] TCON-LCD0
25 \ / [1] TCON-LCD1 - LCD1/LVDS1
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/ti/ |
| D | adpll.c | 14 #include <linux/clk-provider.h>
186 const char *name; in ti_adpll_clk_get_name() local
190 err = of_property_read_string_index(d->np, in ti_adpll_clk_get_name()
191 "clock-output-names", in ti_adpll_clk_get_name()
193 &name); in ti_adpll_clk_get_name()
197 name = devm_kasprintf(d->dev, GFP_KERNEL, "%08lx.adpll.%s", in ti_adpll_clk_get_name()
198 d->pa, postfix); in ti_adpll_clk_get_name()
201 return name; in ti_adpll_clk_get_name()
206 static int ti_adpll_setup_clock(struct ti_adpll_data *d, struct clk *clock, in ti_adpll_setup_clock() argument
207 int index, int output_index, const char *name, in ti_adpll_setup_clock() argument
[all …]
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| /kernel/linux/linux-6.6/tools/perf/tests/shell/ |
| D | daemon.sh | 3 # SPDX-License-Identifier: GPL-2.0
8 local name=$2
10 local output=$4
25 if [ "${name}" != "${line_name}" ]; then
26 echo "FAILED: wrong name"
35 if [ "${output}" != "${line_output}" ]; then
36 echo "FAILED: wrong output"
54 local name=$2
57 local output=$5
77 if [ "${name}" != "${line_name}" ]; then
[all …]
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| /kernel/linux/linux-6.6/Documentation/ABI/testing/ |
| D | sysfs-bus-counter | 3 Contact: linux-iio@vger.kernel.org
11 Contact: linux-iio@vger.kernel.org
13 Selects the external clock pin for phase counting mode of
16 MTCLKA-MTCLKB:
18 phase clock.
20 MTCLKC-MTCLKD:
22 phase clock.
26 Contact: linux-iio@vger.kernel.org
33 Contact: linux-iio@vger.kernel.org
39 Contact: linux-iio@vger.kernel.org
[all …]
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| /kernel/linux/linux-5.10/drivers/media/platform/qcom/camss/ |
| D | camss-vfe.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * camss-vfe.c
5 * Qualcomm MSM Camera Subsystem - VFE (Video Front End) Module
7 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
8 * Copyright (C) 2015-2018 Linaro Ltd.
20 #include <media/media-entity.h>
21 #include <media/v4l2-device.h>
22 #include <media/v4l2-subdev.h>
24 #include "camss-vfe.h"
30 ((const struct vfe_line (*)[]) &(ptr_line[-(ptr_line->id)]))
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | rt5682.txt | 7 - compatible : "realtek,rt5682" or "realtek,rt5682i"
9 - reg : The I2C address of the device.
13 - interrupts : The CODEC's interrupt output.
15 - realtek,dmic1-data-pin
20 - realtek,dmic1-clk-pin
21 0: using GPIO1 pin as dmic1 clock pin
22 1: using GPIO3 pin as dmic1 clock pin
24 - realtek,jd-src
28 - realtek,ldo1-en-gpios : The GPIO that controls the CODEC's LDO1_EN pin.
30 - realtek,btndet-delay
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/leds/ |
| D | leds-lp55xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-lp55xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacek Anaszewski <jacek.anaszewski@gmail.com>
11 - Pavel Machek <pavel@ucw.cz>
27 - national,lp5521
28 - national,lp5523
29 - ti,lp55231
30 - ti,lp5562
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/ |
| D | phy-rockchip-inno-hdmi.txt | 4 - compatible : should be one of the listed compatibles:
5 * "rockchip,rk3228-hdmi-phy",
6 * "rockchip,rk3328-hdmi-phy";
7 - reg : Address and length of the hdmi phy control register set
8 - clocks : phandle + clock specifier for the phy clocks
9 - clock-names : string, clock name, must contain "sysclk" for system
10 control and register configuration, "refoclk" for crystal-
11 oscillator reference PLL clock input and "refpclk" for pclk-
12 based refeference PLL clock input.
13 - #clock-cells: should be 0.
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/ |
| D | phy-rockchip-inno-hdmi.txt | 4 - compatible : should be one of the listed compatibles:
5 * "rockchip,rk3228-hdmi-phy",
6 * "rockchip,rk3328-hdmi-phy";
7 - reg : Address and length of the hdmi phy control register set
8 - clocks : phandle + clock specifier for the phy clocks
9 - clock-names : string, clock name, must contain "sysclk" for system
10 control and register configuration, "refoclk" for crystal-
11 oscillator reference PLL clock input and "refpclk" for pclk-
12 based refeference PLL clock input.
13 - #clock-cells: should be 0.
[all …]
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