Home
last modified time | relevance | path

Searched +full:clock +full:- +full:xtal (Results 1 – 25 of 516) sorted by relevance

12345678910>>...21

/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dmeson6.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
13 #address-cells = <1>;
14 #size-cells = <0>;
18 compatible = "arm,cortex-a9";
19 next-level-cache = <&L2>;
25 compatible = "arm,cortex-a9";
26 next-level-cache = <&L2>;
32 compatible = "simple-bus";
34 #address-cells = <1>;
35 #size-cells = <1>;
[all …]
Dmeson8b.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 #include <dt-bindings/clock/meson8-ddr-clkc.h>
8 #include <dt-bindings/clock/meson8b-clkc.h>
9 #include <dt-bindings/gpio/meson8b-gpio.h>
10 #include <dt-bindings/power/meson8-power.h>
11 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
12 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a5";
[all …]
Dmeson8.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 #include <dt-bindings/clock/meson8-ddr-clkc.h>
7 #include <dt-bindings/clock/meson8b-clkc.h>
8 #include <dt-bindings/gpio/meson8-gpio.h>
9 #include <dt-bindings/power/meson8-power.h>
10 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
11 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
19 #address-cells = <1>;
20 #size-cells = <0>;
24 compatible = "arm,cortex-a9";
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/amlogic/
Dmeson6.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
13 #address-cells = <1>;
14 #size-cells = <0>;
18 compatible = "arm,cortex-a9";
19 next-level-cache = <&L2>;
25 compatible = "arm,cortex-a9";
26 next-level-cache = <&L2>;
32 compatible = "simple-bus";
34 #address-cells = <1>;
35 #size-cells = <1>;
[all …]
Dmeson8.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 #include <dt-bindings/clock/meson8-ddr-clkc.h>
7 #include <dt-bindings/clock/meson8b-clkc.h>
8 #include <dt-bindings/gpio/meson8-gpio.h>
9 #include <dt-bindings/power/meson8-power.h>
10 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
11 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
12 #include <dt-bindings/thermal/thermal.h>
20 #address-cells = <1>;
21 #size-cells = <0>;
[all …]
Dmeson8b.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 #include <dt-bindings/clock/meson8-ddr-clkc.h>
8 #include <dt-bindings/clock/meson8b-clkc.h>
9 #include <dt-bindings/gpio/meson8b-gpio.h>
10 #include <dt-bindings/power/meson8-power.h>
11 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
12 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
13 #include <dt-bindings/thermal/thermal.h>
18 #address-cells = <1>;
19 #size-cells = <0>;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Darmada3700-xtal-clock.txt1 * Xtal Clock bindings for Marvell Armada 37xx SoCs
3 Marvell Armada 37xx SoCs allow to determine the xtal clock frequencies by
8 See Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
11 - compatible : shall be one of the following:
12 "marvell,armada-3700-xtal-clock"
13 - #clock-cells : from common clock binding; shall be set to 0
16 - clock-output-names : from common clock binding; allows overwrite default clock
17 output names ("xtal")
20 pinctrl_nb: pinctrl-nb@13800 {
21 compatible = "armada3710-nb-pinctrl", "syscon", "simple-mfd";
[all …]
Dsilabs,si5351.txt1 Binding for Silicon Labs Si5351a/b/c programmable i2c clock generator.
5 https://www.skyworksinc.com/-/media/Skyworks/SL/documents/public/data-sheets/Si5351-B.pdf
7 The Si5351a/b/c are programmable i2c clock generators with up to 8 output
8 clocks. Si5351a also has a reduced pin-count package (MSOP10) where only
9 3 output clocks are accessible. The internal structure of the clock
15 - compatible: shall be one of the following:
16 "silabs,si5351a" - Si5351a, QFN20 package
17 "silabs,si5351a-msop" - Si5351a, MSOP10 package
18 "silabs,si5351b" - Si5351b, QFN20 package
19 "silabs,si5351c" - Si5351c, QFN20 package
[all …]
Dmarvell,armada-3700-uart-clock.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/marvell,armada-3700-uart-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
9 - Pali Rohár <pali@kernel.org>
13 const: marvell,armada-3700-uart-clock
17 - description: UART Clock Control Register
18 - description: UART 2 Baud Rate Divisor Register
23 "TBG-A-P", "TBG-B-P", "TBG-A-S", "TBG-B-S", "xtal"
24 UART clock can use one from this set and when more are provided
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Darmada3700-xtal-clock.txt1 * Xtal Clock bindings for Marvell Armada 37xx SoCs
3 Marvell Armada 37xx SoCs allow to determine the xtal clock frequencies by
8 See Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
11 - compatible : shall be one of the following:
12 "marvell,armada-3700-xtal-clock"
13 - #clock-cells : from common clock binding; shall be set to 0
16 - clock-output-names : from common clock binding; allows overwrite default clock
17 output names ("xtal")
20 pinctrl_nb: pinctrl-nb@13800 {
21 compatible = "armada3710-nb-pinctrl", "syscon", "simple-mfd";
[all …]
Dsilabs,si5351.txt1 Binding for Silicon Labs Si5351a/b/c programmable i2c clock generator.
7 The Si5351a/b/c are programmable i2c clock generators with up to 8 output
8 clocks. Si5351a also has a reduced pin-count package (MSOP10) where only
9 3 output clocks are accessible. The internal structure of the clock
15 - compatible: shall be one of the following:
16 "silabs,si5351a" - Si5351a, QFN20 package
17 "silabs,si5351a-msop" - Si5351a, MSOP10 package
18 "silabs,si5351b" - Si5351b, QFN20 package
19 "silabs,si5351c" - Si5351c, QFN20 package
20 - reg: i2c device address, shall be 0x60 or 0x61.
[all …]
Damlogic,gxbb-clkc.txt1 * Amlogic GXBB Clock and Reset Unit
3 The Amlogic GXBB clock controller generates and supplies clock to various
8 - compatible: should be:
9 "amlogic,gxbb-clkc" for GXBB SoC,
10 "amlogic,gxl-clkc" for GXL and GXM SoC,
11 "amlogic,axg-clkc" for AXG SoC.
12 "amlogic,g12a-clkc" for G12A SoC.
13 "amlogic,g12b-clkc" for G12B SoC.
14 "amlogic,sm1-clkc" for SM1 SoC.
15 - clocks : list of clock phandle, one for each entry clock-names.
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/amlogic/
Damlogic-t7-a311d2-an400.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "amlogic-t7.dtsi"
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
27 xtal: xtal-clk { label
28 compatible = "fixed-clock";
29 clock-frequency = <24000000>;
30 clock-output-names = "xtal";
[all …]
Damlogic-t7-a311d2-khadas-vim4.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "amlogic-t7.dtsi"
23 reserved-memory {
24 #address-cells = <2>;
25 #size-cells = <2>;
31 no-map;
37 no-map;
41 xtal: xtal-clk { label
42 compatible = "fixed-clock";
[all …]
Dmeson-gxbb.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "meson-gx.dtsi"
7 #include "meson-gx-mali450.dtsi"
8 #include <dt-bindings/gpio/meson-gxbb-gpio.h>
9 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
10 #include <dt-bindings/clock/gxbb-clkc.h>
11 #include <dt-bindings/clock/gxbb-aoclkc.h>
12 #include <dt-bindings/reset/gxbb-aoclkc.h>
15 compatible = "amlogic,meson-gxbb";
19 compatible = "amlogic,meson-gxbb-usb2-phy";
[all …]
Dmeson-gxl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-gx.dtsi"
8 #include <dt-bindings/clock/gxbb-clkc.h>
9 #include <dt-bindings/clock/gxbb-aoclkc.h>
10 #include <dt-bindings/gpio/meson-gxl-gpio.h>
11 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
14 compatible = "amlogic,meson-gxl";
18 compatible = "amlogic,meson-gxl-usb-ctrl";
21 #address-cells = <2>;
22 #size-cells = <2>;
[all …]
Dmeson-a1.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/gpio/meson-a1-gpio.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
18 #address-cells = <2>;
19 #size-cells = <0>;
23 compatible = "arm,cortex-a35";
[all …]
Damlogic-c3.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/gpio/gpio.h>
12 #address-cells = <2>;
13 #size-cells = <0>;
17 compatible = "arm,cortex-a35";
19 enable-method = "psci";
24 compatible = "arm,cortex-a35";
26 enable-method = "psci";
[all …]
Dmeson-s4.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/gpio/gpio.h>
12 #address-cells = <2>;
13 #size-cells = <0>;
17 compatible = "arm,cortex-a35";
19 enable-method = "psci";
24 compatible = "arm,cortex-a35";
26 enable-method = "psci";
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/
Dmeson-gxbb.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "meson-gx.dtsi"
7 #include "meson-gx-mali450.dtsi"
8 #include <dt-bindings/gpio/meson-gxbb-gpio.h>
9 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
10 #include <dt-bindings/clock/gxbb-clkc.h>
11 #include <dt-bindings/clock/gxbb-aoclkc.h>
12 #include <dt-bindings/reset/gxbb-aoclkc.h>
15 compatible = "amlogic,meson-gxbb";
19 compatible = "amlogic,meson-gxbb-usb2-phy";
[all …]
Dmeson-a1.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/gpio/meson-a1-gpio.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
18 #address-cells = <2>;
19 #size-cells = <0>;
23 compatible = "arm,cortex-a35";
[all …]
Dmeson-gxl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-gx.dtsi"
8 #include <dt-bindings/clock/gxbb-clkc.h>
9 #include <dt-bindings/clock/gxbb-aoclkc.h>
10 #include <dt-bindings/gpio/meson-gxl-gpio.h>
11 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
14 compatible = "amlogic,meson-gxl";
18 compatible = "amlogic,meson-gxl-usb-ctrl";
21 #address-cells = <2>;
22 #size-cells = <2>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/serial/
Damlogic,meson-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/serial/amlogic,meson-uart.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Neil Armstrong <narmstrong@baylibre.com>
15 of SoCs, and can be present either in the "Always-On" power domain or the
16 "Everything-Else" power domain.
18 The particularity of the "Always-On" Serial Interface is that the hardware
19 is active since power-on and does not need any clock gating and is usable
25 - description: Always-on power domain UART controller
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/serial/
Damlogic,meson-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/serial/amlogic,meson-uart.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Neil Armstrong <neil.armstrong@linaro.org>
15 of SoCs, and can be present either in the "Always-On" power domain or the
16 "Everything-Else" power domain.
18 The particularity of the "Always-On" Serial Interface is that the hardware
19 is active since power-on and does not need any clock gating and is usable
23 - $ref: serial.yaml#
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/timer/
Damlogic,meson6-timer.txt5 - compatible : should be "amlogic,meson6-timer"
6 - reg : Specifies base physical address and size of the registers.
7 - interrupts : The four interrupts, one for each timer event
8 - clocks : phandles to the pclk (system clock) and XTAL clocks
9 - clock-names : must contain "pclk" and "xtal"
14 compatible = "amlogic,meson6-timer";
20 clocks = <&xtal>, <&clk81>;
21 clock-names = "xtal", "pclk";

12345678910>>...21