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/kernel/linux/linux-6.6/drivers/dma/qcom/
Dqcom_adm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
10 #include <linux/dma-mapping.h>
27 #include "../virt-dma.h"
29 /* ADM registers - calculated from channel number and security domain */
48 #define ADM_CRCI_CTL(crci, ee) (0x400 + (crci) * ADM_CRCI_MULTI + \ argument
71 /* CRCI CTL */
99 #define ADM_MAX_XFER (SZ_64K - 1)
100 #define ADM_MAX_ROWS (SZ_64K - 1)
104 u32 cmd; member
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/
Dqcom_nandc.txt4 - compatible: must be one of the following:
5 * "qcom,ipq806x-nand" - for EBI2 NAND controller being used in IPQ806x
7 * "qcom,ipq4019-nand" - for QPIC NAND controller v1.4.0 being used in
9 * "qcom,ipq8074-nand" - for QPIC NAND controller v1.5.0 being used in
12 - reg: MMIO address range
13 - clocks: must contain core clock and always on clock
14 - clock-names: must contain "core" for the core clock and "aon" for the
18 - dmas: DMA specifier, consisting of a phandle to the ADM DMA
21 - dma-names: must be "rxtx"
22 - qcom,cmd-crci: must contain the ADM command type CRCI block instance
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/
Dqcom,nandc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15 - qcom,ipq806x-nand
16 - qcom,ipq4019-nand
17 - qcom,ipq6018-nand
18 - qcom,ipq8074-nand
19 - qcom,sdx55-nand
26 - description: Core Clock
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/kernel/linux/linux-6.6/drivers/mtd/nand/raw/
Dqcom_nandc.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
207 #define dev_cmd_reg_addr(nandc, reg) ((nandc)->props->dev_cmd_reg_start + (reg))
210 #define nandc_reg_phys(chip, offset) ((chip)->base_phys + (offset))
214 ((chip)->reg_read_dma + \
215 ((u8 *)(vaddr) - (u8 *)(chip)->reg_read_buf))
244 * @bam_ce - the array of BAM command elements
245 * @cmd_sgl - sgl for NAND BAM command pipe
246 * @data_sgl - sgl for NAND BAM consumer/producer pipe
247 * @last_data_desc - last DMA desc in data channel (tx/rx).
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/kernel/linux/linux-5.10/drivers/mtd/nand/raw/
Dqcom_nandc.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/dma-mapping.h>
192 #define dev_cmd_reg_addr(nandc, reg) ((nandc)->props->dev_cmd_reg_start + (reg))
195 #define nandc_reg_phys(chip, offset) ((chip)->base_phys + (offset))
199 ((chip)->reg_read_dma + \
200 ((uint8_t *)(vaddr) - (uint8_t *)(chip)->reg_read_buf))
227 * @bam_ce - the array of BAM command elements
228 * @cmd_sgl - sgl for NAND BAM command pipe
229 * @data_sgl - sgl for NAND BAM consumer/producer pipe
230 * @bam_ce_pos - the index in bam_ce which is available for next sgl
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/kernel/linux/linux-6.6/arch/arm/boot/dts/qcom/
Dqcom-ipq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mfd/qcom-rpm.h>
6 #include <dt-bindings/clock/qcom,rpmcc.h>
7 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
8 #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq806x.h>
11 #include <dt-bindings/soc/qcom,gsbi.h>
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