| /kernel/linux/linux-6.6/drivers/clk/samsung/ |
| D | clk-exynos-arm64.c | 43 * @np: CMU device tree node with "reg" property (CMU addr)
77 * exynos_arm64_enable_bus_clk - Enable parent clock of specified CMU
81 * @np: CMU device tree node
82 * @cmu: CMU data
84 * Keep CMU parent clock running (needed for CMU registers access).
89 struct device_node *np, const struct samsung_cmu_info *cmu) in exynos_arm64_enable_bus_clk() argument
93 if (!cmu->clk_name) in exynos_arm64_enable_bus_clk()
99 parent_clk = clk_get(dev, cmu->clk_name); in exynos_arm64_enable_bus_clk()
104 parent_clk = of_clk_get_by_name(np, cmu->clk_name); in exynos_arm64_enable_bus_clk()
114 const struct samsung_cmu_info *cmu) in exynos_arm64_cmu_prepare_pm() argument
[all …]
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| D | clk.c | 58 * @dev: CMU device to enable runtime PM, or NULL if RPM is not needed
59 * @base: Start address (mapped) of CMU registers
339 * samsung_cmu_register_clocks() - Register all clocks provided in CMU object
341 * @cmu: CMU object with clocks to register
344 const struct samsung_cmu_info *cmu) in samsung_cmu_register_clocks() argument
346 if (cmu->pll_clks) in samsung_cmu_register_clocks()
347 samsung_clk_register_pll(ctx, cmu->pll_clks, cmu->nr_pll_clks); in samsung_cmu_register_clocks()
348 if (cmu->mux_clks) in samsung_cmu_register_clocks()
349 samsung_clk_register_mux(ctx, cmu->mux_clks, cmu->nr_mux_clks); in samsung_cmu_register_clocks()
350 if (cmu->div_clks) in samsung_cmu_register_clocks()
[all …]
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| D | clk-exynos5-subcmu.c | 17 static const struct exynos5_subcmu_info **cmu; variable
48 * Pass the needed clock provider context and register sub-CMU clocks
62 cmu = _cmu; in exynos5_subcmus_init()
166 if (strcmp(cmu[i]->pd_name, name) == 0) in exynos5_clk_probe()
168 cmu[i], np); in exynos5_clk_probe()
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ |
| D | samsung,exynos5433-clock.yaml | 29 - samsung,exynos5433-cmu-top
31 - samsung,exynos5433-cmu-cpif
33 - samsung,exynos5433-cmu-mif
36 - samsung,exynos5433-cmu-peric
38 - samsung,exynos5433-cmu-peris
40 - samsung,exynos5433-cmu-fsys
41 - samsung,exynos5433-cmu-g2d
43 - samsung,exynos5433-cmu-disp
44 - samsung,exynos5433-cmu-aud
45 - samsung,exynos5433-cmu-bus0
[all …]
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| D | samsung,exynos850-clock.yaml | 17 Exynos850 clock controller is comprised of several CMU units, generating
18 clocks for different domains. Those CMU units are modeled as separate device
23 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
34 - samsung,exynos850-cmu-top
35 - samsung,exynos850-cmu-apm
36 - samsung,exynos850-cmu-aud
37 - samsung,exynos850-cmu-cmgp
38 - samsung,exynos850-cmu-core
39 - samsung,exynos850-cmu-dpu
40 - samsung,exynos850-cmu-g3d
[all …]
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| D | samsung,exynosautov9-clock.yaml | 17 Exynos Auto v9 clock controller is comprised of several CMU units, generating
18 clocks for different domains. Those CMU units are modeled as separate device
23 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
35 - samsung,exynosautov9-cmu-top
36 - samsung,exynosautov9-cmu-busmc
37 - samsung,exynosautov9-cmu-core
38 - samsung,exynosautov9-cmu-fsys0
39 - samsung,exynosautov9-cmu-fsys1
40 - samsung,exynosautov9-cmu-fsys2
41 - samsung,exynosautov9-cmu-peric0
[all …]
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| D | actions,owl-cmu.txt | 1 * Actions Semi Owl Clock Management Unit (CMU)
10 "actions,s900-cmu"
11 "actions,s700-cmu"
12 "actions,s500-cmu"
23 dt-bindings/clock/actions,s900-cmu.h or actions,s700-cmu.h or
24 actions,s500-cmu.h header and can be used in device tree sources.
31 Actions Semi S900 CMU also requires one more clock:
36 cmu: clock-controller@e0160000 {
37 compatible = "actions,s900-cmu";
51 clocks = <&cmu CLK_UART5>;
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| D | samsung,exynos7885-clock.yaml | 17 Exynos7885 clock controller is comprised of several CMU units, generating
18 clocks for different domains. Those CMU units are modeled as separate device
23 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
34 - samsung,exynos7885-cmu-top
35 - samsung,exynos7885-cmu-core
36 - samsung,exynos7885-cmu-fsys
37 - samsung,exynos7885-cmu-peri
58 const: samsung,exynos7885-cmu-top
74 const: samsung,exynos7885-cmu-core
96 const: samsung,exynos7885-cmu-fsys
[all …]
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| D | samsung,exynos-clock.yaml | 23 - samsung,exynos3250-cmu
24 - samsung,exynos3250-cmu-dmc
25 - samsung,exynos3250-cmu-isp
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | exynos5433-clock.txt | 1 * Samsung Exynos5433 CMU (Clock Management Units)
9 - "samsung,exynos5433-cmu-top" - clock controller compatible for CMU_TOP
12 - "samsung,exynos5433-cmu-cpif" - clock controller compatible for CMU_CPIF
14 - "samsung,exynos5433-cmu-mif" - clock controller compatible for CMU_MIF
16 - "samsung,exynos5433-cmu-peric" - clock controller compatible for CMU_PERIC
18 - "samsung,exynos5433-cmu-peris" - clock controller compatible for CMU_PERIS
20 - "samsung,exynos5433-cmu-fsys" - clock controller compatible for CMU_FSYS
22 - "samsung,exynos5433-cmu-g2d" - clock controller compatible for CMU_G2D
24 - "samsung,exynos5433-cmu-disp" - clock controller compatible for CMU_DISP
26 - "samsung,exynos5433-cmu-aud" - clock controller compatible for CMU_AUD
[all …]
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| D | actions,owl-cmu.txt | 1 * Actions Semi Owl Clock Management Unit (CMU)
10 "actions,s900-cmu"
11 "actions,s700-cmu"
12 "actions,s500-cmu"
23 dt-bindings/clock/actions,s900-cmu.h or actions,s700-cmu.h or
24 actions,s500-cmu.h header and can be used in device tree sources.
31 Actions Semi S900 CMU also requires one more clock:
36 cmu: clock-controller@e0160000 {
37 compatible = "actions,s900-cmu";
51 clocks = <&cmu CLK_UART5>;
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| D | exynos3250-clock.txt | 9 - "samsung,exynos3250-cmu" - controller compatible with Exynos3250 SoC.
10 - "samsung,exynos3250-cmu-dmc" - controller compatible with
12 - "samsung,exynos3250-cmu-isp" - ISP block clock controller compatible
29 cmu: clock-controller@10030000 {
30 compatible = "samsung,exynos3250-cmu";
36 compatible = "samsung,exynos3250-cmu-dmc";
42 compatible = "samsung,exynos3250-cmu-isp";
55 clocks = <&cmu CLK_UART0>, <&cmu CLK_SCLK_UART0>;
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/samsung/ |
| D | exynos3250.dtsi | 81 clocks = <&cmu CLK_DIV_ACLK_200>;
89 clocks = <&cmu CLK_DIV_ACLK_266>;
117 clocks = <&cmu CLK_DIV_ACLK_160>;
125 clocks = <&cmu CLK_DIV_GDL>;
133 clocks = <&cmu CLK_DIV_ACLK_400_MCUISP>;
161 clocks = <&cmu CLK_SCLK_MFC>;
169 clocks = <&cmu CLK_DIV_ACLK_100>;
191 clocks = <&cmu CLK_DIV_GDR>;
217 clocks = <&cmu CLK_ARM_CLK>;
240 clocks = <&cmu CLK_ARM_CLK>;
[all …]
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| D | exynos3250-artik5-eval.dts | 49 assigned-clocks = <&cmu CLK_MOUT_SPI0>, <&cmu CLK_DIV_SPI0>,
50 <&cmu CLK_DIV_SPI0_PRE>, <&cmu CLK_SCLK_SPI0>;
51 assigned-clock-parents = <&cmu CLK_DIV_MPLL_PRE>, /* for: CLK_MOUT_SPI0 */
52 <&cmu CLK_MOUT_SPI0>, /* for: CLK_DIV_SPI0 */
53 <&cmu CLK_DIV_SPI0>, /* for: CLK_DIV_SPI0_PRE */
54 <&cmu CLK_DIV_SPI0_PRE>; /* for: CLK_SCLK_SPI0 */
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | exynos3250.dtsi | 58 clocks = <&cmu CLK_ARM_CLK>;
81 clocks = <&cmu CLK_ARM_CLK>;
168 clocks = <&cmu CLK_FIN_PLL>;
213 cmu: clock-controller@10030000 { label
214 compatible = "samsung,exynos3250-cmu";
217 assigned-clocks = <&cmu CLK_MOUT_ACLK_400_MCUISP_SUB>,
218 <&cmu CLK_MOUT_ACLK_266_SUB>;
219 assigned-clock-parents = <&cmu CLK_FIN_PLL>,
220 <&cmu CLK_FIN_PLL>;
224 compatible = "samsung,exynos3250-cmu-dmc";
[all …]
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| D | efm32gg.dtsi | 10 #include "dt-bindings/clock/efm32-cmu.h"
34 clocks = <&cmu clk_HFPERCLKADC0>;
46 clocks = <&cmu clk_HFPERCLKGPIO>;
56 clocks = <&cmu clk_HFPERCLKI2C0>;
67 clocks = <&cmu clk_HFPERCLKI2C1>;
78 clocks = <&cmu clk_HFPERCLKUSART0>;
88 clocks = <&cmu clk_HFPERCLKUSART1>;
98 clocks = <&cmu clk_HFPERCLKUSART2>;
106 clocks = <&cmu clk_HFPERCLKUSART0>;
114 clocks = <&cmu clk_HFPERCLKUSART1>;
[all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/actions/ |
| D | s900.dtsi | 6 #include <dt-bindings/clock/actions,s900-cmu.h>
125 clocks = <&cmu CLK_UART0>;
133 clocks = <&cmu CLK_UART1>;
141 clocks = <&cmu CLK_UART2>;
149 clocks = <&cmu CLK_UART3>;
157 clocks = <&cmu CLK_UART4>;
165 clocks = <&cmu CLK_UART5>;
173 clocks = <&cmu CLK_UART6>;
184 cmu: clock-controller@e0160000 { label
185 compatible = "actions,s900-cmu";
[all …]
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| D | s700.dtsi | 6 #include <dt-bindings/clock/actions,s700-cmu.h>
119 clocks = <&cmu CLK_UART0>;
127 clocks = <&cmu CLK_UART1>;
135 clocks = <&cmu CLK_UART2>;
143 clocks = <&cmu CLK_UART3>;
151 clocks = <&cmu CLK_UART4>;
159 clocks = <&cmu CLK_UART5>;
167 clocks = <&cmu CLK_UART6>;
172 cmu: clock-controller@e0168000 { label
173 compatible = "actions,s700-cmu";
[all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/actions/ |
| D | s900.dtsi | 6 #include <dt-bindings/clock/actions,s900-cmu.h>
125 clocks = <&cmu CLK_UART0>;
133 clocks = <&cmu CLK_UART1>;
141 clocks = <&cmu CLK_UART2>;
149 clocks = <&cmu CLK_UART3>;
157 clocks = <&cmu CLK_UART4>;
165 clocks = <&cmu CLK_UART5>;
173 clocks = <&cmu CLK_UART6>;
184 cmu: clock-controller@e0160000 { label
185 compatible = "actions,s900-cmu";
[all …]
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| D | s700.dtsi | 6 #include <dt-bindings/clock/actions,s700-cmu.h>
119 clocks = <&cmu CLK_UART0>;
127 clocks = <&cmu CLK_UART1>;
135 clocks = <&cmu CLK_UART2>;
143 clocks = <&cmu CLK_UART3>;
151 clocks = <&cmu CLK_UART4>;
159 clocks = <&cmu CLK_UART5>;
167 clocks = <&cmu CLK_UART6>;
172 cmu: clock-controller@e0168000 { label
173 compatible = "actions,s700-cmu";
[all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/actions/ |
| D | owl-s500.dtsi | 8 #include <dt-bindings/clock/actions,s500-cmu.h>
136 clocks = <&cmu CLK_UART0>;
144 clocks = <&cmu CLK_UART1>;
152 clocks = <&cmu CLK_UART2>;
160 clocks = <&cmu CLK_UART3>;
168 clocks = <&cmu CLK_UART4>;
176 clocks = <&cmu CLK_UART5>;
184 clocks = <&cmu CLK_UART6>;
188 cmu: clock-controller@b0160000 { label
189 compatible = "actions,s500-cmu";
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/samsung/ |
| D | clk.c | 343 * for each CMU. It also add CMU register list to register cache.
347 const struct samsung_cmu_info *cmu) in samsung_cmu_register_one() argument
358 ctx = samsung_clk_init(np, reg_base, cmu->nr_clk_ids); in samsung_cmu_register_one()
360 if (cmu->pll_clks) in samsung_cmu_register_one()
361 samsung_clk_register_pll(ctx, cmu->pll_clks, cmu->nr_pll_clks, in samsung_cmu_register_one()
363 if (cmu->mux_clks) in samsung_cmu_register_one()
364 samsung_clk_register_mux(ctx, cmu->mux_clks, in samsung_cmu_register_one()
365 cmu->nr_mux_clks); in samsung_cmu_register_one()
366 if (cmu->div_clks) in samsung_cmu_register_one()
367 samsung_clk_register_div(ctx, cmu->div_clks, cmu->nr_div_clks); in samsung_cmu_register_one()
[all …]
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| D | clk-exynos5-subcmu.c | 17 static const struct exynos5_subcmu_info **cmu; variable
48 * Pass the needed clock provider context and register sub-CMU clocks
62 cmu = _cmu; in exynos5_subcmus_init()
166 if (strcmp(cmu[i]->pd_name, name) == 0) in exynos5_clk_probe()
168 cmu[i], np); in exynos5_clk_probe()
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/ |
| D | actions,owl-emac.yaml | 72 #include <dt-bindings/clock/actions,s500-cmu.h>
80 clocks = <&cmu 59 /*CLK_ETHERNET*/>, <&cmu CLK_RMII_REF>;
82 resets = <&cmu RESET_ETHERNET>;
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| /kernel/linux/linux-5.10/include/dt-bindings/clock/ |
| D | exynos3250.h | 22 * Main CMU
260 * Total number of clocks of main CMU.
266 * CMU DMC
287 * Total number of clocks of main CMU.
293 * CMU ISP
|