Searched full:cmu_aud (Results 1 – 22 of 22) sorted by relevance
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/ |
| D | samsung,exynos5433-lpass.txt | 31 clocks = <&cmu_aud CLK_PCLK_SFR0_CTRL>;
41 clocks = <&cmu_aud CLK_ACLK_DMAC>;
54 clocks = <&cmu_aud CLK_PCLK_AUD_I2S>,
55 <&cmu_aud CLK_SCLK_AUD_I2S>,
56 <&cmu_aud CLK_SCLK_I2S_BCLK>;
66 clocks = <&cmu_aud CLK_PCLK_AUD_UART>,
67 <&cmu_aud CLK_SCLK_AUD_UART>;
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mfd/ |
| D | samsung,exynos5433-lpass.yaml | 68 clocks = <&cmu_aud CLK_PCLK_SFR0_CTRL>;
79 clocks = <&cmu_aud CLK_ACLK_DMAC>;
95 clocks = <&cmu_aud CLK_PCLK_AUD_I2S>,
96 <&cmu_aud CLK_SCLK_AUD_I2S>,
97 <&cmu_aud CLK_SCLK_I2S_BCLK>;
110 clocks = <&cmu_aud CLK_PCLK_AUD_UART>,
111 <&cmu_aud CLK_SCLK_AUD_UART>;
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/exynos/ |
| D | exynos5433-tm2-common.dtsi | 225 &cmu_aud {
226 assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
227 <&cmu_aud CLK_MOUT_SCLK_AUD_I2S>,
228 <&cmu_aud CLK_MOUT_SCLK_AUD_PCM>,
235 <&cmu_aud CLK_DIV_AUD_CA5>,
236 <&cmu_aud CLK_DIV_ACLK_AUD>,
237 <&cmu_aud CLK_DIV_PCLK_DBG_AUD>,
238 <&cmu_aud CLK_DIV_SCLK_AUD_I2S>,
239 <&cmu_aud CLK_DIV_SCLK_AUD_PCM>,
240 <&cmu_aud CLK_DIV_SCLK_AUD_SLIMBUS>,
[all …]
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| D | exynos5433.dtsi | 482 cmu_aud: clock-controller@114c0000 { label
1882 clocks = <&cmu_aud CLK_PCLK_SFR0_CTRL>;
1893 clocks = <&cmu_aud CLK_ACLK_DMAC>;
1907 clocks = <&cmu_aud CLK_PCLK_AUD_I2S>,
1908 <&cmu_aud CLK_SCLK_AUD_I2S>,
1909 <&cmu_aud CLK_SCLK_I2S_BCLK>;
1923 clocks = <&cmu_aud CLK_PCLK_AUD_UART>,
1924 <&cmu_aud CLK_SCLK_AUD_UART>;
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| D | exynos850.dtsi | 348 cmu_aud: clock-controller@14a00000 { label
555 clocks = <&cmu_aud CLK_GOUT_AUD_SYSMMU_CLK>;
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/exynos/ |
| D | exynos5433-tm2-common.dtsi | 220 &cmu_aud {
221 assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
222 <&cmu_aud CLK_MOUT_SCLK_AUD_I2S>,
223 <&cmu_aud CLK_MOUT_SCLK_AUD_PCM>,
230 <&cmu_aud CLK_DIV_AUD_CA5>,
231 <&cmu_aud CLK_DIV_ACLK_AUD>,
232 <&cmu_aud CLK_DIV_PCLK_DBG_AUD>,
233 <&cmu_aud CLK_DIV_SCLK_AUD_I2S>,
234 <&cmu_aud CLK_DIV_SCLK_AUD_PCM>,
235 <&cmu_aud CLK_DIV_SCLK_AUD_SLIMBUS>,
[all …]
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| D | exynos5433.dtsi | 384 cmu_aud: clock-controller@114c0000 { label
1780 clocks = <&cmu_aud CLK_PCLK_SFR0_CTRL>;
1792 clocks = <&cmu_aud CLK_ACLK_DMAC>;
1808 clocks = <&cmu_aud CLK_PCLK_AUD_I2S>,
1809 <&cmu_aud CLK_SCLK_AUD_I2S>,
1810 <&cmu_aud CLK_SCLK_I2S_BCLK>;
1824 clocks = <&cmu_aud CLK_PCLK_AUD_UART>,
1825 <&cmu_aud CLK_SCLK_AUD_UART>;
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | exynos5433-clock.txt | 26 - "samsung,exynos5433-cmu-aud" - clock controller compatible for CMU_AUD
315 cmu_aud: clock-controller@114c0000 {
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| /kernel/linux/linux-6.6/include/dt-bindings/clock/ |
| D | exynos850.h | 118 /* CMU_AUD */
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| D | exynos5260-clk.h | 207 /* List Of Clocks For CMU_AUD */
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| D | exynos5433.h | 760 /* CMU_AUD */
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| /kernel/linux/linux-5.10/include/dt-bindings/clock/ |
| D | exynos5260-clk.h | 217 /* List Of Clocks For CMU_AUD */
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| D | exynos5433.h | 776 /* CMU_AUD */
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| /kernel/linux/linux-6.6/drivers/clk/samsung/ |
| D | clk-exynos5260.h | 13 *Registers for CMU_AUD
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| D | clk-exynos850.c | 223 /* List of parent clocks for Muxes in CMU_TOP: for CMU_AUD */
647 /* ---- CMU_AUD ------------------------------------------------------------- */
761 /* List of parent clocks for Muxes in CMU_AUD */
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| D | clk-exynos7.c | 1229 /* Register Offset definitions for CMU_AUD (0x114C0000) */
1238 * List of parent clocks for Muxes in CMU_AUD
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| D | clk-exynos5260.c | 91 /* CMU_AUD */
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| D | clk-exynos5433.c | 2922 * Register offset definitions for CMU_AUD
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| /kernel/linux/linux-5.10/drivers/clk/samsung/ |
| D | clk-exynos5260.h | 13 *Registers for CMU_AUD
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| D | clk-exynos7.c | 1229 /* Register Offset definitions for CMU_AUD (0x114C0000) */
1238 * List of parent clocks for Muxes in CMU_AUD
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| D | clk-exynos5260.c | 76 /* CMU_AUD */
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| D | clk-exynos5433.c | 2899 * Register offset definitions for CMU_AUD
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