Searched full:cmu_cpif (Results 1 – 8 of 8) sorted by relevance
12 - "samsung,exynos5433-cmu-cpif" - clock controller compatible for CMU_CPIF211 <&cmu_cpif CLK_SCLK_MPHY_PLL>,216 cmu_cpif: clock-controller@10fc0000 {233 <&cmu_cpif CLK_SCLK_MPHY_PLL>;264 <&cmu_cpif CLK_SCLK_UFS_MPHY>,
30 # CMU_CPIF which generates clocks for LLI (Low Latency Interface) IP521 <&cmu_cpif CLK_SCLK_MPHY_PLL>,
280 <&cmu_cpif CLK_SCLK_MPHY_PLL>,285 cmu_cpif: clock-controller@10fc0000 { label302 <&cmu_cpif CLK_SCLK_MPHY_PLL>;333 <&cmu_cpif CLK_SCLK_UFS_MPHY>,
378 <&cmu_cpif CLK_SCLK_MPHY_PLL>,383 cmu_cpif: clock-controller@10fc0000 { label400 <&cmu_cpif CLK_SCLK_MPHY_PLL>;431 <&cmu_cpif CLK_SCLK_UFS_MPHY>,
191 /* CMU_CPIF */
193 /* CMU_CPIF */
816 * Register offset definitions for CMU_CPIF
839 * Register offset definitions for CMU_CPIF