| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/remoteproc/ |
| D | st-rproc.txt | 1 STMicroelectronics Co-Processor Bindings
2 ----------------------------------------
4 This binding provides support for adjunct processors found on ST SoCs.
6 Co-processors can be controlled from the bootloader or the primary OS. If
7 the bootloader starts a co-processor, the primary OS must detect its state
11 - compatible Should be one of:
12 "st,st231-rproc"
13 "st,st40-rproc"
14 - memory-region Reserved memory (See: ../reserved-memory/reserved-memory.txt)
15 - resets Reset lines (See: ../reset/reset.txt)
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/remoteproc/ |
| D | st-rproc.txt | 1 STMicroelectronics Co-Processor Bindings
2 ----------------------------------------
4 This binding provides support for adjunct processors found on ST SoCs.
6 Co-processors can be controlled from the bootloader or the primary OS. If
7 the bootloader starts a co-processor, the primary OS must detect its state
11 - compatible Should be one of:
12 "st,st231-rproc"
13 "st,st40-rproc"
14 - memory-region Reserved memory (See: ../reserved-memory/reserved-memory.txt)
15 - resets Reset lines (See: ../reset/reset.txt)
[all …]
|
| /kernel/linux/linux-6.6/include/linux/soc/apple/ |
| D | rtkit.h | 1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
6 * Apple's SoCs come with various co-processors running their RTKit operating
18 * Struct to represent implementation-specific RTKit operations.
21 * @iomem: Shared memory buffer controlled by the co-processors.
24 * @is_mapped: Shared memory buffer is managed by the co-processor.
38 * Struct to represent implementation-specific RTKit operations.
40 * @crashed: Called when the co-processor has crashed. Runs in process
43 * on a non-system endpoint. Called from a worker thread.
50 * buffer is managed by the co-processor and needs to be mapped.
74 * @mbox_name: mailbox name used to communicate with the co-processor
[all …]
|
| /kernel/linux/linux-6.6/arch/parisc/include/asm/ |
| D | ldcw.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 /* Because kmalloc only guarantees 8-byte alignment for kmalloc'd data,
6 and GCC only guarantees 8-byte alignment for stack locals, we can't
7 be assured of 16-byte alignment for atomic lock data even if we
10 type and dynamically select the 16-byte aligned int from the array
15 long as the ",CO" (coherent operation) completer is implemented, then the
16 16-byte alignment requirement for ldcw and ldcd is relaxed, and instead
17 they only require "natural" alignment (4-byte for ldcw, 8-byte for
20 Although the cache control hint is accepted by all PA 2.0 processors,
22 require 16-byte alignment. If the address is unaligned, the operation
[all …]
|
| /kernel/linux/linux-5.10/arch/parisc/include/asm/ |
| D | ldcw.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 /* Because kmalloc only guarantees 8-byte alignment for kmalloc'd data,
6 and GCC only guarantees 8-byte alignment for stack locals, we can't
7 be assured of 16-byte alignment for atomic lock data even if we
10 type and dynamically select the 16-byte aligned int from the array
15 long as the ",CO" (coherent operation) completer is implemented, then the
16 16-byte alignment requirement for ldcw and ldcd is relaxed, and instead
17 they only require "natural" alignment (4-byte for ldcw, 8-byte for
20 Although the cache control hint is accepted by all PA 2.0 processors,
22 require 16-byte alignment. If the address is unaligned, the operation
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/timer/ |
| D | csky,mptimer.txt | 2 C-SKY Multi-processors Timer
5 C-SKY multi-processors timer is designed for C-SKY SMP system and the
6 regs is accessed by cpu co-processor 4 registers with mtcr/mfcr.
8 - PTIM_CTLR "cr<0, 14>" Control reg to start reset timer.
9 - PTIM_TSR "cr<1, 14>" Interrupt cleanup status reg.
10 - PTIM_CCVR "cr<3, 14>" Current counter value reg.
11 - PTIM_LVR "cr<6, 14>" Window value reg to trigger next event.
21 - compatible
25 - clocks
29 - interrupts
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/timer/ |
| D | csky,mptimer.txt | 2 C-SKY Multi-processors Timer
5 C-SKY multi-processors timer is designed for C-SKY SMP system and the
6 regs is accessed by cpu co-processor 4 registers with mtcr/mfcr.
8 - PTIM_CTLR "cr<0, 14>" Control reg to start reset timer.
9 - PTIM_TSR "cr<1, 14>" Interrupt cleanup status reg.
10 - PTIM_CCVR "cr<3, 14>" Current counter value reg.
11 - PTIM_LVR "cr<6, 14>" Window value reg to trigger next event.
21 - compatible
25 - clocks
29 - interrupts
[all …]
|
| /kernel/linux/linux-6.6/drivers/mailbox/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
6 on-chip processors through queued messages and interrupt driven
16 Apple SoCs have various co-processors required for certain
70 running on the Cortex-M3 rWTM secure processor of the Armada 37xx
96 This driver provides support for inter-processor communication
118 to send message between processors. Say Y here if you want to use the
145 multiple processors within the SoC. Select this driver if your
155 between application processors and other processors/MCU/DSP. Select
165 between application processors and MCU. Say Y here if you want to
184 module will be called mailbox-mpfs.
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/interrupt-controller/ |
| D | csky,mpintc.txt | 2 C-SKY Multi-processors Interrupt Controller
5 C-SKY Multi-processors Interrupt Controller is designed for ck807/ck810/ck860
6 SMP soc, and it also could be used in non-SMP system.
9 0-15 : software irq, and we use 15 as our IPI_IRQ.
10 16-31 : private irq, and we use 16 as the co-processor timer.
11 31-1024: common irq for soc ip.
13 Interrupt trigger mode: (Defined in dt-bindings/interrupt-controller/irq.h)
27 - compatible
31 - #interrupt-cells
35 - interrupt-controller:
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | csky,mpintc.txt | 2 C-SKY Multi-processors Interrupt Controller
5 C-SKY Multi-processors Interrupt Controller is designed for ck807/ck810/ck860
6 SMP soc, and it also could be used in non-SMP system.
9 0-15 : software irq, and we use 15 as our IPI_IRQ.
10 16-31 : private irq, and we use 16 as the co-processor timer.
11 31-1024: common irq for soc ip.
13 Interrupt trigger mode: (Defined in dt-bindings/interrupt-controller/irq.h)
27 - compatible
31 - #interrupt-cells
35 - interrupt-controller:
[all …]
|
| /kernel/linux/linux-6.6/drivers/soc/apple/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
16 The PMGR block in Apple SoCs provides high-level power state
21 tristate "Apple RTKit co-processor IPC protocol"
26 Apple SoCs such as the M1 come with various co-processors running
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mailbox/ |
| D | apple,mailbox.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hector Martin <marcan@marcan.st>
11 - Sven Peter <sven@svenpeter.dev>
15 messages between the main CPU and a co-processor. Multiple instances
17 One of the two FIFOs is used to send data to a co-processor while the other
25 - description:
30 - enum:
31 - apple,t8103-asc-mailbox
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/rtc/ |
| D | rtc-meson-vrtc.txt | 8 - compatible: should be "amlogic,meson-vrtc"
9 - reg: physical address for the alarm register
12 application processors (AP) and the secure co-processor (SCP.) When
14 program an always-on timer before going sleep. When the timer expires,
20 compatible = "amlogic,meson-vrtc";
|
| /kernel/linux/linux-5.10/arch/powerpc/platforms/powernv/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
4 bool "IBM PowerNV (Non-Virtualized) platform support"
26 This enables the opal-prd driver, a facility to run processor
43 VAS allows accelerators in co-processors like NX-GZIP and NX-842
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/adc/ |
| D | ti,twl4030-madc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/ti,twl4030-madc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
13 The MADC subsystem in the TWL4030 consists of a 10-bit ADC
14 combined with a 16-input analog multiplexer.
18 const: ti,twl4030-madc
23 ti,system-uses-second-madc-irq:
27 to be used by Co-Processors (e.g. a modem).
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/iio/adc/ |
| D | ti,twl4030-madc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/ti,twl4030-madc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
13 The MADC subsystem in the TWL4030 consists of a 10-bit ADC
14 combined with a 16-input analog multiplexer.
18 const: ti,twl4030-madc
23 ti,system-uses-second-madc-irq:
27 to be used by Co-Processors (e.g. a modem).
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/rtc/ |
| D | amlogic,meson-vrtc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/amlogic,meson-vrtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Neil Armstrong <neil.armstrong@linaro.org>
17 application processors (AP) and the secure co-processor (SCP.) When
19 program an always-on timer before going sleep. When the timer expires,
23 - $ref: rtc.yaml#
28 - amlogic,meson-vrtc
34 - compatible
[all …]
|
| /kernel/linux/linux-6.6/drivers/crypto/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
8 processors. This option alone does not add any kernel code.
20 Some VIA processors come with an integrated crypto engine
39 called padlock-aes.
50 Available in VIA C7 and newer processors.
53 called padlock-sha.
61 Say 'Y' here to use the AMD Geode LX processor on-board AES
65 will be called geode-aes.
131 and uses triple-DES to generate secure random numbers like the
132 ANSI X9.17 standard. User-space programs access the
[all …]
|
| /kernel/linux/linux-5.10/drivers/crypto/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
8 processors. This option alone does not add any kernel code.
20 Some VIA processors come with an integrated crypto engine
39 called padlock-aes.
50 Available in VIA C7 and newer processors.
53 called padlock-sha.
61 Say 'Y' here to use the AMD Geode LX processor on-board AES
65 will be called geode-aes.
142 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
152 SHA256 secure hash standard (DFIPS 180-2).
[all …]
|
| /kernel/liteos_a/testsuites/unittest/extended/signal/full/ |
| D | signal_test_003.cpp | 2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
97 // count should be 1, for global variables are not shared between different processors in TestCase()
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/nds32/ |
| D | andestech-boards | 2 -----------------------------------------------------------------------------
7 - compatible = "andestech,ae3xx";
10 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
15 interrupt-parent = <&intc>;
19 -----------------------------------------------------------------------------
21 processors to provide a cost-effective and high performance solution for
28 system environment for early prototyping and software/hardware co-development.
34 /dts-v1/;
[all …]
|
| /kernel/linux/linux-6.6/arch/x86/kernel/cpu/ |
| D | hygon.c | 1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2018 Chengdu Haiguang IC Design Co., Ltd.
16 #include <asm/spec-ctrl.h>
38 for (i = apicid - 1; i >= 0; i--) { in nearby_node()
60 * (1) Hygon multi-node processors
62 * (2) Hygon processors supporting compute units
68 /* get information required for multi-node processors */ in hygon_get_topology()
75 c->cpu_die_id = ecx & 0xff; in hygon_get_topology()
77 c->cpu_core_id = ebx & 0xff; in hygon_get_topology()
80 c->x86_max_cores /= smp_num_siblings; in hygon_get_topology()
[all …]
|
| /kernel/linux/linux-5.10/arch/x86/kernel/cpu/ |
| D | hygon.c | 1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2018 Chengdu Haiguang IC Design Co., Ltd.
15 #include <asm/spec-ctrl.h>
40 for (i = apicid - 1; i >= 0; i--) { in nearby_node()
62 * (1) Hygon multi-node processors
64 * (2) Hygon processors supporting compute units
70 /* get information required for multi-node processors */ in hygon_get_topology()
77 c->cpu_die_id = ecx & 0xff; in hygon_get_topology()
79 c->cpu_core_id = ebx & 0xff; in hygon_get_topology()
82 c->x86_max_cores /= smp_num_siblings; in hygon_get_topology()
[all …]
|
| /kernel/linux/linux-5.10/crypto/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
141 bool "Disable run-time self tests"
144 Disable run-time self tests that normally take place at
148 bool "Enable extra run-time crypto self tests"
151 Enable extra run-time self tests of registered crypto algorithms,
222 comment "Public-key cryptography"
234 tristate "Diffie-Hellman algorithm"
238 Generic implementation of the Diffie-Hellman algorithm.
262 tristate "EC-RDSA (GOST 34.10) algorithm"
269 Elliptic Curve Russian Digital Signature Algorithm (GOST R 34.10-2012,
[all …]
|
| /kernel/liteos_a/arch/arm/arm/src/ |
| D | los_hw.c | 2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2023 Huawei Device Co., Ltd. All rights reserved.
37 /* armv7-a */
38 { 0xc07, "Cortex-A7" },
39 { 0xc09, "Cortex-A9" },
45 [0 ... LOSCFG_KERNEL_CORE_NUM - 1] = (UINT64)(-1)
77 … TaskContext *taskContext = (TaskContext *)(((UINTPTR)topStack + stackSize) - sizeof(TaskContext)); in OsTaskStackInit()
81 taskContext->PC = (UINTPTR)OsTaskEntrySetupLoopFrame; in OsTaskStackInit()
83 taskContext->PC = (UINTPTR)OsTaskEntry; in OsTaskStackInit()
85 …taskContext->LR = (UINTPTR)OsTaskExit; /* LR should be kept, to distinguish it's THUMB or ARM ins… in OsTaskStackInit()
[all …]
|