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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/
Darm,coresight-stm.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-stm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Arm CoreSight System Trace MacroCell
10 - Mathieu Poirier <mathieu.poirier@linaro.org>
11 - Mike Leach <mike.leach@linaro.org>
12 - Leo Yan <leo.yan@linaro.org>
13 - Suzuki K Poulose <suzuki.poulose@arm.com>
16 CoreSight components are compliant with the ARM CoreSight architecture
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/
Dcoresight.txt1 * CoreSight Components:
3 CoreSight components are compliant with the ARM CoreSight architecture
8 sink. Each CoreSight component device should use these properties to describe
11 * Required properties for all components *except* non-configurable replicators
12 and non-configurable funnels:
16 - Embedded Trace Buffer (version 1.0):
17 "arm,coresight-etb10", "arm,primecell";
19 - Trace Port Interface Unit:
20 "arm,coresight-tpiu", "arm,primecell";
22 - Trace Memory Controller, used for Embedded Trace Buffer(ETB),
[all …]
/kernel/linux/linux-5.10/Documentation/trace/coresight/
Dcoresight.rst2 Coresight - HW Assisted Tracing on ARM
9 ------------
11 Coresight is an umbrella of technologies allowing for the debugging of ARM
24 flows through the coresight system (via ATB bus) using links that are connecting
25 the emanating source to a sink(s). Sinks serve as endpoints to the coresight
28 host without fear of filling up the onboard coresight memory buffer.
30 At typical coresight system would look like this::
38 0 CPU 0<-->: C : 0 CPU 0<-->: C : : C : @ STM @ || System ||
39 |->0000000 : T : |->0000000 : T : : T :<--->@@@@@ || Memory ||
40 | #######<-->: I : | #######<-->: I : : I : @@@<-| ||||||||||||
[all …]
/kernel/linux/linux-6.6/Documentation/trace/coresight/
Dcoresight.rst2 Coresight - HW Assisted Tracing on ARM
9 ------------
11 Coresight is an umbrella of technologies allowing for the debugging of ARM
24 flows through the coresight system (via ATB bus) using links that are connecting
25 the emanating source to a sink(s). Sinks serve as endpoints to the coresight
28 host without fear of filling up the onboard coresight memory buffer.
30 At typical coresight system would look like this::
38 0 CPU 0<-->: C : 0 CPU 0<-->: C : : C : @ STM @ || System ||
39 |->0000000 : T : |->0000000 : T : : T :<--->@@@@@ || Memory ||
40 | #######<-->: I : | #######<-->: I : : I : @@@<-| ||||||||||||
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/sprd/
Dsc9836.dtsi10 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #address-cells = <2>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a53";
23 enable-method = "psci";
28 compatible = "arm,cortex-a53";
30 enable-method = "psci";
35 compatible = "arm,cortex-a53";
37 enable-method = "psci";
42 compatible = "arm,cortex-a53";
[all …]
Dsc9860.dtsi6 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
16 #address-cells = <2>;
17 #size-cells = <0>;
19 cpu-map {
53 compatible = "arm,cortex-a53";
55 enable-method = "psci";
56 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/sprd/
Dsc9836.dtsi10 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #address-cells = <2>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a53";
23 enable-method = "psci";
28 compatible = "arm,cortex-a53";
30 enable-method = "psci";
35 compatible = "arm,cortex-a53";
37 enable-method = "psci";
42 compatible = "arm,cortex-a53";
[all …]
Dsc9860.dtsi6 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
16 #address-cells = <2>;
17 #size-cells = <0>;
19 cpu-map {
53 compatible = "arm,cortex-a53";
55 enable-method = "psci";
56 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
[all …]
/kernel/linux/linux-6.6/drivers/hwtracing/coresight/
Dcoresight-stm.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
5 * Description: CoreSight System Trace Macrocell driver
8 * (C) 2014-2015 Pratik Patel <pratikp@codeaurora.org>
10 * Serious refactoring, code cleanup and upgrading to the Coresight upstream
12 * (C) 2015-2016 Mathieu Poirier <mathieu.poirier@linaro.org>
15 * generic STM API by Chunyan Zhang
16 * (C) 2015-2016 Chunyan Zhang <zhang.chunyan@linaro.org>
23 #include <linux/coresight.h>
24 #include <linux/coresight-stm.h>
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Coresight configuration
5 menuconfig CORESIGHT config
6 tristate "CoreSight Tracing Support"
13 This framework provides a kernel interface for the CoreSight debug
15 a topological view of the CoreSight components based on a DT
20 module will be called coresight.
22 if CORESIGHT
24 tristate "CoreSight Link and Sink drivers"
26 This enables support for CoreSight link and sink drivers that are
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for CoreSight drivers.
5 obj-$(CONFIG_CORESIGHT) += coresight.o
6 coresight-y := coresight-core.o coresight-etm-perf.o coresight-platform.o \
7 coresight-sysfs.o coresight-syscfg.o coresight-config.o \
8 coresight-cfg-preload.o coresight-cfg-afdo.o \
9 coresight-syscfg-configfs.o coresight-trace-id.o
10 obj-$(CONFIG_CORESIGHT_LINK_AND_SINK_TMC) += coresight-tmc.o
11 coresight-tmc-y := coresight-tmc-core.o coresight-tmc-etf.o \
12 coresight-tmc-etr.o
[all …]
/kernel/linux/linux-5.10/drivers/hwtracing/coresight/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Coresight configuration
5 menuconfig CORESIGHT config
6 tristate "CoreSight Tracing Support"
12 This framework provides a kernel interface for the CoreSight debug
14 a topological view of the CoreSight components based on a DT
19 module will be called coresight.
21 if CORESIGHT
23 tristate "CoreSight Link and Sink drivers"
25 This enables support for CoreSight link and sink drivers that are
[all …]
Dcoresight-stm.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
5 * Description: CoreSight System Trace Macrocell driver
8 * (C) 2014-2015 Pratik Patel <pratikp@codeaurora.org>
10 * Serious refactoring, code cleanup and upgrading to the Coresight upstream
12 * (C) 2015-2016 Mathieu Poirier <mathieu.poirier@linaro.org>
15 * generic STM API by Chunyan Zhang
16 * (C) 2015-2016 Chunyan Zhang <zhang.chunyan@linaro.org>
23 #include <linux/coresight.h>
24 #include <linux/coresight-stm.h>
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for CoreSight drivers.
5 obj-$(CONFIG_CORESIGHT) += coresight.o
6 coresight-y := coresight-core.o coresight-etm-perf.o coresight-platform.o \
7 coresight-sysfs.o
8 obj-$(CONFIG_CORESIGHT_LINK_AND_SINK_TMC) += coresight-tmc.o
9 coresight-tmc-y := coresight-tmc-core.o coresight-tmc-etf.o \
10 coresight-tmc-etr.o
11 obj-$(CONFIG_CORESIGHT_SINK_TPIU) += coresight-tpiu.o
12 obj-$(CONFIG_CORESIGHT_SINK_ETBV10) += coresight-etb10.o
[all …]
/kernel/linux/linux-6.6/drivers/hwtracing/stm/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 config STM config
6 A System Trace Module (STM) is a device exporting data in System
8 Examples of such devices are Intel(R) Trace Hub and Coresight STM.
12 if STM
15 tristate "Basic STM framing protocol driver"
18 This is a simple framing protocol for sending data over STM
19 devices. This was the protocol that the STM framework used
20 exclusively until the MIPI SyS-T support was added. Use this
21 driver for compatibility with your existing STM setup.
[all …]
/kernel/linux/linux-5.10/drivers/hwtracing/stm/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 config STM config
7 A System Trace Module (STM) is a device exporting data in System
9 Examples of such devices are Intel(R) Trace Hub and Coresight STM.
13 if STM
16 tristate "Basic STM framing protocol driver"
19 This is a simple framing protocol for sending data over STM
20 devices. This was the protocol that the STM framework used
21 exclusively until the MIPI SyS-T support was added. Use this
22 driver for compatibility with your existing STM setup.
[all …]
/kernel/linux/linux-5.10/include/uapi/linux/
Dcoresight-stm.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
12 * The CoreSight STM supports guaranteed and invariant timing
15 * ensure the transaction is accepted by the STM. While invariant
18 * state of the STM.
/kernel/linux/linux-6.6/include/uapi/linux/
Dcoresight-stm.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
12 * The CoreSight STM supports guaranteed and invariant timing
15 * ensure the transaction is accepted by the STM. While invariant
18 * state of the STM.
/kernel/linux/linux-5.10/arch/arm64/boot/dts/arm/
Djuno-base.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "juno-clocks.dtsi"
3 #include "juno-motherboard.dtsi"
11 compatible = "arm,armv7-timer-mem";
13 clock-frequency = <50000000>;
14 #address-cells = <1>;
15 #size-cells = <1>;
19 frame-number = <1>;
30 interrupt-names = "mhu_lpri_rx",
32 #mbox-cells = <1>;
[all …]
/kernel/linux/linux-5.10/drivers/acpi/
Dacpi_amba.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/clk-provider.h>
24 {"ARMHC500", 0}, /* ARM CoreSight ETM4x */
25 {"ARMHC501", 0}, /* ARM CoreSight ETR */
26 {"ARMHC502", 0}, /* ARM CoreSight STM */
27 {"ARMHC503", 0}, /* ARM CoreSight Debug */
28 {"ARMHC979", 0}, /* ARM CoreSight TPIU */
29 {"ARMHC97C", 0}, /* ARM CoreSight SoC-400 TMC, SoC-600 ETF/ETB */
30 {"ARMHC98D", 0}, /* ARM CoreSight Dynamic Replicator */
31 {"ARMHC9CA", 0}, /* ARM CoreSight CATU */
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/arm/
Djuno-base.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "juno-clocks.dtsi"
3 #include "juno-motherboard.dtsi"
11 compatible = "arm,armv7-timer-mem";
13 clock-frequency = <50000000>;
14 #address-cells = <1>;
15 #size-cells = <1>;
19 frame-number = <1>;
31 #mbox-cells = <1>;
33 clock-names = "apb_pclk";
[all …]
/kernel/linux/linux-6.6/drivers/acpi/arm64/
Damba.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/clk-provider.h>
24 {"ARMH0330", 0}, /* ARM DMA Controller DMA-330 */
25 {"ARMHC501", 0}, /* ARM CoreSight ETR */
26 {"ARMHC502", 0}, /* ARM CoreSight STM */
27 {"ARMHC503", 0}, /* ARM CoreSight Debug */
28 {"ARMHC979", 0}, /* ARM CoreSight TPIU */
29 {"ARMHC97C", 0}, /* ARM CoreSight SoC-400 TMC, SoC-600 ETF/ETB */
30 {"ARMHC98D", 0}, /* ARM CoreSight Dynamic Replicator */
31 {"ARMHC9CA", 0}, /* ARM CoreSight CATU */
[all …]
/kernel/linux/linux-5.10/Documentation/trace/
Dstm.rst1 .. SPDX-License-Identifier: GPL-2.0
7 System Trace Module (STM) is a device described in MIPI STP specs as
26 To solve this mapping problem, stm class provides a policy management
34 associated with it, located in "stp-policy" subsystem directory in
36 the STM device name to which this policy applies and an arbitrary
40 $ ls /config/stp-policy/dummy_stm.my-policy/user
42 $ cat /config/stp-policy/dummy_stm.my-policy/user/masters
44 $ cat /config/stp-policy/dummy_stm.my-policy/user/channels
57 Trace sources have to open the stm class device's node and write their
67 stm core will try to find a policy node with the name matching the
[all …]
/kernel/linux/linux-6.6/Documentation/trace/
Dstm.rst1 .. SPDX-License-Identifier: GPL-2.0
7 System Trace Module (STM) is a device described in MIPI STP specs as
26 To solve this mapping problem, stm class provides a policy management
34 associated with it, located in "stp-policy" subsystem directory in
36 the STM device name to which this policy applies and an arbitrary
40 $ ls /config/stp-policy/dummy_stm.my-policy/user
42 $ cat /config/stp-policy/dummy_stm.my-policy/user/masters
44 $ cat /config/stp-policy/dummy_stm.my-policy/user/channels
57 Trace sources have to open the stm class device's node and write their
67 stm core will try to find a policy node with the name matching the
[all …]
/kernel/linux/linux-6.6/include/linux/
Dcoresight-stm.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <uapi/linux/coresight-stm.h>

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