| /kernel/linux/linux-6.6/drivers/pci/controller/ |
| D | pcie-iproc-msi.c | 1 // SPDX-License-Identifier: GPL-2.0 14 #include "pcie-iproc.h" 52 * struct iproc_msi_grp - iProc MSI group 68 * struct iproc_msi - iProc event queue based MSI 73 * @pcie: pointer to iProc PCIe data 94 struct iproc_pcie *pcie; member 132 struct iproc_pcie *pcie = msi->pcie; in iproc_msi_read_reg() local 134 return readl_relaxed(pcie->base + msi->reg_offsets[eq][reg]); in iproc_msi_read_reg() 141 struct iproc_pcie *pcie = msi->pcie; in iproc_msi_write_reg() local 143 writel_relaxed(val, pcie->base + msi->reg_offsets[eq][reg]); in iproc_msi_write_reg() [all …]
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| /kernel/linux/linux-5.10/drivers/pci/controller/ |
| D | pcie-iproc-msi.c | 1 // SPDX-License-Identifier: GPL-2.0 14 #include "pcie-iproc.h" 73 * @pcie: pointer to iProc PCIe data 94 struct iproc_pcie *pcie; member 132 struct iproc_pcie *pcie = msi->pcie; in iproc_msi_read_reg() local 134 return readl_relaxed(pcie->base + msi->reg_offsets[eq][reg]); in iproc_msi_read_reg() 141 struct iproc_pcie *pcie = msi->pcie; in iproc_msi_write_reg() local 143 writel_relaxed(val, pcie->base + msi->reg_offsets[eq][reg]); in iproc_msi_write_reg() 148 return (hwirq % msi->nr_irqs); in hwirq_to_group() 154 if (msi->nr_msi_region > 1) in iproc_msi_addr_offset() [all …]
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| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/cascadelakex/ |
| D | uncore-io.json | 12 …PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could… 27 …PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could… 41 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-3", 51 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0", 61 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 1", 71 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 2", 81 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 3", 91 "BriefDescription": "PCIe Completion Buffer Inserts; Port 0", 101 "BriefDescription": "PCIe Completion Buffer Inserts; Port 1", 111 "BriefDescription": "PCIe Completion Buffer Inserts; Port 2", [all …]
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| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/skylakex/ |
| D | uncore-io.json | 12 …PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could… 27 …PCIe card of any size (x16,x8,x4) that is plugged directly into one of the PCIe slots. Part0 could… 41 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-3", 51 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0", 61 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 1", 71 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 2", 81 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 3", 91 "BriefDescription": "PCIe Completion Buffer Inserts; Port 0", 101 "BriefDescription": "PCIe Completion Buffer Inserts; Port 1", 111 "BriefDescription": "PCIe Completion Buffer Inserts; Port 2", [all …]
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| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/sapphirerapids/ |
| D | uncore-io.json | 148 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-7", 154 "PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 0-7", 159 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0", 165 …"PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 0 : x16 card … 170 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 1", 176 …"PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 1 : x16 card … 181 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 2", 187 …"PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 2 : x16 card … 192 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 3", 198 …"PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 2 : x16 card … [all …]
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| /kernel/linux/linux-6.6/Documentation/admin-guide/perf/ |
| D | nvidia-pmu.rst | 9 * NVLink-C2C0 10 * NVLink-C2C1 12 * PCIE 15 ---------- 19 PMUs are managed by a common driver "arm-cs-arch-pmu". This driver describes 22 the driver provides "cpumask" sysfs attribute to show the CPU id used to handle 29 ------- 31 The SCF PMU monitors system level cache events, CPU traffic, and 32 strongly-ordered (SO) PCIE write traffic to local/remote memory. Please see 37 see /sys/bus/event_sources/devices/nvidia_scf_pmu_<socket-id>. [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | armada-xp-mv78460.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 13 #include "armada-xp.dtsi" 17 compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp"; 27 #address-cells = <1>; 28 #size-cells = <0>; 29 enable-method = "marvell,armada-xp-smp"; 31 cpu@0 { 32 device_type = "cpu"; 33 compatible = "marvell,sheeva-v7"; [all …]
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| D | armada-385.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 * Gregory CLEMENT <gregory.clement@free-electrons.com> 9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 12 #include "armada-38x.dtsi" 19 #address-cells = <1>; 20 #size-cells = <0>; 21 enable-method = "marvell,armada-380-smp"; 23 cpu@0 { 24 device_type = "cpu"; 25 compatible = "arm,cortex-a9"; [all …]
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| D | armada-xp-mv78230.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 13 #include "armada-xp.dtsi" 17 compatible = "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp"; 25 #address-cells = <1>; 26 #size-cells = <0>; 27 enable-method = "marvell,armada-xp-smp"; 29 cpu@0 { 30 device_type = "cpu"; 31 compatible = "marvell,sheeva-v7"; [all …]
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| D | imx7d.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 7 #include <dt-bindings/reset/imx7-reset.h> 17 cpu0: cpu@0 { 18 clock-frequency = <996000000>; 19 operating-points-v2 = <&cpu0_opp_table>; 20 #cooling-cells = <2>; 21 nvmem-cells = <&fuse_grade>; 22 nvmem-cell-names = "speed_grade"; 25 cpu1: cpu@1 { 26 compatible = "arm,cortex-a7"; [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/nvidia/ |
| D | tegra210-p3450-0000.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/gpio-keys.h> 5 #include <dt-bindings/input/linux-event-codes.h> 6 #include <dt-bindings/mfd/max77620.h> 12 compatible = "nvidia,p3450-0000", "nvidia,tegra210"; 15 ethernet = "/pcie@1003000/pci@2,0/ethernet@0,0"; 22 stdout-path = "serial0:115200n8"; 30 pcie@1003000 { 33 avdd-pll-uerefe-supply = <&vdd_pex_1v05>; [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/marvell/ |
| D | armada-xp-mv78460.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 13 #include "armada-xp.dtsi" 17 compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp"; 27 #address-cells = <1>; 28 #size-cells = <0>; 29 enable-method = "marvell,armada-xp-smp"; 31 cpu@0 { 32 device_type = "cpu"; 33 compatible = "marvell,sheeva-v7"; [all …]
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| D | armada-385.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 * Gregory CLEMENT <gregory.clement@free-electrons.com> 9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 12 #include "armada-38x.dtsi" 19 #address-cells = <1>; 20 #size-cells = <0>; 21 enable-method = "marvell,armada-380-smp"; 23 cpu@0 { 24 device_type = "cpu"; 25 compatible = "arm,cortex-a9"; [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/ |
| D | meson-sm1-khadas-vim3l.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 9 #include "meson-sm1.dtsi" 10 #include "meson-khadas-vim3.dtsi" 11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h> 17 vddcpu: regulator-vddcpu { 21 compatible = "pwm-regulator"; 23 regulator-name = "VDDCPU"; 24 regulator-min-microvolt = <690000>; 25 regulator-max-microvolt = <1050000>; [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/amlogic/ |
| D | meson-sm1-khadas-vim3l.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 9 #include "meson-sm1.dtsi" 10 #include "meson-khadas-vim3.dtsi" 11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h> 17 vddcpu: regulator-vddcpu { 21 compatible = "pwm-regulator"; 23 regulator-name = "VDDCPU"; 24 regulator-min-microvolt = <690000>; 25 regulator-max-microvolt = <1050000>; [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls2088a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for Freescale Layerscape-2088A family SoC. 12 #include "fsl-ls208xa.dtsi" 14 &cpu { 15 cpu0: cpu@0 { 16 device_type = "cpu"; 17 compatible = "arm,cortex-a72"; 20 cpu-idle-states = <&CPU_PW20>; 21 next-level-cache = <&cluster0_l2>; 22 #cooling-cells = <2>; [all …]
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| /kernel/linux/linux-5.10/drivers/clk/qcom/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 27 the CPU with frequencies above 1GHz. 28 Say Y if you want to support higher CPU frequencies on MSM8916 37 Say Y if you want to support CPU frequency scaling on devices 41 tristate "MSM8996 CPU Clock Controller" 45 Support for the CPU clock controller on msm8996 devices. 46 Say Y if you want to support CPU clock scaling using CPUfreq 90 i2c, USB, SD/eMMC, SATA, PCIe, etc. 106 Say Y if you want to support CPU frequency scaling on ipq based 118 Say Y if you want to support CPU frequency scaling on [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls2088a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for Freescale Layerscape-2088A family SoC. 12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 13 #include "fsl-ls208xa.dtsi" 15 &cpu { 16 cpu0: cpu@0 { 17 device_type = "cpu"; 18 compatible = "arm,cortex-a72"; 21 cpu-idle-states = <&CPU_PW20>; 22 next-level-cache = <&cluster0_l2>; [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/airoha/ |
| D | en7523.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 #include <dt-bindings/interrupt-controller/irq.h> 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/clock/en7523-clk.h> 9 interrupt-parent = <&gic>; 10 #address-cells = <1>; 11 #size-cells = <1>; 13 reserved-memory { 14 #address-cells = <1>; [all …]
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| /kernel/linux/linux-6.6/arch/mips/boot/dts/ralink/ |
| D | mt7621.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 #include <dt-bindings/interrupt-controller/mips-gic.h> 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/clock/mt7621-clk.h> 5 #include <dt-bindings/reset/mt7621-reset.h> 8 #address-cells = <1>; 9 #size-cells = <1>; 10 compatible = "mediatek,mt7621-soc"; 13 #address-cells = <1>; 14 #size-cells = <0>; [all …]
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| /kernel/linux/linux-6.6/drivers/clk/qcom/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 27 the CPU with frequencies above 1GHz. 28 Say Y if you want to support higher CPU frequencies on MSM8916 34 Support for the A7 PLL on SDX55 and SDX65 devices. It provides the CPU with 36 Say Y if you want to support higher CPU frequencies on SDX55 and SDX65 45 Say Y if you want to support CPU frequency scaling on devices 49 tristate "MSM8996 CPU Clock Controller" 54 Support for the CPU clock controller on msm8996 devices. 55 Say Y if you want to support CPU clock scaling using CPUfreq 65 Say Y if you want to support CPU frequency scaling on devices [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/ |
| D | qcom,pcie-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/qcom,pcie-ep.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm PCIe Endpoint Controller 10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 15 - enum: 16 - qcom,sdx55-pcie-ep 17 - qcom,sm8450-pcie-ep 18 - items: [all …]
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| /kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/ |
| D | p3041si-post.dtsi | 4 * Copyright 2011 - 2015 Freescale Semiconductor Inc. 36 compatible = "fsl,bman-fbpr"; 37 alloc-ranges = <0 0 0x10 0>; 41 compatible = "fsl,qman-fqd"; 42 alloc-ranges = <0 0 0x10 0>; 46 compatible = "fsl,qman-pfdr"; 47 alloc-ranges = <0 0 0x10 0>; 51 compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus"; 53 #address-cells = <2>; 54 #size-cells = <1>; [all …]
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| D | t1040si-post.dtsi | 4 * Copyright 2013 - 2014 Freescale Semiconductor Inc. 35 #include <dt-bindings/thermal/thermal.h> 38 compatible = "fsl,bman-fbpr"; 39 alloc-ranges = <0 0 0x10000 0>; 43 compatible = "fsl,qman-fqd"; 44 alloc-ranges = <0 0 0x10000 0>; 48 compatible = "fsl,qman-pfdr"; 49 alloc-ranges = <0 0 0x10000 0>; 53 #address-cells = <2>; 54 #size-cells = <1>; [all …]
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| /kernel/linux/linux-6.6/arch/powerpc/boot/dts/fsl/ |
| D | p3041si-post.dtsi | 4 * Copyright 2011 - 2015 Freescale Semiconductor Inc. 36 compatible = "fsl,bman-fbpr"; 37 alloc-ranges = <0 0 0x10 0>; 41 compatible = "fsl,qman-fqd"; 42 alloc-ranges = <0 0 0x10 0>; 46 compatible = "fsl,qman-pfdr"; 47 alloc-ranges = <0 0 0x10 0>; 51 compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus"; 53 #address-cells = <2>; 54 #size-cells = <1>; [all …]
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