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/kernel/linux/linux-6.6/drivers/crypto/stm32/
Dstm32-cryp.c5 * Ux500 support taken from snippets in the old Ux500 cryp driver
28 #define DRIVER_NAME "stm32-cryp"
162 struct stm32_cryp *cryp; member
213 static inline bool is_aes(struct stm32_cryp *cryp) in is_aes() argument
215 return cryp->flags & FLG_AES; in is_aes()
218 static inline bool is_des(struct stm32_cryp *cryp) in is_des() argument
220 return cryp->flags & FLG_DES; in is_des()
223 static inline bool is_tdes(struct stm32_cryp *cryp) in is_tdes() argument
225 return cryp->flags & FLG_TDES; in is_tdes()
228 static inline bool is_ecb(struct stm32_cryp *cryp) in is_ecb() argument
[all …]
DKconfig27 tristate "Support for STM32 cryp accelerators"
33 This enables support for the CRYP (AES/DES/TDES) hw accelerator which
/kernel/linux/linux-5.10/drivers/crypto/stm32/
Dstm32-cryp.c24 #define DRIVER_NAME "stm32-cryp"
116 struct stm32_cryp *cryp; member
167 static inline bool is_aes(struct stm32_cryp *cryp) in is_aes() argument
169 return cryp->flags & FLG_AES; in is_aes()
172 static inline bool is_des(struct stm32_cryp *cryp) in is_des() argument
174 return cryp->flags & FLG_DES; in is_des()
177 static inline bool is_tdes(struct stm32_cryp *cryp) in is_tdes() argument
179 return cryp->flags & FLG_TDES; in is_tdes()
182 static inline bool is_ecb(struct stm32_cryp *cryp) in is_ecb() argument
184 return cryp->flags & FLG_ECB; in is_ecb()
[all …]
DKconfig25 tristate "Support for STM32 cryp accelerators"
31 This enables support for the CRYP (AES/DES/TDES) hw accelerator which
/kernel/linux/linux-6.6/drivers/crypto/starfive/
Djh7110-cryp.c11 #include "jh7110-cryp.h"
39 struct starfive_cryp_dev *cryp = NULL, *tmp; in starfive_cryp_find_dev() local
42 if (!ctx->cryp) { in starfive_cryp_find_dev()
44 cryp = tmp; in starfive_cryp_find_dev()
47 ctx->cryp = cryp; in starfive_cryp_find_dev()
49 cryp = ctx->cryp; in starfive_cryp_find_dev()
54 return cryp; in starfive_cryp_find_dev()
64 static int starfive_dma_init(struct starfive_cryp_dev *cryp) in starfive_dma_init() argument
71 cryp->tx = dma_request_chan(cryp->dev, "tx"); in starfive_dma_init()
72 if (IS_ERR(cryp->tx)) in starfive_dma_init()
[all …]
Djh7110-aes.c13 #include "jh7110-cryp.h"
52 static inline int starfive_aes_wait_busy(struct starfive_cryp_dev *cryp) in starfive_aes_wait_busy() argument
56 return readl_relaxed_poll_timeout(cryp->base + STARFIVE_AES_CSR, status, in starfive_aes_wait_busy()
60 static inline int starfive_aes_wait_keydone(struct starfive_cryp_dev *cryp) in starfive_aes_wait_keydone() argument
64 return readl_relaxed_poll_timeout(cryp->base + STARFIVE_AES_CSR, status, in starfive_aes_wait_keydone()
68 static inline int starfive_aes_wait_gcmdone(struct starfive_cryp_dev *cryp) in starfive_aes_wait_gcmdone() argument
72 return readl_relaxed_poll_timeout(cryp->base + STARFIVE_AES_CSR, status, in starfive_aes_wait_gcmdone()
76 static inline int is_gcm(struct starfive_cryp_dev *cryp) in is_gcm() argument
78 return (cryp->flags & FLG_MODE_MASK) == STARFIVE_AES_MODE_GCM; in is_gcm()
81 static inline int is_encrypt(struct starfive_cryp_dev *cryp) in is_encrypt() argument
[all …]
Djh7110-hash.c12 #include "jh7110-cryp.h"
41 struct starfive_cryp_dev *cryp = ctx->cryp; in starfive_hash_wait_busy() local
44 return readl_relaxed_poll_timeout(cryp->base + STARFIVE_HASH_SHACSR, status, in starfive_hash_wait_busy()
50 struct starfive_cryp_dev *cryp = ctx->cryp; in starfive_hash_wait_key_done() local
53 return readl_relaxed_poll_timeout(cryp->base + STARFIVE_HASH_SHACSR, status, in starfive_hash_wait_key_done()
60 struct starfive_cryp_dev *cryp = ctx->cryp; in starfive_hash_hmac_key() local
65 writel(ctx->keylen, cryp->base + STARFIVE_HASH_SHAWKLEN); in starfive_hash_hmac_key()
70 writel(rctx->csr.hash.v, cryp->base + STARFIVE_HASH_SHACSR); in starfive_hash_hmac_key()
73 writel(*key, cryp->base + STARFIVE_HASH_SHAWKR); in starfive_hash_hmac_key()
78 writeb(*cl, cryp->base + STARFIVE_HASH_SHAWKR); in starfive_hash_hmac_key()
[all …]
Djh7110-rsa.c22 #include "jh7110-cryp.h"
44 struct starfive_cryp_dev *cryp = ctx->cryp; in starfive_pka_wait_done() local
46 return wait_for_completion_timeout(&cryp->pka_done, in starfive_pka_wait_done()
52 struct starfive_cryp_dev *cryp = ctx->cryp; in starfive_pka_irq_mask_clear() local
55 stat = readl(cryp->base + STARFIVE_IE_MASK_OFFSET); in starfive_pka_irq_mask_clear()
57 writel(stat, cryp->base + STARFIVE_IE_MASK_OFFSET); in starfive_pka_irq_mask_clear()
59 reinit_completion(&cryp->pka_done); in starfive_pka_irq_mask_clear()
91 struct starfive_cryp_dev *cryp = ctx->cryp; in starfive_rsa_montgomery_form() local
101 writel(rctx->csr.pka.v, cryp->base + STARFIVE_PKA_CACR_OFFSET); in starfive_rsa_montgomery_form()
104 writel(mod[opsize - loop], cryp->base + STARFIVE_PKA_CANR_OFFSET + loop * 4); in starfive_rsa_montgomery_form()
[all …]
/kernel/linux/linux-5.10/drivers/crypto/mediatek/
Dmtk-platform.c120 static void mtk_desc_ring_link(struct mtk_cryp *cryp, u32 mask) in mtk_desc_ring_link() argument
123 writel(MTK_DFSE_THR_CTRL_EN | mask, cryp->base + DFE_THR_CTRL); in mtk_desc_ring_link()
124 writel(MTK_DFSE_THR_CTRL_EN | mask, cryp->base + DSE_THR_CTRL); in mtk_desc_ring_link()
127 static void mtk_dfe_dse_buf_setup(struct mtk_cryp *cryp, in mtk_dfe_dse_buf_setup() argument
140 cryp->base + DFE_CFG); in mtk_dfe_dse_buf_setup()
144 cryp->base + DSE_CFG); in mtk_dfe_dse_buf_setup()
148 cryp->base + PE_IN_DBUF_THRESH); in mtk_dfe_dse_buf_setup()
152 cryp->base + PE_IN_TBUF_THRESH); in mtk_dfe_dse_buf_setup()
156 cryp->base + PE_OUT_DBUF_THRESH); in mtk_dfe_dse_buf_setup()
158 writel(0, cryp->base + PE_OUT_TBUF_THRESH); in mtk_dfe_dse_buf_setup()
[all …]
Dmtk-sha.c105 struct mtk_cryp *cryp; member
124 static int mtk_sha_handle_queue(struct mtk_cryp *cryp, u8 id,
127 static inline u32 mtk_sha_read(struct mtk_cryp *cryp, u32 offset) in mtk_sha_read() argument
129 return readl_relaxed(cryp->base + offset); in mtk_sha_read()
132 static inline void mtk_sha_write(struct mtk_cryp *cryp, in mtk_sha_write() argument
135 writel_relaxed(value, cryp->base + offset); in mtk_sha_write()
155 struct mtk_cryp *cryp = NULL; in mtk_sha_find_dev() local
159 if (!tctx->cryp) { in mtk_sha_find_dev()
161 cryp = tmp; in mtk_sha_find_dev()
164 tctx->cryp = cryp; in mtk_sha_find_dev()
[all …]
Dmtk-aes.c107 struct mtk_cryp *cryp; member
153 static inline u32 mtk_aes_read(struct mtk_cryp *cryp, u32 offset) in mtk_aes_read() argument
155 return readl_relaxed(cryp->base + offset); in mtk_aes_read()
158 static inline void mtk_aes_write(struct mtk_cryp *cryp, in mtk_aes_write() argument
161 writel_relaxed(value, cryp->base + offset); in mtk_aes_write()
166 struct mtk_cryp *cryp = NULL; in mtk_aes_find_dev() local
170 if (!ctx->cryp) { in mtk_aes_find_dev()
172 cryp = tmp; in mtk_aes_find_dev()
175 ctx->cryp = cryp; in mtk_aes_find_dev()
177 cryp = ctx->cryp; in mtk_aes_find_dev()
[all …]
Dmtk-platform.h122 typedef int (*mtk_aes_fn)(struct mtk_cryp *cryp, struct mtk_aes_rec *aes);
126 * @cryp: pointer to Cryptographic device
146 struct mtk_cryp *cryp; member
171 * @cryp: pointer to Cryptographic device
183 struct mtk_cryp *cryp; member
226 int mtk_cipher_alg_register(struct mtk_cryp *cryp);
227 void mtk_cipher_alg_release(struct mtk_cryp *cryp);
228 int mtk_hash_alg_register(struct mtk_cryp *cryp);
229 void mtk_hash_alg_release(struct mtk_cryp *cryp);
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/crypto/
Dst,stm32-cryp.yaml4 $id: http://devicetree.org/schemas/crypto/st,stm32-cryp.yaml#
7 title: STMicroelectronics STM32 CRYP
9 description: The STM32 CRYP block is built on the CRYP block found in
19 - st,stn8820-cryp
20 - stericsson,ux500-cryp
21 - st,stm32f756-cryp
22 - st,stm32mp1-cryp
62 cryp@54001000 {
63 compatible = "st,stm32mp1-cryp";
Dmediatek-crypto.txt9 - clock-names: Must contain "cryp".
23 clock-names = "cryp";
/kernel/linux/linux-5.10/drivers/crypto/ux500/cryp/
Dcryp.h21 /* CRYP enable/disable */
27 /* CRYP Start Computation enable/disable */
33 /* CRYP Init Signal enable/disable */
39 /* Cryp State enable/disable */
68 /* Cryp Encryption or Decryption */
85 * @algodir: Cryp Encryption or Decryption
87 * CRYP configuration structure to be passed to set configuration
97 * @privilege_access: Privileged cryp state enable/disable
98 * @secure_access: Secure cryp state enable/disable
107 /* Cryp status */
[all …]
Dcryp_p.h17 #include "cryp.h"
38 * CRYP specific Macros
52 * CRYP register default values
66 * CRYP Control register specific mask
111 * CRYP PCRs------PC_NAND control register
119 /* CRYP Register structure */
Dcryp_irqp.h18 * CRYP Registers - Offset mapping
73 * @periphId0 - FE0 CRYP Peripheral Identication Register
77 * @pcellId0 - FF0 CRYP PCell Identication Register
114 u32 periphId0; /* FE0 CRYP Peripheral Identication Register */
119 u32 pcellId0; /* FF0 CRYP PCell Identication Register */
Dcryp.c16 #include "cryp.h"
43 /* Check Peripheral and Pcell Id Register for CRYP */ in cryp_check()
105 * cryp_set_configuration - This routine set the cr CRYP IP
159 * cryp_configure_protection - set the protection bits in the CRYP logic.
182 * cryp_is_logic_busy - returns the busy status of the CRYP logic
192 * cryp_configure_for_dma - configures the CRYP IP for DMA operation
204 * cryp_configure_key_values - configures the key values for CRYP operations
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/crypto/
Dst,stm32-cryp.yaml4 $id: http://devicetree.org/schemas/crypto/st,stm32-cryp.yaml#
7 title: STMicroelectronics STM32 CRYP bindings
15 - st,stm32f756-cryp
16 - st,stm32mp1-cryp
43 cryp@54001000 {
44 compatible = "st,stm32mp1-cryp";
Dmediatek-crypto.txt9 - clock-names: Must contain "cryp".
23 clock-names = "cryp";
/kernel/linux/linux-6.6/arch/arm/boot/dts/st/
Dstm32mp13xc.dtsi9 cryp: crypto@54002000 { label
10 compatible = "st,stm32mp1-cryp";
Dstm32mp15xc.dtsi9 cryp1: cryp@54001000 {
10 compatible = "st,stm32mp1-cryp";
Dstm32mp13xf.dtsi9 cryp: crypto@54002000 { label
10 compatible = "st,stm32mp1-cryp";
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dstm32mp15xc.dtsi9 cryp1: cryp@54001000 {
10 compatible = "st,stm32mp1-cryp";
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dst,stm32-rcc.txt62 /* Gated clock, AHB2 bit 4 (CRYP) */
64 clocks = <&rcc 0 STM32F4_AHB2_CLOCK(CRYP)>

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