Home
last modified time | relevance | path

Searched full:cycle (Results 1 – 25 of 3307) sorted by relevance

12345678910>>...133

/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/
Dother.json9 …"PublicDescription": "This event counts every cycle that no operation was committed because the ol…
12 …"BriefDescription": "This event counts every cycle that no operation was committed because the old…
15 …"PublicDescription": "This event counts every cycle that no instruction was committed because the …
18 …"BriefDescription": "This event counts every cycle that no instruction was committed because the o…
21 …"PublicDescription": "This event counts every cycle that no instruction was committed because the …
24 …"BriefDescription": "This event counts every cycle that no instruction was committed because the o…
27 …"PublicDescription": "This event counts every cycle that no instruction was committed because the …
30 …"BriefDescription": "This event counts every cycle that no instruction was committed because the o…
33 …"PublicDescription": "This event counts every cycle that no instruction was committed because the …
36 …"BriefDescription": "This event counts every cycle that no instruction was committed because the o…
[all …]
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/arm64/arm/cortex-a55/
Dpipeline.json9 … operation issued due to the frontend, cache miss.This event counts every cycle the DPU IQ is empt…
12 … operation issued due to the frontend, cache miss.This event counts every cycle the DPU IQ is empt…
15 …No operation issued due to the frontend, TLB miss.This event counts every cycle the DPU IQ is empt…
18 …No operation issued due to the frontend, TLB miss.This event counts every cycle the DPU IQ is empt…
21 …tion issued due to the frontend, pre-decode error.This event counts every cycle the DPU IQ is empt…
24 …tion issued due to the frontend, pre-decode error.This event counts every cycle the DPU IQ is empt…
27 …"No operation issued due to the backend interlock.This event counts every cycle that issue is stal…
30 …"No operation issued due to the backend interlock.This event counts every cycle that issue is stal…
33 …eration issued due to the backend, interlock, AGU.This event counts every cycle that issue is stal…
36 …eration issued due to the backend, interlock, AGU.This event counts every cycle that issue is stal…
[all …]
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/
Dpipeline.json21 …operation issued due to the frontend, cache miss. This event counts every cycle that the Data Proc…
24 …operation issued due to the frontend, cache miss. This event counts every cycle that the Data Proc…
27 …o operation issued due to the frontend, TLB miss. This event counts every cycle that the DPU instr…
30 …o operation issued due to the frontend, TLB miss. This event counts every cycle that the DPU instr…
39 …No operation issued due to the backend interlock. This event counts every cycle where the issue of…
42 …No operation issued due to the backend interlock. This event counts every cycle where the issue of…
45 …ion issued due to the backend, address interlock. This event counts every cycle where the issue of…
48 …ion issued due to the backend, address interlock. This event counts every cycle where the issue of…
51 …, interlock, or the Vector Processing Unit (VPU). This event counts every cycle where there is a s…
54 …, interlock, or the Vector Processing Unit (VPU). This event counts every cycle where there is a s…
[all …]
/kernel/linux/linux-6.6/include/linux/
Dtimecounter.h19 * Depending on which hardware it reads, the cycle counter may wrap
23 * @read: returns the current cycle value
27 * @mult: cycle to nanosecond multiplier
28 * @shift: cycle to nanosecond divisor (power of two)
40 * cycle counter wrap around. Initialize with
41 * timecounter_init(). Also used to convert cycle counts into the
44 * cycle counter hardware, locking issues and reading the time
45 * more often than the cycle counter wraps around. The nanosecond
48 * @cc: the cycle counter used by this instance
49 * @cycle_last: most recent cycle counter value seen by
[all …]
/kernel/linux/linux-5.10/include/linux/
Dtimecounter.h19 * Depending on which hardware it reads, the cycle counter may wrap
23 * @read: returns the current cycle value
27 * @mult: cycle to nanosecond multiplier
28 * @shift: cycle to nanosecond divisor (power of two)
40 * cycle counter wrap around. Initialize with
41 * timecounter_init(). Also used to convert cycle counts into the
44 * cycle counter hardware, locking issues and reading the time
45 * more often than the cycle counter wraps around. The nanosecond
48 * @cc: the cycle counter used by this instance
49 * @cycle_last: most recent cycle counter value seen by
[all …]
/kernel/linux/linux-6.6/drivers/staging/vme_user/
Dvme_fake.c49 u32 cycle; member
57 u32 cycle; member
156 dma_addr_t buf_base, u32 aspace, u32 cycle) in fake_slave_set() argument
213 bridge->slaves[i].cycle = cycle; in fake_slave_set()
225 dma_addr_t *buf_base, u32 *aspace, u32 *cycle) in fake_slave_get() argument
241 *cycle = bridge->slaves[i].cycle; in fake_slave_get()
253 u32 aspace, u32 cycle, u32 dwidth) in fake_master_set() argument
321 bridge->masters[i].cycle = cycle; in fake_master_set()
339 u32 *aspace, u32 *cycle, u32 *dwidth) in __fake_master_get() argument
352 *cycle = bridge->masters[i].cycle; in __fake_master_get()
[all …]
Dvme_tsi148.c468 dma_addr_t pci_base, u32 aspace, u32 cycle) in tsi148_slave_set() argument
554 switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) { in tsi148_slave_set()
566 /* Setup cycle types */ in tsi148_slave_set()
568 if (cycle & VME_BLT) in tsi148_slave_set()
570 if (cycle & VME_MBLT) in tsi148_slave_set()
572 if (cycle & VME_2eVME) in tsi148_slave_set()
574 if (cycle & VME_2eSST) in tsi148_slave_set()
576 if (cycle & VME_2eSSTB) in tsi148_slave_set()
584 if (cycle & VME_SUPER) in tsi148_slave_set()
586 if (cycle & VME_USER) in tsi148_slave_set()
[all …]
/kernel/linux/linux-5.10/drivers/vme/bridges/
Dvme_fake.c49 u32 cycle; member
57 u32 cycle; member
156 dma_addr_t buf_base, u32 aspace, u32 cycle) in fake_slave_set() argument
213 bridge->slaves[i].cycle = cycle; in fake_slave_set()
225 dma_addr_t *buf_base, u32 *aspace, u32 *cycle) in fake_slave_get() argument
241 *cycle = bridge->slaves[i].cycle; in fake_slave_get()
253 u32 aspace, u32 cycle, u32 dwidth) in fake_master_set() argument
321 bridge->masters[i].cycle = cycle; in fake_master_set()
340 u32 *aspace, u32 *cycle, u32 *dwidth) in __fake_master_get() argument
353 *cycle = bridge->masters[i].cycle; in __fake_master_get()
[all …]
Dvme_tsi148.c473 dma_addr_t pci_base, u32 aspace, u32 cycle) in tsi148_slave_set() argument
561 switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) { in tsi148_slave_set()
573 /* Setup cycle types */ in tsi148_slave_set()
575 if (cycle & VME_BLT) in tsi148_slave_set()
577 if (cycle & VME_MBLT) in tsi148_slave_set()
579 if (cycle & VME_2eVME) in tsi148_slave_set()
581 if (cycle & VME_2eSST) in tsi148_slave_set()
583 if (cycle & VME_2eSSTB) in tsi148_slave_set()
591 if (cycle & VME_SUPER) in tsi148_slave_set()
593 if (cycle & VME_USER) in tsi148_slave_set()
[all …]
/kernel/linux/linux-5.10/drivers/ide/
Dide-timings.c72 u16 cycle = 0; in ide_pio_cycle_time() local
76 cycle = id[ATA_ID_EIDE_PIO_IORDY]; in ide_pio_cycle_time()
78 cycle = id[ATA_ID_EIDE_PIO]; in ide_pio_cycle_time()
81 if (pio < 3 && cycle < t->cycle) in ide_pio_cycle_time()
82 cycle = 0; /* use standard timing */ in ide_pio_cycle_time()
86 cycle = 0; in ide_pio_cycle_time()
89 return cycle ? cycle : t->cycle; in ide_pio_cycle_time()
105 q->cycle = EZ(t->cycle, T); in ide_timing_quantize()
125 m->cycle = max(a->cycle, b->cycle); in ide_timing_merge()
151 * PIO/MWDMA cycle timing. in ide_timing_compute()
[all …]
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/amdzen3/
Dfloating-point.json6 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th…
13 …X, and SSE instructions, including moves. Each increment represents a one-cycle dispatch event. Th…
20 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th…
27 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th…
34 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th…
40 …ent. The number of retired SSE/AVX FLOPS. The number of events logged per cycle can vary from 0 to…
46cycle can vary from 0 to 64. This event requires the use of the MergeEvent since it can count abov…
52cycle can vary from 0 to 64. This event requires the use of the MergeEvent since it can count abov…
58cycle can vary from 0 to 64. This event requires the use of the MergeEvent since it can count abov…
64cycle can vary from 0 to 64. This event requires the use of the MergeEvent since it can count abov…
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/amdzen1/
Dfloating-point.json6 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th…
13 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th…
20 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th…
27 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th…
34 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th…
41 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th…
48 …X, and SSE instructions, including moves. Each increment represents a one-cycle dispatch event. Th…
55 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th…
62 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th…
69 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th…
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/amdzen1/
Dfloating-point.json6 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th…
13 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th…
20 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th…
27 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th…
34 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th…
41 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th…
48 …X, and SSE instructions, including moves. Each increment represents a one-cycle dispatch event. Th…
55 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th…
62 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th…
69 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th…
[all …]
/kernel/linux/linux-6.6/scripts/
Dheaderdep.pl114 # $cycle[n] includes $cycle[n + 1];
115 # $cycle[-1] will be the culprit
116 my $cycle = shift;
119 for my $i (0 .. $#$cycle - 1) {
120 $cycle->[$i]->[0] = $cycle->[$i + 1]->[0];
122 $cycle->[-1]->[0] = 0;
124 my $first = shift @$cycle;
125 my $last = pop @$cycle;
130 for my $header (reverse @$cycle) {
141 # Find and print the smallest cycle starting in the specified node.
[all …]
/kernel/linux/linux-5.10/scripts/
Dheaderdep.pl114 # $cycle[n] includes $cycle[n + 1];
115 # $cycle[-1] will be the culprit
116 my $cycle = shift;
119 for my $i (0 .. $#$cycle - 1) {
120 $cycle->[$i]->[0] = $cycle->[$i + 1]->[0];
122 $cycle->[-1]->[0] = 0;
124 my $first = shift @$cycle;
125 my $last = pop @$cycle;
130 for my $header (reverse @$cycle) {
141 # Find and print the smallest cycle starting in the specified node.
[all …]
/kernel/linux/linux-5.10/drivers/ata/
Dlibata-pata-timings.c70 q->cycle = EZ(t->cycle, T); in ata_timing_quantize()
92 m->cycle = max(a->cycle, b->cycle); in ata_timing_merge()
133 * PIO/MW_DMA cycle timing. in ata_timing_compute()
141 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO]; in ata_timing_compute()
144 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY]; in ata_timing_compute()
146 p.cycle = id[ATA_ID_EIDE_DMA_MIN]; in ata_timing_compute()
160 * DMA cycle timing is slower/equal than the fastest PIO timing. in ata_timing_compute()
169 * Lengthen active & recovery time so that cycle time is correct. in ata_timing_compute()
177 if (t->active + t->recover < t->cycle) { in ata_timing_compute()
178 t->active += (t->cycle - (t->active + t->recover)) / 2; in ata_timing_compute()
[all …]
/kernel/linux/linux-6.6/drivers/ata/
Dlibata-pata-timings.c70 q->cycle = EZ(t->cycle, T); in ata_timing_quantize()
92 m->cycle = max(a->cycle, b->cycle); in ata_timing_merge()
133 * PIO/MW_DMA cycle timing. in ata_timing_compute()
141 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO]; in ata_timing_compute()
144 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY]; in ata_timing_compute()
146 p.cycle = id[ATA_ID_EIDE_DMA_MIN]; in ata_timing_compute()
160 * DMA cycle timing is slower/equal than the fastest PIO timing. in ata_timing_compute()
169 * Lengthen active & recovery time so that cycle time is correct. in ata_timing_compute()
177 if (t->active + t->recover < t->cycle) { in ata_timing_compute()
178 t->active += (t->cycle - (t->active + t->recover)) / 2; in ata_timing_compute()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/regulator/
Dpwm-regulator.txt7 predefined voltage <=> duty-cycle values must be
10 Intermediary duty-cycle values which would normally
19 appropriate duty-cycle values. This allows for a much
22 assumption that a %50 duty-cycle value will cause the
33 - voltage-table: Voltage and Duty-Cycle table consisting of 2 cells
35 Second cell is duty-cycle in percent (%)
38 - pwm-dutycycle-unit: Integer value encoding the duty cycle unit. If not
46 Duty cycle values are expressed in pwm-dutycycle-unit.
71 * Inverted PWM logic, and the duty cycle range is limited
85 /* Voltage Duty-Cycle */
/kernel/linux/linux-6.6/arch/alpha/lib/
Dev6-csum_ipv6_magic.S36 * (we can't hide the 3-cycle latency of the unpkbw in the 6-instruction sequence)
116 cmpult $20,$3,$3 # E : (1 cycle stall on $20)
117 addq $20,$18,$20 # E : U L U L (1 cycle stall on $20)
120 addq $20,$19,$20 # E : (1 cycle stall on $20)
125 addq $18,$19,$18 # E : (1 cycle stall on $19)
128 /* (1 cycle stall on $18, 2 cycles on $20) */
131 zapnot $0,15,$1 # U : Start folding output (1 cycle stall on $0)
133 srl $0,32,$0 # U : U L U L : (1 cycle stall on $0)
136 extwl $1,2,$2 # U : ushort[1] (1 cycle stall on $1)
137 zapnot $1,3,$0 # U : ushort[0] (1 cycle stall on $1)
[all …]
/kernel/linux/linux-5.10/arch/alpha/lib/
Dev6-csum_ipv6_magic.S36 * (we can't hide the 3-cycle latency of the unpkbw in the 6-instruction sequence)
116 cmpult $20,$3,$3 # E : (1 cycle stall on $20)
117 addq $20,$18,$20 # E : U L U L (1 cycle stall on $20)
120 addq $20,$19,$20 # E : (1 cycle stall on $20)
125 addq $18,$19,$18 # E : (1 cycle stall on $19)
128 /* (1 cycle stall on $18, 2 cycles on $20) */
131 zapnot $0,15,$1 # U : Start folding output (1 cycle stall on $0)
133 srl $0,32,$0 # U : U L U L : (1 cycle stall on $0)
136 extwl $1,2,$2 # U : ushort[1] (1 cycle stall on $1)
137 zapnot $1,3,$0 # U : ushort[0] (1 cycle stall on $1)
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/regulator/
Dpwm-regulator.yaml19 duty-cycle values must be provided via DT. Limitations are that the
21 Intermediary duty-cycle values which would normally allow finer grained
29 appropriate duty-cycle values. This allows for a much more fine grained
31 make an assumption that a %50 duty-cycle value will cause the regulator
49 description: Voltage and Duty-Cycle table.
54 - description: duty-cycle in percent (%)
63 Integer value encoding the duty cycle unit. If not
75 Duty cycle values are expressed in pwm-dutycycle-unit.
104 * Inverted PWM logic, and the duty cycle range is limited
119 /* Voltage Duty-Cycle */
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/ivybridge/
Dfloating-point.json44 …tion": "Number of SSE* or AVX-128 FP Computational packed double-precision uops issued this cycle",
47 …ion": "Number of SSE* or AVX-128 FP Computational packed double-precision uops issued this cycle.",
52 …tion": "Number of SSE* or AVX-128 FP Computational packed single-precision uops issued this cycle",
55 …ion": "Number of SSE* or AVX-128 FP Computational packed single-precision uops issued this cycle.",
60 …tion": "Number of SSE* or AVX-128 FP Computational scalar double-precision uops issued this cycle",
68 …tion": "Number of SSE* or AVX-128 FP Computational scalar single-precision uops issued this cycle",
71 …ion": "Number of SSE* or AVX-128 FP Computational scalar single-precision uops issued this cycle.",
76 …"BriefDescription": "Number of FP Computational Uops Executed this cycle. The number of FADD, FSUB…
120 … "BriefDescription": "number of AVX-256 Computational FP double precision uops issued this cycle",
128 … "BriefDescription": "number of GSSE-256 Computational FP single precision uops issued this cycle",
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/ivytown/
Dfloating-point.json44 …tion": "Number of SSE* or AVX-128 FP Computational packed double-precision uops issued this cycle",
47 …ion": "Number of SSE* or AVX-128 FP Computational packed double-precision uops issued this cycle.",
52 …tion": "Number of SSE* or AVX-128 FP Computational packed single-precision uops issued this cycle",
55 …ion": "Number of SSE* or AVX-128 FP Computational packed single-precision uops issued this cycle.",
60 …tion": "Number of SSE* or AVX-128 FP Computational scalar double-precision uops issued this cycle",
68 …tion": "Number of SSE* or AVX-128 FP Computational scalar single-precision uops issued this cycle",
71 …ion": "Number of SSE* or AVX-128 FP Computational scalar single-precision uops issued this cycle.",
76 …"BriefDescription": "Number of FP Computational Uops Executed this cycle. The number of FADD, FSUB…
120 … "BriefDescription": "number of AVX-256 Computational FP double precision uops issued this cycle",
128 … "BriefDescription": "number of GSSE-256 Computational FP single precision uops issued this cycle",
/kernel/linux/linux-6.6/tools/testing/selftests/tc-testing/tc-tests/actions/
Dgate.json52 "name": "Add gate action with cycle-time",
65 …"cmdUnderTest": "$TC action add action gate cycle-time 200000000000ns sched-entry close 100000000n…
68 "matchPattern": "action order [0-9]*: .*cycle-time 200s.*index 1000 ref",
76 "name": "Add gate action with cycle-time-ext",
89 …"cmdUnderTest": "$TC action add action gate cycle-time-ext 20000000000ns sched-entry close 1000000…
92 "matchPattern": "action order [0-9]*: .*cycle-time-ext 20s.*index 1000 ref",
203 …"$TC action add action gate cycle-time 600000000000ns sched-entry open 600000000ns -1 8000000b ind…
204 … "$TC action add action gate cycle-time-ext 400000000000ns sched-entry close 100000000ns index 103"
230 …"$TC action add action gate cycle-time 600000000000ns sched-entry open 600000000ns -1 8000000b ind…
231 … "$TC action add action gate cycle-time-ext 400000000000ns sched-entry close 100000000ns index 103"
[all …]
/kernel/linux/linux-5.10/kernel/locking/
Dtest-ww_mutex.c248 struct test_cycle *cycle = container_of(work, typeof(*cycle), work); in test_cycle_work() local
253 ww_mutex_lock(&cycle->a_mutex, &ctx); in test_cycle_work()
255 complete(cycle->a_signal); in test_cycle_work()
256 wait_for_completion(&cycle->b_signal); in test_cycle_work()
258 err = ww_mutex_lock(cycle->b_mutex, &ctx); in test_cycle_work()
261 ww_mutex_unlock(&cycle->a_mutex); in test_cycle_work()
262 ww_mutex_lock_slow(cycle->b_mutex, &ctx); in test_cycle_work()
263 erra = ww_mutex_lock(&cycle->a_mutex, &ctx); in test_cycle_work()
267 ww_mutex_unlock(cycle->b_mutex); in test_cycle_work()
269 ww_mutex_unlock(&cycle->a_mutex); in test_cycle_work()
[all …]

12345678910>>...133