| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn302/ |
| D | dcn302_resource.c | 95 .dwb_fi_phase = -1, // -1 = disable,
179 #define SRI(reg_name, block, id)\ argument
180 ….reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + mm ## block ## id ## _ ## reg_…
182 #define SRI2(reg_name, block, id)\ argument
185 #define SRII(reg_name, block, id)\ argument
186 .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
187 mm ## block ## id ## _ ## reg_name
189 #define DCCG_SRII(reg_name, block, id)\ argument
190 .block ## _ ## reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
191 mm ## block ## id ## _ ## reg_name
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn303/ |
| D | dcn303_resource.c | 1 // SPDX-License-Identifier: MIT
78 .dwb_fi_phase = -1, // -1 = disable,
157 #define SRI(reg_name, block, id)\ argument
158 ….reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + mm ## block ## id ## _ ## reg_…
160 #define SRI2(reg_name, block, id)\ argument
163 #define SRII(reg_name, block, id)\ argument
164 .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
165 mm ## block ## id ## _ ## reg_name
167 #define DCCG_SRII(reg_name, block, id)\ argument
168 .block ## _ ## reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn321/ |
| D | dcn321_resource.c | 1 // SPDX-License-Identifier: MIT
28 #include "dc.h"
111 #define BASE_INNER(seg) ctx->dcn_reg_offsets[seg]
118 #define SR_ARR(reg_name, id)\ argument
119 REG_STRUCT[id].reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
121 #define SR_ARR_INIT(reg_name, id, value)\ argument
122 REG_STRUCT[id].reg_name = value
124 #define SRI(reg_name, block, id)\ argument
125 REG_STRUCT.reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
126 reg ## block ## id ## _ ## reg_name
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn301/ |
| D | dcn301_resource.c | 2 * Copyright 2019-2021 Advanced Micro Devices, Inc.
28 #include "dc.h"
118 #define SRI(reg_name, block, id)\ argument
119 .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
120 mm ## block ## id ## _ ## reg_name
122 #define SRI2(reg_name, block, id)\ argument
126 #define SRIR(var_name, reg_name, block, id)\ argument
127 .var_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
128 mm ## block ## id ## _ ## reg_name
130 #define SRII(reg_name, block, id)\ argument
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_resource.c | 27 #include "dc.h"
112 #define SRI(reg_name, block, id)\ argument
113 .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
114 mm ## block ## id ## _ ## reg_name
117 #define SRII(reg_name, block, id)\ argument
118 .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
119 mm ## block ## id ## _ ## reg_name
121 #define VUPDATE_SRII(reg_name, block, id)\ argument
122 .reg_name[id] = BASE(mm ## reg_name ## 0 ## _ ## block ## id ## _BASE_IDX) + \
123 mm ## reg_name ## 0 ## _ ## block ## id
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn21/ |
| D | dcn21_resource.c | 30 #include "dc.h"
105 #define SRI(reg_name, block, id)\ argument
106 .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
107 mm ## block ## id ## _ ## reg_name
109 #define SRIR(var_name, reg_name, block, id)\ argument
110 .var_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
111 mm ## block ## id ## _ ## reg_name
113 #define SRII(reg_name, block, id)\ argument
114 .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
115 mm ## block ## id ## _ ## reg_name
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn31/ |
| D | dcn31_resource.c | 28 #include "dc.h"
131 #define SRI(reg_name, block, id)\ argument
132 .reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
133 reg ## block ## id ## _ ## reg_name
135 #define SRI2(reg_name, block, id)\ argument
139 #define SRIR(var_name, reg_name, block, id)\ argument
140 .var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
141 reg ## block ## id ## _ ## reg_name
143 #define SRII(reg_name, block, id)\ argument
144 .reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_resource.c | 28 #include "dc.h"
119 #define SRI(reg_name, block, id)\ argument
120 .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
121 mm ## block ## id ## _ ## reg_name
123 #define SRI2(reg_name, block, id)\ argument
127 #define SRIR(var_name, reg_name, block, id)\ argument
128 .var_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
129 mm ## block ## id ## _ ## reg_name
131 #define SRII(reg_name, block, id)\ argument
132 .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn32/ |
| D | dcn32_resource.c | 1 // SPDX-License-Identifier: MIT
28 #include "dc.h"
108 #define BASE_INNER(seg) ctx->dcn_reg_offsets[seg]
115 #define SR_ARR(reg_name, id) \ argument
116 REG_STRUCT[id].reg_name = BASE(reg##reg_name##_BASE_IDX) + reg##reg_name
118 #define SR_ARR_INIT(reg_name, id, value) \ argument
119 REG_STRUCT[id].reg_name = value
121 #define SRI(reg_name, block, id)\ argument
122 REG_STRUCT.reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
123 reg ## block ## id ## _ ## reg_name
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn201/ |
| D | dcn201_resource.c | 27 #include "dc.h"
255 #define SRI(reg_name, block, id)\ argument
256 .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
257 mm ## block ## id ## _ ## reg_name
259 #define SRIR(var_name, reg_name, block, id)\ argument
260 .var_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
261 mm ## block ## id ## _ ## reg_name
263 #define SRII(reg_name, block, id)\ argument
264 .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
265 mm ## block ## id ## _ ## reg_name
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_resource.c | 29 #include "dc.h"
87 .LineBufferFixedBpp = -1,
176 #define SRI(reg_name, block, id)\ argument
177 .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
178 mm ## block ## id ## _ ## reg_name
181 #define SRII(reg_name, block, id)\ argument
182 .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
183 mm ## block ## id ## _ ## reg_name
185 #define VUPDATE_SRII(reg_name, block, id)\ argument
186 .reg_name[id] = BASE(mm ## reg_name ## 0 ## _ ## block ## id ## _BASE_IDX) + \
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn21/ |
| D | dcn21_resource.c | 30 #include "dc.h"
328 #define SRI(reg_name, block, id)\ argument
329 .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
330 mm ## block ## id ## _ ## reg_name
332 #define SRIR(var_name, reg_name, block, id)\ argument
333 .var_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
334 mm ## block ## id ## _ ## reg_name
336 #define SRII(reg_name, block, id)\ argument
337 .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
338 mm ## block ## id ## _ ## reg_name
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn314/ |
| D | dcn314_resource.c | 1 // SPDX-License-Identifier: MIT
29 #include "dc.h"
147 #define SRI(reg_name, block, id)\ argument
148 .reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
149 reg ## block ## id ## _ ## reg_name
151 #define SRI2(reg_name, block, id)\ argument
155 #define SRIR(var_name, reg_name, block, id)\ argument
156 .var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
157 reg ## block ## id ## _ ## reg_name
159 #define SRII(reg_name, block, id)\ argument
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_resource.c | 30 #include "dc.h"
135 #define SRI(reg_name, block, id)\ argument
136 .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
137 mm ## block ## id ## _ ## reg_name
139 #define SRI2_DWB(reg_name, block, id)\ argument
145 #define SF_DWB2(reg_name, block, id, field_name, post_fix) \ argument
148 #define SRIR(var_name, reg_name, block, id)\ argument
149 .var_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
150 mm ## block ## id ## _ ## reg_name
152 #define SRII(reg_name, block, id)\ argument
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce80/ |
| D | dce80_resource.c | 2 * Copyright 2012-15 Advanced Micro Devices, Inc.
114 .crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL),
115 .dcp = (mmGRPH_CONTROL - mmGRPH_CONTROL),
117 - mmDPG_WATERMARK_MASK_CONTROL),
120 .crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL),
121 .dcp = (mmDCP1_GRPH_CONTROL - mmGRPH_CONTROL),
123 - mmDPG_WATERMARK_MASK_CONTROL),
126 .crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL),
127 .dcp = (mmDCP2_GRPH_CONTROL - mmGRPH_CONTROL),
129 - mmDPG_WATERMARK_MASK_CONTROL),
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce112/ |
| D | dce112_resource.c | 2 * Copyright 2012-15 Advanced Micro Devices, Inc.
63 dc->ctx->logger
119 .crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL),
120 .dcp = (mmDCP0_GRPH_CONTROL - mmGRPH_CONTROL),
123 .crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL),
124 .dcp = (mmDCP1_GRPH_CONTROL - mmGRPH_CONTROL),
127 .crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL),
128 .dcp = (mmDCP2_GRPH_CONTROL - mmGRPH_CONTROL),
131 .crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC_CONTROL),
132 .dcp = (mmDCP3_GRPH_CONTROL - mmGRPH_CONTROL),
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn316/ |
| D | dcn316_resource.c | 28 #include "dc.h"
153 #define SRI(reg_name, block, id)\ argument
154 .reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
155 reg ## block ## id ## _ ## reg_name
157 #define SRI2(reg_name, block, id)\ argument
161 #define SRIR(var_name, reg_name, block, id)\ argument
162 .var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
163 reg ## block ## id ## _ ## reg_name
165 #define SRII(reg_name, block, id)\ argument
166 .reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce80/ |
| D | dce80_resource.c | 2 * Copyright 2012-15 Advanced Micro Devices, Inc.
114 .crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL),
115 .dcp = (mmGRPH_CONTROL - mmGRPH_CONTROL),
117 - mmDPG_WATERMARK_MASK_CONTROL),
120 .crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL),
121 .dcp = (mmDCP1_GRPH_CONTROL - mmGRPH_CONTROL),
123 - mmDPG_WATERMARK_MASK_CONTROL),
126 .crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL),
127 .dcp = (mmDCP2_GRPH_CONTROL - mmGRPH_CONTROL),
129 - mmDPG_WATERMARK_MASK_CONTROL),
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce60/ |
| D | dce60_resource.c | 112 .crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL),
113 .dcp = (mmGRPH_CONTROL - mmGRPH_CONTROL),
115 - mmDPG_PIPE_ARBITRATION_CONTROL3),
118 .crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL),
119 .dcp = (mmDCP1_GRPH_CONTROL - mmGRPH_CONTROL),
121 - mmDPG_PIPE_ARBITRATION_CONTROL3),
124 .crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL),
125 .dcp = (mmDCP2_GRPH_CONTROL - mmGRPH_CONTROL),
127 - mmDPG_PIPE_ARBITRATION_CONTROL3),
130 .crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC_CONTROL),
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce60/ |
| D | dce60_resource.c | 114 .crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL),
115 .dcp = (mmGRPH_CONTROL - mmGRPH_CONTROL),
117 - mmDPG_PIPE_ARBITRATION_CONTROL3),
120 .crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL),
121 .dcp = (mmDCP1_GRPH_CONTROL - mmGRPH_CONTROL),
123 - mmDPG_PIPE_ARBITRATION_CONTROL3),
126 .crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL),
127 .dcp = (mmDCP2_GRPH_CONTROL - mmGRPH_CONTROL),
129 - mmDPG_PIPE_ARBITRATION_CONTROL3),
132 .crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC_CONTROL),
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce112/ |
| D | dce112_resource.c | 2 * Copyright 2012-15 Advanced Micro Devices, Inc.
63 dc->ctx->logger
119 .crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL),
120 .dcp = (mmDCP0_GRPH_CONTROL - mmGRPH_CONTROL),
123 .crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL),
124 .dcp = (mmDCP1_GRPH_CONTROL - mmGRPH_CONTROL),
127 .crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL),
128 .dcp = (mmDCP2_GRPH_CONTROL - mmGRPH_CONTROL),
131 .crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC_CONTROL),
132 .dcp = (mmDCP3_GRPH_CONTROL - mmGRPH_CONTROL),
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn315/ |
| D | dcn315_resource.c | 28 #include "dc.h"
165 #define SRI(reg_name, block, id)\ argument
166 .reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
167 reg ## block ## id ## _ ## reg_name
169 #define SRI2(reg_name, block, id)\ argument
173 #define SRIR(var_name, reg_name, block, id)\ argument
174 .var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
175 reg ## block ## id ## _ ## reg_name
177 #define SRII(reg_name, block, id)\ argument
178 .reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce110/ |
| D | dce110_resource.c | 2 * Copyright 2012-15 Advanced Micro Devices, Inc.
57 dc->ctx->logger
118 .crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL),
119 .dcp = (mmDCP0_GRPH_CONTROL - mmGRPH_CONTROL),
122 .crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL),
123 .dcp = (mmDCP1_GRPH_CONTROL - mmGRPH_CONTROL),
126 .crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL),
127 .dcp = (mmDCP2_GRPH_CONTROL - mmGRPH_CONTROL),
130 .crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC_CONTROL),
131 .dcp = (mmDCP3_GRPH_CONTROL - mmGRPH_CONTROL),
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_resource.c | 28 #include "dc.h"
249 #define SRI(reg_name, block, id)\ argument
250 .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
251 mm ## block ## id ## _ ## reg_name
253 #define SRI2(reg_name, block, id)\ argument
257 #define SRIR(var_name, reg_name, block, id)\ argument
258 .var_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
259 mm ## block ## id ## _ ## reg_name
261 #define SRII(reg_name, block, id)\ argument
262 .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce110/ |
| D | dce110_resource.c | 2 * Copyright 2012-15 Advanced Micro Devices, Inc.
59 dc->ctx->logger
120 .crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL),
121 .dcp = (mmDCP0_GRPH_CONTROL - mmGRPH_CONTROL),
124 .crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL),
125 .dcp = (mmDCP1_GRPH_CONTROL - mmGRPH_CONTROL),
128 .crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL),
129 .dcp = (mmDCP2_GRPH_CONTROL - mmGRPH_CONTROL),
132 .crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC_CONTROL),
133 .dcp = (mmDCP3_GRPH_CONTROL - mmGRPH_CONTROL),
[all …]
|