| /kernel/linux/linux-5.10/drivers/clk/hisilicon/ |
| D | clkdivider-hi6220.c | 1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/clk-provider.h>
19 #define div_mask(width) ((1 << (width)) - 1)
22 * struct hi6220_clk_divider - divider clock for hi6220
24 * @hw: handle between common and hardware-specific interfaces
29 * @table: the div table that the divider supports
49 struct hi6220_clk_divider *dclk = to_hi6220_clk_divider(hw); in hi6220_clkdiv_recalc_rate() local
51 val = readl_relaxed(dclk->reg) >> dclk->shift; in hi6220_clkdiv_recalc_rate()
52 val &= div_mask(dclk->width); in hi6220_clkdiv_recalc_rate()
54 return divider_recalc_rate(hw, parent_rate, val, dclk->table, in hi6220_clkdiv_recalc_rate()
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/hisilicon/ |
| D | clkdivider-hi6220.c | 1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/clk-provider.h>
19 #define div_mask(width) ((1 << (width)) - 1)
22 * struct hi6220_clk_divider - divider clock for hi6220
24 * @hw: handle between common and hardware-specific interfaces
29 * @table: the div table that the divider supports
49 struct hi6220_clk_divider *dclk = to_hi6220_clk_divider(hw); in hi6220_clkdiv_recalc_rate() local
51 val = readl_relaxed(dclk->reg) >> dclk->shift; in hi6220_clkdiv_recalc_rate()
52 val &= div_mask(dclk->width); in hi6220_clkdiv_recalc_rate()
54 return divider_recalc_rate(hw, parent_rate, val, dclk->table, in hi6220_clkdiv_recalc_rate()
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/nuvoton/ |
| D | clk-ma35d1-divider.c | 1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Chi-Fang Li <cfli0@nuvoton.com>
7 #include <linux/clk-provider.h>
12 #include "clk-ma35d1.h"
33 struct ma35d1_adc_clk_div *dclk = to_ma35d1_adc_clk_div(hw); in ma35d1_clkdiv_recalc_rate() local
35 val = readl_relaxed(dclk->reg) >> dclk->shift; in ma35d1_clkdiv_recalc_rate()
36 val &= clk_div_mask(dclk->width); in ma35d1_clkdiv_recalc_rate()
38 return divider_recalc_rate(hw, parent_rate, val, dclk->table, in ma35d1_clkdiv_recalc_rate()
39 CLK_DIVIDER_ROUND_CLOSEST, dclk->width); in ma35d1_clkdiv_recalc_rate()
44 struct ma35d1_adc_clk_div *dclk = to_ma35d1_adc_clk_div(hw); in ma35d1_clkdiv_round_rate() local
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/ |
| D | solomon,ssd1307fb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Maxime Ripard <mripard@kernel.org>
11 - Javier Martinez Canillas <javierm@redhat.com>
17 - enum:
18 - solomon,ssd1305fb-i2c
19 - solomon,ssd1306fb-i2c
20 - solomon,ssd1307fb-i2c
21 - solomon,ssd1309fb-i2c
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/sun4i/ |
| D | sun4i_tcon_dclk.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
9 #include <linux/clk-provider.h>
28 struct sun4i_dclk *dclk = hw_to_dclk(hw); in sun4i_dclk_disable() local
30 regmap_update_bits(dclk->regmap, SUN4I_TCON0_DCLK_REG, in sun4i_dclk_disable()
36 struct sun4i_dclk *dclk = hw_to_dclk(hw); in sun4i_dclk_enable() local
38 return regmap_update_bits(dclk->regmap, SUN4I_TCON0_DCLK_REG, in sun4i_dclk_enable()
45 struct sun4i_dclk *dclk = hw_to_dclk(hw); in sun4i_dclk_is_enabled() local
48 regmap_read(dclk->regmap, SUN4I_TCON0_DCLK_REG, &val); in sun4i_dclk_is_enabled()
56 struct sun4i_dclk *dclk = hw_to_dclk(hw); in sun4i_dclk_recalc_rate() local
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/sun4i/ |
| D | sun4i_dotclock.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
9 #include <linux/clk-provider.h>
28 struct sun4i_dclk *dclk = hw_to_dclk(hw); in sun4i_dclk_disable() local
30 regmap_update_bits(dclk->regmap, SUN4I_TCON0_DCLK_REG, in sun4i_dclk_disable()
36 struct sun4i_dclk *dclk = hw_to_dclk(hw); in sun4i_dclk_enable() local
38 return regmap_update_bits(dclk->regmap, SUN4I_TCON0_DCLK_REG, in sun4i_dclk_enable()
45 struct sun4i_dclk *dclk = hw_to_dclk(hw); in sun4i_dclk_is_enabled() local
48 regmap_read(dclk->regmap, SUN4I_TCON0_DCLK_REG, &val); in sun4i_dclk_is_enabled()
56 struct sun4i_dclk *dclk = hw_to_dclk(hw); in sun4i_dclk_recalc_rate() local
[all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/ |
| D | dra7xx-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
8 atl_clkin0_ck: clock-atl-clkin0 {
9 #clock-cells = <0>;
10 compatible = "ti,dra7-atl-clock";
11 clock-output-names = "atl_clkin0_ck";
15 atl_clkin1_ck: clock-atl-clkin1 {
16 #clock-cells = <0>;
17 compatible = "ti,dra7-atl-clock";
18 clock-output-names = "atl_clkin1_ck";
22 atl_clkin2_ck: clock-atl-clkin2 {
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/mvebu/ |
| D | armada-39x.c | 1 // SPDX-License-Identifier: GPL-2.0
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
10 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
15 #include <linux/clk-provider.h>
21 * SARL[14:10] : Ratios between CPU, NBCLK, HCLK and DCLK.
88 { .id = A390_CPU_TO_DCLK, .name = "dclk" },
92 void __iomem *sar, int id, int *mult, int *div) in armada_39x_get_clk_ratio() argument
97 *div = 2; in armada_39x_get_clk_ratio()
101 *div = 4; in armada_39x_get_clk_ratio()
105 *div = 2; in armada_39x_get_clk_ratio()
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/mvebu/ |
| D | armada-39x.c | 1 // SPDX-License-Identifier: GPL-2.0
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
10 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
15 #include <linux/clk-provider.h>
21 * SARL[14:10] : Ratios between CPU, NBCLK, HCLK and DCLK.
88 { .id = A390_CPU_TO_DCLK, .name = "dclk" },
92 void __iomem *sar, int id, int *mult, int *div) in armada_39x_get_clk_ratio() argument
97 *div = 2; in armada_39x_get_clk_ratio()
101 *div = 4; in armada_39x_get_clk_ratio()
105 *div = 2; in armada_39x_get_clk_ratio()
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/samsung/ |
| D | clk-s3c2410-dclk.c | 1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/clk-provider.h>
14 #include <linux/platform_data/clk-s3c2410.h>
45 * Clock for output-parent selection in misccr
63 val = clkout->modify_misccr(0, 0) >> clkout->shift; in s3c24xx_clkout_get_parent()
64 val >>= clkout->shift; in s3c24xx_clkout_get_parent()
65 val &= clkout->mask; in s3c24xx_clkout_get_parent()
68 return -EINVAL; in s3c24xx_clkout_get_parent()
77 clkout->modify_misccr((clkout->mask << clkout->shift), in s3c24xx_clkout_set_parent()
78 (index << clkout->shift)); in s3c24xx_clkout_set_parent()
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/ |
| D | clk-lmk04832.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * LMK04832 Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner
14 #include <linux/clk-provider.h>
22 /* 0x000 - 0x00d System Functions */
34 /* 0x100 - 0x137 Device Clock and SYSREF Clock Output Control */
75 /* 0x138 - 0x145 SYSREF, SYNC, and Device Config */
124 /* 0x146 - 0x14a CLKin Control */
134 /* 0x14b - 0x152 Holdover */
136 /* 0x153 - 0x15f PLL1 Configuration */
143 /* 0x160 - 0x16e PLL2 Configuration */
[all …]
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| D | clk-ast2600.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 #define pr_fmt(fmt) "clk-ast2600: " fmt
14 #include <dt-bindings/clock/ast2600-clock.h>
16 #include "clk-aspeed.h"
20 * explicitly-configured clocks (ASPEED_CLK_HPLL and up).
94 * handled by using -1 as the index for the reset, and the consumer must
104 [ASPEED_CLK_GATE_MCLK] = { 0, -1, "mclk-gate", "mpll", CLK_IS_CRITICAL }, /* SDRAM */
105 [ASPEED_CLK_GATE_ECLK] = { 1, 6, "eclk-gate", "eclk", 0 }, /* Video Engine */
106 [ASPEED_CLK_GATE_GCLK] = { 2, 7, "gclk-gate", NULL, 0 }, /* 2D engine */
107 /* vclk parent - dclk/d1clk/hclk/mclk */
[all …]
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| D | clk-aspeed.c | 1 // SPDX-License-Identifier: GPL-2.0+
4 #define pr_fmt(fmt) "clk-aspeed: " fmt
13 #include <dt-bindings/clock/aspeed-clock.h>
15 #include "clk-aspeed.h"
49 [ASPEED_CLK_GATE_ECLK] = { 0, 6, "eclk-gate", "eclk", 0 }, /* Video Engine */
50 [ASPEED_CLK_GATE_GCLK] = { 1, 7, "gclk-gate", NULL, 0 }, /* 2D engine */
51 [ASPEED_CLK_GATE_MCLK] = { 2, -1, "mclk-gate", "mpll", CLK_IS_CRITICAL }, /* SDRAM */
52 [ASPEED_CLK_GATE_VCLK] = { 3, -1, "vclk-gate", NULL, 0 }, /* Video Capture */
53 [ASPEED_CLK_GATE_BCLK] = { 4, 8, "bclk-gate", "bclk", CLK_IS_CRITICAL }, /* PCIe/PCI */
54 [ASPEED_CLK_GATE_DCLK] = { 5, -1, "dclk-gate", NULL, CLK_IS_CRITICAL }, /* DAC */
[all …]
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| D | clk-nomadik.c | 1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2013 ST-Ericsson AB
14 #include <linux/clk-provider.h>
74 pr_crit("force-enabling MXTALO\n"); in nomadik_clk_reboot_handler()
84 { .compatible = "stericsson,nomadik-src" },
122 if (of_property_read_bool(np, "disable-sxtalo")) { in nomadik_src_init()
127 if (of_property_read_bool(np, "disable-mxtalo")) { in nomadik_src_init()
141 * struct clk_pll - Nomadik PLL clock
151 * struct clk_src - Nomadik src clock
174 if (pll->id == 1) { in pll_clk_enable()
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/ |
| D | ssd1307fb.txt | 4 - compatible: Should be "solomon,<chip>fb-<bus>". The only supported bus for
7 - reg: Should contain address of the controller on the I2C bus. Most likely
9 - pwm: Should contain the pwm to use according to the OF device tree PWM
11 - solomon,height: Height in pixel of the screen driven by the controller
12 - solomon,width: Width in pixel of the screen driven by the controller
13 - solomon,page-offset: Offset of pages (band of 8 pixels) that the screen is
17 - reset-gpios: The GPIO used to reset the OLED display, if available. See
19 - vbat-supply: The supply for VBAT
20 - solomon,segment-no-remap: Display needs normal (non-inverted) data column
22 - solomon,col-offset: Offset of columns (COL/SEG) that the screen is mapped to.
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/ |
| D | clk-ast2600.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 #define pr_fmt(fmt) "clk-ast2600: " fmt
14 #include <dt-bindings/clock/ast2600-clock.h>
16 #include "clk-aspeed.h"
65 [ASPEED_CLK_GATE_MCLK] = { 0, -1, "mclk-gate", "mpll", CLK_IS_CRITICAL }, /* SDRAM */
66 [ASPEED_CLK_GATE_ECLK] = { 1, 6, "eclk-gate", "eclk", 0 }, /* Video Engine */
67 [ASPEED_CLK_GATE_GCLK] = { 2, 7, "gclk-gate", NULL, 0 }, /* 2D engine */
68 /* vclk parent - dclk/d1clk/hclk/mclk */
69 [ASPEED_CLK_GATE_VCLK] = { 3, -1, "vclk-gate", NULL, 0 }, /* Video Capture */
70 [ASPEED_CLK_GATE_BCLK] = { 4, 8, "bclk-gate", "bclk", 0 }, /* PCIe/PCI */
[all …]
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| D | clk-aspeed.c | 1 // SPDX-License-Identifier: GPL-2.0+
4 #define pr_fmt(fmt) "clk-aspeed: " fmt
13 #include <dt-bindings/clock/aspeed-clock.h>
15 #include "clk-aspeed.h"
49 [ASPEED_CLK_GATE_ECLK] = { 0, 6, "eclk-gate", "eclk", 0 }, /* Video Engine */
50 [ASPEED_CLK_GATE_GCLK] = { 1, 7, "gclk-gate", NULL, 0 }, /* 2D engine */
51 [ASPEED_CLK_GATE_MCLK] = { 2, -1, "mclk-gate", "mpll", CLK_IS_CRITICAL }, /* SDRAM */
52 [ASPEED_CLK_GATE_VCLK] = { 3, -1, "vclk-gate", NULL, 0 }, /* Video Capture */
53 [ASPEED_CLK_GATE_BCLK] = { 4, 8, "bclk-gate", "bclk", CLK_IS_CRITICAL }, /* PCIe/PCI */
54 [ASPEED_CLK_GATE_DCLK] = { 5, -1, "dclk-gate", NULL, CLK_IS_CRITICAL }, /* DAC */
[all …]
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| D | clk-nomadik.c | 1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2013 ST-Ericsson AB
14 #include <linux/clk-provider.h>
74 pr_crit("force-enabling MXTALO\n"); in nomadik_clk_reboot_handler()
84 { .compatible = "stericsson,nomadik-src" },
122 if (of_property_read_bool(np, "disable-sxtalo")) { in nomadik_src_init()
127 if (of_property_read_bool(np, "disable-mxtalo")) { in nomadik_src_init()
138 * struct clk_pll1 - Nomadik PLL1 clock
148 * struct clk_src - Nomadik src clock
171 if (pll->id == 1) { in pll_clk_enable()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
| D | radeon_uvd.c | 15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
72 INIT_DELAYED_WORK(&rdev->uvd.idle_work, radeon_uvd_idle_work_handler); in radeon_uvd_init()
74 switch (rdev->family) { in radeon_uvd_init()
134 return -EINVAL; in radeon_uvd_init()
137 rdev->uvd.fw_header_present = false; in radeon_uvd_init()
138 rdev->uvd.max_handles = RADEON_DEFAULT_UVD_HANDLES; in radeon_uvd_init()
141 r = request_firmware(&rdev->uvd_fw, fw_name, rdev->dev); in radeon_uvd_init()
143 dev_err(rdev->dev, "radeon_uvd: Can't load firmware \"%s\"\n", in radeon_uvd_init()
146 struct common_firmware_header *hdr = (void *)rdev->uvd_fw->data; in radeon_uvd_init()
149 r = radeon_ucode_validate(rdev->uvd_fw); in radeon_uvd_init()
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/radeon/ |
| D | radeon_uvd.c | 15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
72 INIT_DELAYED_WORK(&rdev->uvd.idle_work, radeon_uvd_idle_work_handler); in radeon_uvd_init()
74 switch (rdev->family) { in radeon_uvd_init()
134 return -EINVAL; in radeon_uvd_init()
137 rdev->uvd.fw_header_present = false; in radeon_uvd_init()
138 rdev->uvd.max_handles = RADEON_DEFAULT_UVD_HANDLES; in radeon_uvd_init()
141 r = request_firmware(&rdev->uvd_fw, fw_name, rdev->dev); in radeon_uvd_init()
143 dev_err(rdev->dev, "radeon_uvd: Can't load firmware \"%s\"\n", in radeon_uvd_init()
146 struct common_firmware_header *hdr = (void *)rdev->uvd_fw->data; in radeon_uvd_init()
149 r = radeon_ucode_validate(rdev->uvd_fw); in radeon_uvd_init()
[all …]
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| /kernel/linux/linux-5.10/drivers/video/fbdev/ |
| D | ssd1307fb.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
117 array->type = type; in ssd1307fb_alloc_array()
131 dev_err(&client->dev, "Couldn't send I2C command.\n"); in ssd1307fb_write_array()
145 return -ENOMEM; in ssd1307fb_write_cmd()
147 array->data[0] = cmd; in ssd1307fb_write_cmd()
158 u8 *vmem = par->info->screen_buffer; in ssd1307fb_update_display()
159 unsigned int line_length = par->info->fix.line_length; in ssd1307fb_update_display()
160 unsigned int pages = DIV_ROUND_UP(par->height, 8); in ssd1307fb_update_display()
163 array = ssd1307fb_alloc_array(par->width * pages, SSD1307FB_DATA); in ssd1307fb_update_display()
176 * wide. Each letter-number combination is a bit that controls in ssd1307fb_update_display()
[all …]
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| /kernel/linux/linux-6.6/drivers/video/fbdev/ |
| D | ssd1307fb.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
122 array->type = type; in ssd1307fb_alloc_array()
136 dev_err(&client->dev, "Couldn't send I2C command.\n"); in ssd1307fb_write_array()
150 return -ENOMEM; in ssd1307fb_write_cmd()
152 array->data[0] = cmd; in ssd1307fb_write_cmd()
163 u8 col_end = col_start + cols - 1; in ssd1307fb_set_col_range()
166 if (col_start == par->col_start && col_end == par->col_end) in ssd1307fb_set_col_range()
169 ret = ssd1307fb_write_cmd(par->client, SSD1307FB_SET_COL_RANGE); in ssd1307fb_set_col_range()
173 ret = ssd1307fb_write_cmd(par->client, col_start); in ssd1307fb_set_col_range()
177 ret = ssd1307fb_write_cmd(par->client, col_end); in ssd1307fb_set_col_range()
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/solomon/ |
| D | ssd130x.c | 1 // SPDX-License-Identifier: GPL-2.0-only
167 return regmap_bulk_write(ssd130x->regmap, SSD130X_DATA, values, count); in ssd130x_write_data()
189 ret = regmap_write(ssd130x->regmap, SSD130X_COMMAND, value); in ssd130x_write_cmd()
192 } while (--count); in ssd130x_write_cmd()
204 u8 col_end = col_start + cols - 1; in ssd130x_set_col_range()
207 if (col_start == ssd130x->col_start && col_end == ssd130x->col_end) in ssd130x_set_col_range()
214 ssd130x->col_start = col_start; in ssd130x_set_col_range()
215 ssd130x->col_end = col_end; in ssd130x_set_col_range()
222 u8 page_end = page_start + pages - 1; in ssd130x_set_page_range()
225 if (page_start == ssd130x->page_start && page_end == ssd130x->page_end) in ssd130x_set_page_range()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| D | si.c | 913 spin_lock_irqsave(&adev->pcie_idx_lock, flags); in si_pcie_rreg()
917 spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); in si_pcie_rreg()
925 spin_lock_irqsave(&adev->pcie_idx_lock, flags); in si_pcie_wreg()
930 spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); in si_pcie_wreg()
938 spin_lock_irqsave(&adev->pcie_idx_lock, flags); in si_pciep_rreg()
942 spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); in si_pciep_rreg()
950 spin_lock_irqsave(&adev->pcie_idx_lock, flags); in si_pciep_wreg()
955 spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); in si_pciep_wreg()
963 spin_lock_irqsave(&adev->smc_idx_lock, flags); in si_smc_rreg()
966 spin_unlock_irqrestore(&adev->smc_idx_lock, flags); in si_smc_rreg()
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
| D | si.c | 992 switch (adev->asic_type) { in si_query_video_codecs()
1014 return -EINVAL; in si_query_video_codecs()
1023 spin_lock_irqsave(&adev->pcie_idx_lock, flags); in si_pcie_rreg()
1027 spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); in si_pcie_rreg()
1035 spin_lock_irqsave(&adev->pcie_idx_lock, flags); in si_pcie_wreg()
1040 spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); in si_pcie_wreg()
1048 spin_lock_irqsave(&adev->pcie_idx_lock, flags); in si_pciep_rreg()
1052 spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); in si_pciep_rreg()
1060 spin_lock_irqsave(&adev->pcie_idx_lock, flags); in si_pciep_wreg()
1065 spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); in si_pciep_wreg()
[all …]
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