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/kernel/linux/linux-6.6/include/linux/
Dkvm_irqfd.h1 /* SPDX-License-Identifier: GPL-2.0-only */
16 * level triggered interrupts. The interrupt is asserted on eventfd
18 * interrupt is de-asserted and userspace is notified through the
19 * resamplefd. All resamplers on the same gsi are de-asserted
27 * RCU list modified under kvm->irqfds.resampler_lock
32 * Entry in list of kvm->irqfd.resampler_list. Use for sharing
34 * RCU list modified under kvm->irqfds.resampler_lock
40 /* Used for MSI fast-path */
46 /* Used for level IRQ fast-path */
49 /* The resampler used by this irqfd (resampler-only) */
[all …]
/kernel/linux/linux-5.10/include/linux/
Dkvm_irqfd.h1 /* SPDX-License-Identifier: GPL-2.0-only */
16 * level triggered interrupts. The interrupt is asserted on eventfd
18 * interrupt is de-asserted and userspace is notified through the
19 * resamplefd. All resamplers on the same gsi are de-asserted
27 * RCU list modified under kvm->irqfds.resampler_lock
32 * Entry in list of kvm->irqfd.resampler_list. Use for sharing
34 * Accessed and modified under kvm->irqfds.resampler_lock
40 /* Used for MSI fast-path */
46 /* Used for level IRQ fast-path */
49 /* The resampler used by this irqfd (resampler-only) */
[all …]
/kernel/linux/linux-5.10/include/linux/input/
Dauo-pixcir-ts.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Driver for AUO in-cell touchscreens
5 * Copyright (c) 2011 Heiko Stuebner <heiko@sntech.de>
18 * periodical: interrupt is asserted periodicaly
19 * compare coordinates: interrupt is asserted when coordinates change
20 * indicate touch: interrupt is asserted during touch
31 * @x_max x-resolution
32 * @y_max y-resolution
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/
Dmmc-pwrseq-simple.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-pwrseq-simple.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
19 const: mmc-pwrseq-simple
21 reset-gpios:
26 contains a list of GPIO specifiers. The reset GPIOs are asserted
28 They will be de-asserted right after the power has been provided to the
33 description: Handle for the entry in clock-names.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/
Dmmc-pwrseq-simple.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-pwrseq-simple.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
19 const: mmc-pwrseq-simple
21 reset-gpios:
26 contains a list of GPIO specifiers. The reset GPIOs are asserted
28 They will be de-asserted right after the power has been provided to the
33 description: Handle for the entry in clock-names.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/
Dmvebu-devbus.txt9 - compatible: Armada 370/XP SoC are supported using the
10 "marvell,mvebu-devbus" compatible string.
13 "marvell,orion-devbus" compatible string.
15 - reg: A resource specifier for the register space.
20 - #address-cells: Must be set to 1
21 - #size-cells: Must be set to 1
22 - ranges: Must be set up to reflect the memory layout with four
23 integer values for each chip-select line in use:
28 - devbus,keep-config This property can optionally be used to keep
37 - devbus,turn-off-ps: Defines the time during which the controller does not
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/
Dmvebu-devbus.txt9 - compatible: Armada 370/XP SoC are supported using the
10 "marvell,mvebu-devbus" compatible string.
13 "marvell,orion-devbus" compatible string.
15 - reg: A resource specifier for the register space.
20 - #address-cells: Must be set to 1
21 - #size-cells: Must be set to 1
22 - ranges: Must be set up to reflect the memory layout with four
23 integer values for each chip-select line in use:
28 - devbus,keep-config This property can optionally be used to keep
37 - devbus,turn-off-ps: Defines the time during which the controller does not
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/spi/
Dspi-peripheral-props.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for a SPI bus.
11 be common properties like spi-max-frequency, spi-cpha, etc. or they could be
13 need to be defined in the peripheral node because they are per-peripheral and
19 - Mark Brown <broonie@kernel.org>
27 - minimum: 0
32 spi-cs-high:
[all …]
Dcdns,qspi-nor-peripheral-props.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/cdns,qspi-nor-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for the Cadence QSPI controller.
10 See spi-peripheral-props.yaml for more info.
13 - Vaishnav Achath <vaishnav.a@ti.com>
16 # cdns,qspi-nor.yaml
17 cdns,read-delay:
22 cdns,tshsl-ns:
[all …]
/kernel/linux/linux-6.6/drivers/video/backlight/
Dlms283gf05.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * lms283gf05.c -- support for Samsung LMS283GF05 LCD
95 gpiod_set_value(gpiod, 0); /* De-asserted */ in lms283gf05_reset()
97 gpiod_set_value(gpiod, 1); /* Asserted */ in lms283gf05_reset()
99 gpiod_set_value(gpiod, 0); /* De-asserted */ in lms283gf05_reset()
127 struct spi_device *spi = st->spi; in lms283gf05_power_set()
130 if (st->reset) in lms283gf05_power_set()
131 lms283gf05_reset(st->reset); in lms283gf05_power_set()
135 if (st->reset) in lms283gf05_power_set()
136 gpiod_set_value(st->reset, 1); /* Asserted */ in lms283gf05_power_set()
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-omap2/
Dprminst44xx.c1 // SPDX-License-Identifier: GPL-2.0-only
18 #include "prcm-common.h"
23 #include "prm-regbits-44xx.h"
34 * omap_prm_base_init - Populates the prm partitions
75 /* Read-modify-write a register in PRM. Caller must lock */
90 * omap4_prminst_is_hardreset_asserted - read the HW reset line state of
95 * Returns 1 if the (sub)module hardreset line is currently asserted,
96 * 0 if the (sub)module hardreset line is not currently asserted, or
97 * -EINVAL upon parameter error.
112 * omap4_prminst_assert_hardreset - assert the HW reset line of a submodule
[all …]
Dprm2xxx_3xxx.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010-2011 Texas Instruments, Inc.
18 #include "prm-regbits-24xx.h"
22 * omap2_prm_is_hardreset_asserted - read the HW reset line state of
29 * Returns 1 if the (sub)module hardreset line is currently asserted,
30 * 0 if the (sub)module hardreset line is not currently asserted, or
31 * -EINVAL if called while running on a non-OMAP2/3 chip.
40 * omap2_prm_assert_hardreset - assert the HW reset line of a submodule
47 * reset line to be asserted / deasserted in order to fully enable the
48 * IP. These modules may have multiple hard-reset lines that reset
[all …]
/kernel/linux/linux-6.6/arch/arm/mach-omap2/
Dprminst44xx.c1 // SPDX-License-Identifier: GPL-2.0-only
18 #include "prcm-common.h"
23 #include "prm-regbits-44xx.h"
34 * omap_prm_base_init - Populates the prm partitions
75 /* Read-modify-write a register in PRM. Caller must lock */
90 * omap4_prminst_is_hardreset_asserted - read the HW reset line state of
95 * Returns 1 if the (sub)module hardreset line is currently asserted,
96 * 0 if the (sub)module hardreset line is not currently asserted, or
97 * -EINVAL upon parameter error.
112 * omap4_prminst_assert_hardreset - assert the HW reset line of a submodule
[all …]
Dprm2xxx_3xxx.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010-2011 Texas Instruments, Inc.
18 #include "prm-regbits-24xx.h"
22 * omap2_prm_is_hardreset_asserted - read the HW reset line state of
29 * Returns 1 if the (sub)module hardreset line is currently asserted,
30 * 0 if the (sub)module hardreset line is not currently asserted, or
31 * -EINVAL if called while running on a non-OMAP2/3 chip.
40 * omap2_prm_assert_hardreset - assert the HW reset line of a submodule
47 * reset line to be asserted / deasserted in order to fully enable the
48 * IP. These modules may have multiple hard-reset lines that reset
[all …]
/kernel/linux/linux-5.10/arch/sparc/include/asm/
Dbbc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * bbc.h: Defines for BootBus Controller found on UltraSPARC-III
12 /* Register sizes are indicated by "B" (Byte, 1-byte),
13 * "H" (Half-word, 2 bytes), "W" (Word, 4 bytes) or
29 #define BBC_ES_DACT 0x14 /* [B] E* De-Assert Change Time */
30 #define BBC_ES_DABT 0x15 /* [B] E* De-Assert Bypass Time */
38 #define BBC_I2C_0_S1 0x2e /* [B] I2C ctrlr-0 reg S1 */
39 #define BBC_I2C_0_S0 0x2f /* [B] I2C ctrlr-0 regs S0,S0',S2,S3*/
40 #define BBC_I2C_1_S1 0x30 /* [B] I2C ctrlr-1 reg S1 */
41 #define BBC_I2C_1_S0 0x31 /* [B] I2C ctrlr-1 regs S0,S0',S2,S3*/
[all …]
/kernel/linux/linux-6.6/arch/sparc/include/asm/
Dbbc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * bbc.h: Defines for BootBus Controller found on UltraSPARC-III
12 /* Register sizes are indicated by "B" (Byte, 1-byte),
13 * "H" (Half-word, 2 bytes), "W" (Word, 4 bytes) or
29 #define BBC_ES_DACT 0x14 /* [B] E* De-Assert Change Time */
30 #define BBC_ES_DABT 0x15 /* [B] E* De-Assert Bypass Time */
38 #define BBC_I2C_0_S1 0x2e /* [B] I2C ctrlr-0 reg S1 */
39 #define BBC_I2C_0_S0 0x2f /* [B] I2C ctrlr-0 regs S0,S0',S2,S3*/
40 #define BBC_I2C_1_S1 0x30 /* [B] I2C ctrlr-1 reg S1 */
41 #define BBC_I2C_1_S0 0x31 /* [B] I2C ctrlr-1 regs S0,S0',S2,S3*/
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/bus/
Dnvidia,tegra20-gmi.txt10 - compatible : Should contain one of the following:
11 For Tegra20 must contain "nvidia,tegra20-gmi".
12 For Tegra30 must contain "nvidia,tegra30-gmi".
13 - reg: Should contain GMI controller registers location and length.
14 - clocks: Must contain an entry for each entry in clock-names.
15 - clock-names: Must include the following entries: "gmi"
16 - resets : Must contain an entry for each entry in reset-names.
17 - reset-names : Must include the following entries: "gmi"
18 - #address-cells: The number of cells used to represent physical base
20 - #size-cells: The number of cells used to represent the size of an address
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/bus/
Dnvidia,tegra20-gmi.txt10 - compatible : Should contain one of the following:
11 For Tegra20 must contain "nvidia,tegra20-gmi".
12 For Tegra30 must contain "nvidia,tegra30-gmi".
13 - reg: Should contain GMI controller registers location and length.
14 - clocks: Must contain an entry for each entry in clock-names.
15 - clock-names: Must include the following entries: "gmi"
16 - resets : Must contain an entry for each entry in reset-names.
17 - reset-names : Must include the following entries: "gmi"
18 - #address-cells: The number of cells used to represent physical base
20 - #size-cells: The number of cells used to represent the size of an address
[all …]
/kernel/linux/linux-6.6/drivers/clk/baikal-t1/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 bool "Baikal-T1 Clocks Control Unit interface"
7 Clocks Control Unit is the core of Baikal-T1 SoC System Controller
13 to select Baikal-T1 CCU PLLs and Dividers drivers.
18 bool "Baikal-T1 CCU PLLs support"
22 Enable this to support the PLLs embedded into the Baikal-T1 SoC
31 bool "Baikal-T1 CCU Dividers support"
36 between AXI-bus and system devices coming from CCU PLLs of Baikal-T1
42 bool "Baikal-T1 CCU Resets support"
48 AXI-bus and some subsystems reset. These are mainly the
[all …]
/kernel/linux/linux-6.6/include/sound/
Dcs4271.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
17 * line is de-asserted. That also means that clocks cannot be changed
19 * a complete re-initialization of all registers.
21 * One (undocumented) workaround is to assert and de-assert the PDN bit
/kernel/linux/linux-5.10/include/sound/
Dcs4271.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
17 * line is de-asserted. That also means that clocks cannot be changed
19 * a complete re-initialization of all registers.
21 * One (undocumented) workaround is to assert and de-assert the PDN bit
/kernel/linux/linux-6.6/drivers/fpga/
Dice40-spi.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/fpga/fpga-mgr.h>
34 struct ice40_fpga_priv *priv = mgr->priv; in ice40_fpga_ops_state()
36 return gpiod_get_value(priv->cdone) ? FPGA_MGR_STATE_OPERATING : in ice40_fpga_ops_state()
44 struct ice40_fpga_priv *priv = mgr->priv; in ice40_fpga_ops_write_init()
45 struct spi_device *dev = priv->dev; in ice40_fpga_ops_write_init()
62 if ((info->flags & FPGA_MGR_PARTIAL_RECONFIG)) { in ice40_fpga_ops_write_init()
63 dev_err(&dev->dev, in ice40_fpga_ops_write_init()
65 return -ENOTSUPP; in ice40_fpga_ops_write_init()
69 spi_bus_lock(dev->master); in ice40_fpga_ops_write_init()
[all …]
/kernel/linux/linux-5.10/drivers/fpga/
Dice40-spi.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/fpga/fpga-mgr.h>
34 struct ice40_fpga_priv *priv = mgr->priv; in ice40_fpga_ops_state()
36 return gpiod_get_value(priv->cdone) ? FPGA_MGR_STATE_OPERATING : in ice40_fpga_ops_state()
44 struct ice40_fpga_priv *priv = mgr->priv; in ice40_fpga_ops_write_init()
45 struct spi_device *dev = priv->dev; in ice40_fpga_ops_write_init()
62 if ((info->flags & FPGA_MGR_PARTIAL_RECONFIG)) { in ice40_fpga_ops_write_init()
63 dev_err(&dev->dev, in ice40_fpga_ops_write_init()
65 return -ENOTSUPP; in ice40_fpga_ops_write_init()
69 spi_bus_lock(dev->master); in ice40_fpga_ops_write_init()
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/
Dcs4271.txt7 - compatible: "cirrus,cs4271"
10 Documentation/devicetree/bindings/spi/spi-bus.txt
14 - reg: the i2c address
19 - reset-gpio: a GPIO spec to define which pin is connected to the chip's
21 - cirrus,amuteb-eq-bmutec: When given, the Codec's AMUTEB=BMUTEC flag
23 - cirrus,enable-soft-reset:
25 line is de-asserted. That also means that clocks cannot be changed
27 a complete re-initialization of all registers.
29 One (undocumented) workaround is to assert and de-assert the PDN bit
36 - vd-supply: Digital power
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/
Dcs4271.txt7 - compatible: "cirrus,cs4271"
10 Documentation/devicetree/bindings/spi/spi-bus.txt
14 - reg: the i2c address
19 - reset-gpio: a GPIO spec to define which pin is connected to the chip's
21 - cirrus,amuteb-eq-bmutec: When given, the Codec's AMUTEB=BMUTEC flag
23 - cirrus,enable-soft-reset:
25 line is de-asserted. That also means that clocks cannot be changed
27 a complete re-initialization of all registers.
29 One (undocumented) workaround is to assert and de-assert the PDN bit
36 - vd-supply: Digital power
[all …]

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