| /kernel/linux/linux-6.6/drivers/i2c/busses/ |
| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 3 # Makefile for the i2c bus drivers. 7 obj-$(CONFIG_I2C_SCMI) += i2c-scmi.o 9 # Auxiliary I2C/SMBus modules 10 obj-$(CONFIG_I2C_CCGX_UCSI) += i2c-ccgx-ucsi.o 13 obj-$(CONFIG_I2C_ALI1535) += i2c-ali1535.o 14 obj-$(CONFIG_I2C_ALI1563) += i2c-ali1563.o 15 obj-$(CONFIG_I2C_ALI15X3) += i2c-ali15x3.o 16 obj-$(CONFIG_I2C_AMD756) += i2c-amd756.o 17 obj-$(CONFIG_I2C_AMD756_S4882) += i2c-amd756-s4882.o [all …]
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| D | i2c-designware-slave.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Synopsys DesignWare I2C adapter driver (slave only). 5 * Based on the Synopsys DesignWare I2C adapter driver (master). 12 #include <linux/i2c.h> 19 #include "i2c-designware-core.h" 24 regmap_write(dev->map, DW_IC_TX_TL, 0); in i2c_dw_configure_fifo_slave() 25 regmap_write(dev->map, DW_IC_RX_TL, 0); in i2c_dw_configure_fifo_slave() 27 /* Configure the I2C slave. */ in i2c_dw_configure_fifo_slave() 28 regmap_write(dev->map, DW_IC_CON, dev->slave_cfg); in i2c_dw_configure_fifo_slave() 29 regmap_write(dev->map, DW_IC_INTR_MASK, DW_IC_INTR_SLAVE_MASK); in i2c_dw_configure_fifo_slave() [all …]
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| D | i2c-designware-platdrv.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Synopsys DesignWare I2C adapter driver. 5 * Based on the TI DAVINCI I2C adapter driver. 12 #include <linux/clk-provider.h> 18 #include <linux/i2c.h> 36 #include "i2c-designware-core.h" 40 return clk_get_rate(dev->clk) / KILO; in i2c_dw_get_clk_rate_khz() 82 ret = regmap_write(dev->sysmap, BT1_I2C_CTL, in bt1_i2c_read() 87 return regmap_read(dev->sysmap, BT1_I2C_DO, val); in bt1_i2c_read() 95 ret = regmap_write(dev->sysmap, BT1_I2C_DI, val); in bt1_i2c_write() [all …]
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| D | i2c-designware-common.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Synopsys DesignWare I2C adapter driver. 5 * Based on the TI DAVINCI I2C adapter driver. 18 #include <linux/i2c.h> 29 #include "i2c-designware-core.h" 59 "incorrect slave-transmitter mode configuration", 66 *val = readl(dev->base + reg); in dw_reg_read() 75 writel(val, dev->base + reg); in dw_reg_write() 84 *val = swab32(readl(dev->base + reg)); in dw_reg_read_swab() 93 writel(swab32(val), dev->base + reg); in dw_reg_write_swab() [all …]
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| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 6 menu "I2C Hardware Bus support" 16 for Cypress CCGx Type-C controller. Individual bus drivers 25 controller is part of the 7101 device, which is an ACPI-compliant 29 will be called i2c-ali1535. 37 controller is part of the 7101 device, which is an ACPI-compliant 41 will be called i2c-ali1563. 48 Acer Labs Inc. (ALI) M1514 and M1543 motherboard I2C interfaces. 51 will be called i2c-ali15x3. 58 756/766/768 mainboard I2C interfaces. The driver also includes [all …]
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| D | i2c-designware-pcidrv.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Synopsys DesignWare I2C adapter driver (master only). 5 * Based on the TI DAVINCI I2C adapter driver. 16 #include <linux/i2c.h> 27 #include "i2c-designware-core.h" 28 #include "i2c-ccgx-ucsi.h" 30 #define DRIVER_NAME "i2c-designware-pci" 91 /* NAVI-AMD HCNT/LCNT/SDA hold time */ 105 struct dw_i2c_dev *dev = dev_get_drvdata(&pdev->dev); in mfld_setup() 107 switch (pdev->device) { in mfld_setup() [all …]
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| /kernel/linux/linux-5.10/drivers/i2c/busses/ |
| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 3 # Makefile for the i2c bus drivers. 7 obj-$(CONFIG_I2C_SCMI) += i2c-scmi.o 10 obj-$(CONFIG_I2C_ALI1535) += i2c-ali1535.o 11 obj-$(CONFIG_I2C_ALI1563) += i2c-ali1563.o 12 obj-$(CONFIG_I2C_ALI15X3) += i2c-ali15x3.o 13 obj-$(CONFIG_I2C_AMD756) += i2c-amd756.o 14 obj-$(CONFIG_I2C_AMD756_S4882) += i2c-amd756-s4882.o 15 obj-$(CONFIG_I2C_AMD8111) += i2c-amd8111.o 16 obj-$(CONFIG_I2C_CHT_WC) += i2c-cht-wc.o [all …]
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| D | i2c-designware-slave.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Synopsys DesignWare I2C adapter driver (slave only). 5 * Based on the Synopsys DesignWare I2C adapter driver (master). 12 #include <linux/i2c.h> 19 #include "i2c-designware-core.h" 24 regmap_write(dev->map, DW_IC_TX_TL, 0); in i2c_dw_configure_fifo_slave() 25 regmap_write(dev->map, DW_IC_RX_TL, 0); in i2c_dw_configure_fifo_slave() 27 /* Configure the I2C slave. */ in i2c_dw_configure_fifo_slave() 28 regmap_write(dev->map, DW_IC_CON, dev->slave_cfg); in i2c_dw_configure_fifo_slave() 29 regmap_write(dev->map, DW_IC_INTR_MASK, DW_IC_INTR_SLAVE_MASK); in i2c_dw_configure_fifo_slave() [all …]
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| D | i2c-designware-platdrv.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Synopsys DesignWare I2C adapter driver. 5 * Based on the TI DAVINCI I2C adapter driver. 12 #include <linux/clk-provider.h> 18 #include <linux/i2c.h> 25 #include <linux/platform_data/i2c-designware.h> 37 #include "i2c-designware-core.h" 41 return clk_get_rate(dev->clk) / KILO; in i2c_dw_get_clk_rate_khz() 82 ret = regmap_write(dev->sysmap, BT1_I2C_CTL, in bt1_i2c_read() 87 return regmap_read(dev->sysmap, BT1_I2C_DO, val); in bt1_i2c_read() [all …]
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| D | i2c-designware-pcidrv.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Synopsys DesignWare I2C adapter driver (master only). 5 * Based on the TI DAVINCI I2C adapter driver. 16 #include <linux/i2c.h> 26 #include "i2c-designware-core.h" 28 #define DRIVER_NAME "i2c-designware-pci" 88 struct dw_i2c_dev *dev = dev_get_drvdata(&pdev->dev); in mfld_setup() 90 switch (pdev->device) { in mfld_setup() 92 dev->timings.bus_freq_hz = I2C_MAX_STANDARD_MODE_FREQ; in mfld_setup() 96 c->bus_num = pdev->device - 0x817 + 3; in mfld_setup() [all …]
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| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 6 menu "I2C Hardware Bus support" 18 controller is part of the 7101 device, which is an ACPI-compliant 22 will be called i2c-ali1535. 30 controller is part of the 7101 device, which is an ACPI-compliant 34 will be called i2c-ali1563. 41 Acer Labs Inc. (ALI) M1514 and M1543 motherboard I2C interfaces. 44 will be called i2c-ali15x3. 51 756/766/768 mainboard I2C interfaces. The driver also includes 52 support for the first (SMBus 1.0) I2C interface of the AMD 8111 and [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/i2c/ |
| D | snps,designware-i2c.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/i2c/snps,designware-i2c.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Synopsys DesignWare APB I2C Controller 10 - Jarkko Nikula <jarkko.nikula@linux.intel.com> 13 - $ref: /schemas/i2c/i2c-controller.yaml# 14 - if: 19 const: mscc,ocelot-i2c 28 - description: Generic Synopsys DesignWare I2C controller [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/i2c/ |
| D | snps,designware-i2c.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/i2c/snps,designware-i2c.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Synopsys DesignWare APB I2C Controller 10 - Jarkko Nikula <jarkko.nikula@linux.intel.com> 13 - $ref: /schemas/i2c/i2c-controller.yaml# 14 - if: 19 const: mscc,ocelot-i2c 28 - description: Generic Synopsys DesignWare I2C controller [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/toshiba/ |
| D | tmpv7708.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * (C) Copyright 2018 - 2020, Toshiba Corporation. 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 /memreserve/ 0x81000000 0x00300000; /* cpu-release-addr */ 17 #address-cells = <2>; 18 #size-cells = <2>; 21 #address-cells = <1>; 22 #size-cells = <0>; 24 cpu-map { [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/st/ |
| D | spear1310.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 15 compatible = "st,spear-spics-gpio"; 17 st-spics,peripcfg-reg = <0x3b0>; 18 st-spics,sw-enable-bit = <12>; 19 st-spics,cs-value-bit = <11>; 20 st-spics,cs-enable-mask = <3>; 21 st-spics,cs-enable-shift = <8>; 22 gpio-controller; 23 #gpio-cells = <2>; 27 compatible = "st,spear1310-miphy"; [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | spear1310.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 15 compatible = "st,spear-spics-gpio"; 17 st-spics,peripcfg-reg = <0x3b0>; 18 st-spics,sw-enable-bit = <12>; 19 st-spics,cs-value-bit = <11>; 20 st-spics,cs-enable-mask = <3>; 21 st-spics,cs-enable-shift = <8>; 22 gpio-controller; 23 #gpio-cells = <2>; 27 compatible = "st,spear1310-miphy"; [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/toshiba/ |
| D | tmpv7708.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * (C) Copyright 2018 - 2020, Toshiba Corporation. 10 #include <dt-bindings/clock/toshiba,tmpv770x.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 /memreserve/ 0x81000000 0x00300000; /* cpu-release-addr */ 18 #address-cells = <2>; 19 #size-cells = <2>; 22 #address-cells = <1>; 23 #size-cells = <0>; [all …]
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| /kernel/linux/linux-6.6/arch/arc/boot/dts/ |
| D | abilis_tb10x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 12 compatible = "abilis,arc-tb10x"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 #address-cells = <1>; 18 #size-cells = <0>; 28 compatible = "snps,arc-timer"; 30 interrupt-parent = <&intc>; 36 compatible = "snps,arc-timer"; 41 #address-cells = <1>; [all …]
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| /kernel/linux/linux-5.10/arch/arc/boot/dts/ |
| D | abilis_tb10x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 12 compatible = "abilis,arc-tb10x"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 #address-cells = <1>; 18 #size-cells = <0>; 28 compatible = "snps,arc-timer"; 30 interrupt-parent = <&intc>; 36 compatible = "snps,arc-timer"; 41 #address-cells = <1>; [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/dma/ |
| D | k3dma.txt | 6 - compatible: Must be one of 7 - "hisilicon,k3-dma-1.0" 8 - "hisilicon,hisi-pcm-asp-dma-1.0" 9 - reg: Should contain DMA registers location and length. 10 - interrupts: Should contain one interrupt shared by all channel 11 - #dma-cells: see dma.txt, should be 1, para number 12 - dma-channels: physical channels supported 13 - dma-requests: virtual channels supported, each virtual channel 15 - clocks: clock required 21 compatible = "hisilicon,k3-dma-1.0"; [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/ |
| D | k3dma.txt | 6 - compatible: Must be one of 7 - "hisilicon,k3-dma-1.0" 8 - "hisilicon,hisi-pcm-asp-dma-1.0" 9 - reg: Should contain DMA registers location and length. 10 - interrupts: Should contain one interrupt shared by all channel 11 - #dma-cells: see dma.txt, should be 1, para number 12 - dma-channels: physical channels supported 13 - dma-requests: virtual channels supported, each virtual channel 15 - clocks: clock required 21 compatible = "hisilicon,k3-dma-1.0"; [all …]
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| /kernel/linux/linux-6.6/arch/riscv/boot/dts/starfive/ |
| D | jh7100.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 7 /dts-v1/; 8 #include <dt-bindings/clock/starfive-jh7100.h> 9 #include <dt-bindings/reset/starfive-jh7100.h> 13 #address-cells = <2>; 14 #size-cells = <2>; 17 #address-cells = <1>; 18 #size-cells = <0>; 21 compatible = "sifive,u74-mc", "riscv"; 23 d-cache-block-size = <64>; [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/intel/ |
| D | socfpga_agilex5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 /dts-v1/; 7 #include <dt-bindings/reset/altr,rst-mgr-s10.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/clock/intel,agilex5-clkmgr.h> 14 compatible = "intel,socfpga-agilex5"; 15 #address-cells = <2>; 16 #size-cells = <2>; [all …]
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| /kernel/linux/linux-6.6/arch/mips/boot/dts/mscc/ |
| D | jaguar2.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #address-cells = <1>; 8 #size-cells = <1>; 18 #address-cells = <1>; 19 #size-cells = <0>; 29 cpuintc: interrupt-controller { 30 #address-cells = <0>; 31 #interrupt-cells = <1>; 32 interrupt-controller; 33 compatible = "mti,cpu-interrupt-controller"; [all …]
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| /kernel/linux/linux-6.6/arch/riscv/boot/dts/canaan/ |
| D | k210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com> 6 #include <dt-bindings/clock/k210-clk.h> 7 #include <dt-bindings/pinctrl/k210-fpioa.h> 8 #include <dt-bindings/reset/k210-rst.h> 12 * Although the K210 is a 64-bit CPU, the address bus is only 32-bits 15 #address-cells = <1>; 16 #size-cells = <1>; 17 compatible = "canaan,kendryte-k210"; 28 * Since this is a non-ratified draft specification, the kernel does not [all …]
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