| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn21/ |
| D | dcn21_hwseq.c | 43 hws->ctx
45 hws->regs->reg
49 hws->shifts->field_name, hws->masks->field_name
63 …config->gart_config.page_table_base_addr = ((uint64_t)page_table_base_hi << 32) | page_table_base_… in mmhub_update_page_table_config()
67 int dcn21_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_co… in dcn21_init_sys_ctx() argument
71 config.system_aperture.fb_top = pa_config->system_aperture.fb_top; in dcn21_init_sys_ctx()
72 config.system_aperture.fb_offset = pa_config->system_aperture.fb_offset; in dcn21_init_sys_ctx()
73 config.system_aperture.fb_base = pa_config->system_aperture.fb_base; in dcn21_init_sys_ctx()
74 config.system_aperture.agp_top = pa_config->system_aperture.agp_top; in dcn21_init_sys_ctx()
75 config.system_aperture.agp_bot = pa_config->system_aperture.agp_bot; in dcn21_init_sys_ctx()
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn21/ |
| D | dcn21_hwseq.c | 43 hws->ctx
45 hws->regs->reg
49 hws->shifts->field_name, hws->masks->field_name
63 …config->gart_config.page_table_base_addr = ((uint64_t)page_table_base_hi << 32) | page_table_base_… in mmhub_update_page_table_config()
67 int dcn21_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_co… in dcn21_init_sys_ctx() argument
71 config.system_aperture.fb_top = pa_config->system_aperture.fb_top; in dcn21_init_sys_ctx()
72 config.system_aperture.fb_offset = pa_config->system_aperture.fb_offset; in dcn21_init_sys_ctx()
73 config.system_aperture.fb_base = pa_config->system_aperture.fb_base; in dcn21_init_sys_ctx()
74 config.system_aperture.agp_top = pa_config->system_aperture.agp_top; in dcn21_init_sys_ctx()
75 config.system_aperture.agp_bot = pa_config->system_aperture.agp_bot; in dcn21_init_sys_ctx()
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_hwseq.c | 61 hws->ctx
63 hws->regs->reg
65 dc->ctx->logger
70 hws->shifts->field_name, hws->masks->field_name
75 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; in dcn30_set_blend_lut()
79 if (plane_state->blend_tf) { in dcn30_set_blend_lut()
80 if (plane_state->blend_tf->type == TF_TYPE_HWPWL) in dcn30_set_blend_lut()
81 blend_lut = &plane_state->blend_tf->pwl; in dcn30_set_blend_lut()
82 else if (plane_state->blend_tf->type == TF_TYPE_DISTRIBUTED_POINTS) { in dcn30_set_blend_lut()
84 plane_state->blend_tf, &dpp_base->regamma_params, false); in dcn30_set_blend_lut()
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_hwseq.c | 62 hws->ctx
64 hws->regs->reg
68 hws->shifts->field_name, hws->masks->field_name
70 static int find_free_gsl_group(const struct dc *dc) in find_free_gsl_group() argument
72 if (dc->res_pool->gsl_groups.gsl_0 == 0) in find_free_gsl_group()
74 if (dc->res_pool->gsl_groups.gsl_1 == 0) in find_free_gsl_group()
76 if (dc->res_pool->gsl_groups.gsl_2 == 0) in find_free_gsl_group()
88 * - immediate flip: find first available GSL group if not already assigned
91 * - vsync flip: disable GSL if used
94 * gsl_0 <=> pipe_ctx->stream_res.gsl_group == 1
[all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_hwseq.c | 58 hws->ctx
60 hws->regs->reg
64 hws->shifts->field_name, hws->masks->field_name
66 static int find_free_gsl_group(const struct dc *dc) in find_free_gsl_group() argument
68 if (dc->res_pool->gsl_groups.gsl_0 == 0) in find_free_gsl_group()
70 if (dc->res_pool->gsl_groups.gsl_1 == 0) in find_free_gsl_group()
72 if (dc->res_pool->gsl_groups.gsl_2 == 0) in find_free_gsl_group()
84 * - immediate flip: find first available GSL group if not already assigned
87 * - vsync flip: disable GSL if used
90 * gsl_0 <=> pipe_ctx->stream_res.gsl_group == 1
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn314/ |
| D | dcn314_hwseq.c | 1 // SPDX-License-Identifier: MIT
61 hws->ctx
63 hws->regs->reg
65 dc->ctx->logger
70 hws->shifts->field_name, hws->masks->field_name
75 bool hblank_halved = optc2_is_two_pixels_per_containter(&stream->timing); in calc_mpc_flow_ctrl_cnt()
81 flow_ctrl_cnt = stream->timing.h_total - stream->timing.h_addressable - in calc_mpc_flow_ctrl_cnt()
82 stream->timing.h_border_left - in calc_mpc_flow_ctrl_cnt()
83 stream->timing.h_border_right; in calc_mpc_flow_ctrl_cnt()
97 struct display_stream_compressor *dsc = pipe_ctx->stream_res.dsc; in update_dsc_on_stream()
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| D | amdgpu_dm_psr.c | 28 #include "dc.h"
35 struct dc *dc = link->ctx->dc; in link_supports_psrsu() local
37 if (!dc->caps.dmcub_support) in link_supports_psrsu()
40 if (dc->ctx->dce_version < DCN_VERSION_3_1) in link_supports_psrsu()
46 if (!link->dpcd_caps.alpm_caps.bits.AUX_WAKE_ALPM_CAP || in link_supports_psrsu()
47 !link->dpcd_caps.psr_info.psr_dpcd_caps.bits.Y_COORDINATE_REQUIRED) in link_supports_psrsu()
50 if (link->dpcd_caps.psr_info.psr_dpcd_caps.bits.SU_GRANULARITY_REQUIRED && in link_supports_psrsu()
51 !link->dpcd_caps.psr_info.psr2_su_y_granularity_cap) in link_supports_psrsu()
54 /* Temporarily disable PSR-SU to avoid glitches */ in link_supports_psrsu()
59 * amdgpu_dm_set_psr_caps() - set link psr capabilities
[all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_hwseq.c | 58 hws->ctx
60 hws->regs->reg
62 dc->ctx->logger
67 hws->shifts->field_name, hws->masks->field_name
72 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; in dcn30_set_blend_lut()
76 if (plane_state->blend_tf) { in dcn30_set_blend_lut()
77 if (plane_state->blend_tf->type == TF_TYPE_HWPWL) in dcn30_set_blend_lut()
78 blend_lut = &plane_state->blend_tf->pwl; in dcn30_set_blend_lut()
79 else if (plane_state->blend_tf->type == TF_TYPE_DISTRIBUTED_POINTS) { in dcn30_set_blend_lut()
81 plane_state->blend_tf, &dpp_base->regamma_params, false); in dcn30_set_blend_lut()
[all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/core/ |
| D | dc_link_hwss.c | 5 #include "dc.h"
46 return (convert_to_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt) == offset); in is_immediate_downstream()
55 if (!link->aux_access_disabled && in core_link_read_dpcd()
56 !dm_helpers_dp_read_dpcd(link->ctx, in core_link_read_dpcd()
70 if (!link->aux_access_disabled && in core_link_write_dpcd()
71 !dm_helpers_dp_write_dpcd(link->ctx, in core_link_write_dpcd()
85 if (link->sync_lt_in_progress) in dp_receiver_power_ctrl()
98 struct link_encoder *link_enc = link->link_enc; in dp_enable_link_phy()
99 struct dc *dc = link->ctx->dc; in dp_enable_link_phy() local
100 struct dmcu *dmcu = dc->res_pool->dmcu; in dp_enable_link_phy()
[all …]
|
| D | dc_stream.c | 2 * Copyright 2012-15 Advanced Micro Devices, Inc.
31 #include "dc.h"
37 #define DC_LOGGER dc->ctx->logger
44 if (sink->sink_signal == SIGNAL_TYPE_NONE) in update_stream_signal()
45 stream->signal = stream->link->connector_signal; in update_stream_signal()
47 stream->signal = sink->sink_signal; in update_stream_signal()
49 if (dc_is_dvi_signal(stream->signal)) { in update_stream_signal()
50 if (stream->ctx->dc->caps.dual_link_dvi && in update_stream_signal()
51 (stream->timing.pix_clk_100hz / 10) > TMDS_MAX_PIXEL_CLOCK && in update_stream_signal()
52 sink->sink_signal != SIGNAL_TYPE_DVI_SINGLE_LINK) in update_stream_signal()
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn31/ |
| D | dcn31_hwseq.c | 57 hws->ctx
59 hws->regs->reg
61 dc->ctx->logger
66 hws->shifts->field_name, hws->masks->field_name
68 static void enable_memory_low_power(struct dc *dc) in enable_memory_low_power() argument
70 struct dce_hwseq *hws = dc->hwseq; in enable_memory_low_power()
73 if (dc->debug.enable_mem_low_power.bits.dmcu) { in enable_memory_low_power()
75 if (dc->debug.disable_dmcu || dc->config.disable_dmcu) { in enable_memory_low_power()
81 if (dc->debug.enable_mem_low_power.bits.optc) { in enable_memory_low_power()
86 if (dc->debug.enable_mem_low_power.bits.vga) { in enable_memory_low_power()
[all …]
|
| /kernel/linux/linux-5.10/drivers/tty/ |
| D | nozomi.c | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * nozomi.c -- HSDPA driver Broadband Wireless Data Card - Globe Trotter
18 * --------------------------------------------------------------------------
25 * --------------------------------------------------------------------------
81 if (tbuf[data_len - 2] == '\r') \
82 tbuf[data_len - 2] = 'r'; \
152 F32_2 = 2048, /* 512 bytes downlink + uplink * 2 -> 2048 */
153 F32_8 = 8192, /* 3072 bytes downl. + 1024 bytes uplink * 2 -> 8192 */
177 CTRL_ERROR = -1,
187 PORT_ERROR = -1,
[all …]
|
| /kernel/linux/linux-6.6/drivers/tty/ |
| D | nozomi.c | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * nozomi.c -- HSDPA driver Broadband Wireless Data Card - Globe Trotter
18 * --------------------------------------------------------------------------
25 * --------------------------------------------------------------------------
78 if (tbuf[data_len - 2] == '\r') \
79 tbuf[data_len - 2] = 'r'; \
148 F32_2 = 2048, /* 512 bytes downlink + uplink * 2 -> 2048 */
149 F32_8 = 8192, /* 3072 bytes downl. + 1024 bytes uplink * 2 -> 8192 */
173 CTRL_ERROR = -1,
183 PORT_ERROR = -1,
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/bridge/imx/ |
| D | imx8qxp-pixel-link.c | 1 // SPDX-License-Identifier: GPL-2.0+
8 #include <linux/media-bus-format.h>
18 #include <dt-bindings/firmware/imx/rsrc.h>
20 #define DRIVER_NAME "imx8qxp-display-pixel-link"
43 ret = imx_sc_misc_set_control(pl->ipc_handle, pl->sink_rsc, in imx8qxp_pixel_link_enable_mst_en()
44 pl->mst_en_ctrl, true); in imx8qxp_pixel_link_enable_mst_en()
46 DRM_DEV_ERROR(pl->dev, in imx8qxp_pixel_link_enable_mst_en()
47 "failed to enable DC%u stream%u pixel link mst_en: %d\n", in imx8qxp_pixel_link_enable_mst_en()
48 pl->dc_id, pl->stream_id, ret); in imx8qxp_pixel_link_enable_mst_en()
55 ret = imx_sc_misc_set_control(pl->ipc_handle, pl->sink_rsc, in imx8qxp_pixel_link_enable_mst_vld()
[all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_hw_sequencer.c | 59 hws->ctx
61 hws->regs->reg
65 hws->shifts->field_name, hws->masks->field_name
77 const uint32_t ref_clk_mhz = dc_ctx->dc->res_pool->ref_clocks.dchub_ref_clock_inKhz / 1000; in print_microsec()
86 void dcn10_lock_all_pipes(struct dc *dc, in dcn10_lock_all_pipes() argument
94 for (i = 0; i < dc->res_pool->pipe_count; i++) { in dcn10_lock_all_pipes()
95 pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn10_lock_all_pipes()
96 tg = pipe_ctx->stream_res.tg; in dcn10_lock_all_pipes()
102 if (pipe_ctx->top_pipe || in dcn10_lock_all_pipes()
103 !pipe_ctx->stream || !pipe_ctx->plane_state || in dcn10_lock_all_pipes()
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_hw_sequencer.c | 63 hws->ctx
65 hws->regs->reg
69 hws->shifts->field_name, hws->masks->field_name
84 const uint32_t ref_clk_mhz = dc_ctx->dc->res_pool->ref_clocks.dchub_ref_clock_inKhz / 1000; in print_microsec()
93 void dcn10_lock_all_pipes(struct dc *dc, in dcn10_lock_all_pipes() argument
102 for (i = 0; i < dc->res_pool->pipe_count; i++) { in dcn10_lock_all_pipes()
103 old_pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in dcn10_lock_all_pipes()
104 pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn10_lock_all_pipes()
105 tg = pipe_ctx->stream_res.tg; in dcn10_lock_all_pipes()
111 if (pipe_ctx->top_pipe || in dcn10_lock_all_pipes()
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/ |
| D | dc.h | 2 * Copyright 2012-2023 Advanced Micro Devices, Inc.
99 // for example, 1080p -> 8K is 4.0, or 4000 raw value
107 // for example, 8K -> 1080p is 0.25, or 250 raw value
119 * DOC: color-management-caps
124 * abstracted HW. DCE 5-12 had almost no important changes, but starting with
131 * struct rom_curve_caps - predefined transfer function caps for degamma and regamma
147 * struct dpp_color_caps - color pipeline capabilities for display pipe and
152 * just plain 256-entry lookup
161 * @dgam_rom_for_yuv: pre-defined degamma LUT for YUV planes
162 * @dgam_rom_caps: pre-definied curve caps for degamma 1D LUT
[all …]
|
| /kernel/linux/linux-6.6/drivers/power/supply/ |
| D | max8903_charger.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * max8903_charger.c - Maxim 8903 USB/Adapter Charger Driver
28 struct gpio_desc *dok; /* DC (Adapter) Power OK output */
32 struct gpio_desc *dcm; /* Current-Limit Mode input (1: DC, 2: USB) */
53 val->intval = POWER_SUPPLY_STATUS_UNKNOWN; in max8903_get_property()
54 if (data->chg) { in max8903_get_property()
55 if (gpiod_get_value(data->chg)) in max8903_get_property()
57 val->intval = POWER_SUPPLY_STATUS_CHARGING; in max8903_get_property()
58 else if (data->usb_in || data->ta_in) in max8903_get_property()
59 val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING; in max8903_get_property()
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/power/supply/ |
| D | qcom_smbb.txt | 1 Qualcomm Switch-Mode Battery Charger and Boost
4 - compatible:
8 - "qcom,pm8941-charger"
10 - reg:
12 Value type: <prop-encoded-array>
15 - interrupts:
17 Value type: <prop-encoded-array>
21 - charge done
22 - charge fast mode
23 - charge trickle mode
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/dac/ |
| D | ad5755.txt | 1 * Analog Devices AD5755 IIO Multi-Channel DAC Linux Driver
4 - compatible: Has to contain one of the following:
6 adi,ad5755-1
11 - reg: spi chip select number for the device
12 - spi-cpha or spi-cpol: is the only modes that is supported
15 - spi-max-frequency: Definition as per
16 Documentation/devicetree/bindings/spi/spi-bus.txt
19 See include/dt-bindings/iio/ad5755.h
20 - adi,ext-dc-dc-compenstation-resistor: boolean set if the hardware have an
23 - adi,dc-dc-phase:
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn32/ |
| D | dcn32_optc.c | 31 #include "dc.h"
36 optc1->tg_regs->reg
39 optc1->base.ctx
43 optc1->tg_shift->field_name, optc1->tg_mask->field_name
50 int h_active = timing->h_addressable + timing->h_border_left + timing->h_border_right; in optc32_set_odm_combine()
97 OTG_H_TIMING_DIV_MODE, opp_cnt - 1); in optc32_set_odm_combine()
98 optc1->opp_count = opp_cnt; in optc32_set_odm_combine()
109 * optc32_enable_crtc() - Enable CRTC - call ASIC Control Object to enable Timing generator.
121 OPTC_SEG0_SRC_SEL, optc->inst); in optc32_enable_crtc()
155 /* disable otg request until end of the first line in optc32_disable_crtc()
[all …]
|
| D | dcn32_hwseq.c | 57 hws->ctx
59 hws->regs->reg
61 dc->ctx->logger
66 hws->shifts->field_name, hws->masks->field_name
77 if (hws->ctx->dc->debug.disable_dsc_power_gate) in dcn32_dsc_pg_control()
80 if (!hws->ctx->dc->debug.enable_double_buffered_dsc_pg_support) in dcn32_dsc_pg_control()
134 bool force_on = true; /* disable power gating */ in dcn32_enable_power_gating_plane()
165 if (hws->ctx->dc->debug.disable_hubp_power_gate) in dcn32_hubp_pg_control()
194 static bool dcn32_check_no_memory_request_for_cab(struct dc *dc) in dcn32_check_no_memory_request_for_cab() argument
198 /* First, check no-memory-request case */ in dcn32_check_no_memory_request_for_cab()
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/power/supply/ |
| D | qcom,pm8941-charger.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/supply/qcom,pm8941-charger.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Switch-Mode Battery Charger and Boost
10 - Sebastian Reichel <sre@kernel.org>
15 - qcom,pm8226-charger
16 - qcom,pm8941-charger
23 - description: charge done
24 - description: charge fast mode
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/link/protocols/ |
| D | link_dp_phy.c | 27 * This file implements basic dp phy functionality such as enable/disable phy
41 link->ctx->logger
49 if (link->sync_lt_in_progress) in dpcd_write_rx_power_ctrl()
64 link->cur_link_settings = *link_settings; in dp_enable_link_phy()
65 link->dc->hwss.enable_dp_link_output(link, link_res, signal, in dp_enable_link_phy()
74 struct dc *dc = link->ctx->dc; in dp_disable_link_phy() local
76 if (!link->wa_flags.dp_keep_receiver_powered && in dp_disable_link_phy()
77 !link->skip_implict_edp_power_control && in dp_disable_link_phy()
78 link->type != dc_connection_none) in dp_disable_link_phy()
81 dc->hwss.disable_link_output(link, link_res, signal); in dp_disable_link_phy()
[all …]
|
| /kernel/linux/linux-5.10/drivers/pwm/ |
| D | pwm-bcm-kona.c | 30 * 1) There is no disable bit and the hardware docs advise programming a zero
31 * duty to achieve output equivalent to that of a normal disable operation.
85 unsigned int value = readl(kp->base + PWM_CONTROL_OFFSET); in kona_pwmc_prepare_for_settings()
89 writel(value, kp->base + PWM_CONTROL_OFFSET); in kona_pwmc_prepare_for_settings()
100 unsigned int value = readl(kp->base + PWM_CONTROL_OFFSET); in kona_pwmc_apply_settings()
105 writel(value, kp->base + PWM_CONTROL_OFFSET); in kona_pwmc_apply_settings()
116 unsigned long prescale = PRESCALE_MIN, pc, dc; in kona_pwmc_config() local
117 unsigned int value, chan = pwm->hwpwm; in kona_pwmc_config()
124 * duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE in kona_pwmc_config()
127 * DC = (PWM_CLK_RATE * duty_ns) / (10^9 * (PRESCALE + 1)) in kona_pwmc_config()
[all …]
|