| /kernel/linux/linux-6.6/include/soc/at91/ |
| D | sama7-ddr.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 23 #define DDR3PHY_PGCR_CKDV1 (1 << 13) /* CK# Disable Value */ 24 #define DDR3PHY_PGCR_CKDV0 (1 << 12) /* CK Disable Value */ 29 #define DDR3PHY_ACDLLCR (0x14) /* DDR3PHY AC DLL Control Register */ 33 #define DDR3PHY_ACIOCR_CSPDD_CS0 (1 << 18) /* CS#[0] Power Down Driver */ 34 #define DDR3PHY_ACIOCR_CKPDD_CK0 (1 << 8) /* CK[0] Power Down Driver */ 35 #define DDR3PHY_ACIORC_ACPDD (1 << 3) /* AC Power Down Driver */ 38 #define DDR3PHY_DXCCR_DXPDR (1 << 3) /* Data Power Down Receiver */ 41 #define DDR3PHY_DSGCR_ODTPDD_ODT0 (1 << 20) /* ODT[0] Power Down Driver */ 44 #define DDR3PHY_ZQ0SR0_PDO_OFF (0) /* Pull-down output impedance select offset */ [all …]
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| /kernel/linux/linux-5.10/Documentation/arm/samsung-s3c24xx/ |
| D | usb-host.rst | 8 ------------ 10 This document details the S3C2410/S3C2440 in-built OHCI USB host support. 13 ------------- 19 Device Drivers ---> 20 USB support ---> 21 <*> Support for Host-side USB 27 - CONFIG_USB 28 - CONFIG_USB_OHCI_HCD 36 ------------- 39 added by the board specific support file in linux/arch/arm/mach-s3c2410, [all …]
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| /kernel/linux/linux-5.10/drivers/pci/pcie/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 3 # PCI Express Port Bus Configuration 6 bool "PCI Express Port Bus support" 8 This enables PCI Express Port Bus support. Users can then enable 9 support for Native Hot-Plug, Advanced Error Reporting, Power 10 Management Events, and Downstream Port Containment. 29 This enables PCI Express Root Port Advanced Error Reporting 31 Port will be handled by PCI Express AER driver. 38 This enables PCI Express Root Port Advanced Error Reporting 42 to trigger various real hardware errors. Software-based [all …]
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| /kernel/linux/linux-6.6/arch/sparc/include/asm/ |
| D | fhc.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 11 #define CLOCK_CTRL 0x00UL /* Main control */ 14 #define CLOCK_PWRSTAT 0x30UL /* Power status */ 15 #define CLOCK_PWRPRES 0x40UL /* Power presence */ 18 #define CLOCK_PWRSTAT2 0x70UL /* Power status two */ 30 #define FHC_PREGS_RCS 0x10UL /* FHC Reset Control/Status Register */ 31 #define FHC_RCS_POR 0x80000000 /* Last reset was a power cycle */ 32 #define FHC_RCS_SPOR 0x40000000 /* Last reset was sw power on reset */ 39 #define FHC_PREGS_CTRL 0x20UL /* FHC Control Register */ 44 #define FHC_CONTROL_DCD 0x00008000 /* DC-->DC Converter Disable */ [all …]
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| /kernel/linux/linux-5.10/arch/sparc/include/asm/ |
| D | fhc.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 11 #define CLOCK_CTRL 0x00UL /* Main control */ 14 #define CLOCK_PWRSTAT 0x30UL /* Power status */ 15 #define CLOCK_PWRPRES 0x40UL /* Power presence */ 18 #define CLOCK_PWRSTAT2 0x70UL /* Power status two */ 30 #define FHC_PREGS_RCS 0x10UL /* FHC Reset Control/Status Register */ 31 #define FHC_RCS_POR 0x80000000 /* Last reset was a power cycle */ 32 #define FHC_RCS_SPOR 0x40000000 /* Last reset was sw power on reset */ 39 #define FHC_PREGS_CTRL 0x20UL /* FHC Control Register */ 44 #define FHC_CONTROL_DCD 0x00008000 /* DC-->DC Converter Disable */ [all …]
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| /kernel/linux/linux-6.6/drivers/pci/pcie/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 3 # PCI Express Port Bus Configuration 6 bool "PCI Express Port Bus support" 9 This enables PCI Express Port Bus support. Users can then enable 10 support for Native Hot-Plug, Advanced Error Reporting, Power 11 Management Events, and Downstream Port Containment. 33 This enables PCI Express Root Port Advanced Error Reporting 35 Port will be handled by PCI Express AER driver. 42 This enables PCI Express Root Port Advanced Error Reporting 46 to trigger various real hardware errors. Software-based [all …]
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| /kernel/linux/linux-6.6/Documentation/sound/ |
| D | alsa-configuration.rst | 2 Advanced Linux Sound Architecture - Driver Configuration guide 38 ---------- 47 limiting card index for auto-loading (1-8); 49 For auto-loading more than one card, specify this option 50 together with snd-card-X aliases. 57 (0 = disable debug prints, 1 = normal debug messages, 63 Module snd-pcm-oss 64 ------------------ 86 regarding opening the device. When this option is non-zero, 90 Module snd-rawmidi [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/ |
| D | pxa-usb.txt | 6 - compatible: Should be "marvell,pxa-ohci" for USB controllers 10 - "marvell,enable-port1", "marvell,enable-port2", "marvell,enable-port3" 11 If present, enables the appropriate USB port of the controller. 12 - "marvell,port-mode" selects the mode of the ports: 16 - "marvell,power-sense-low" - power sense pin is low-active. 17 - "marvell,power-control-low" - power control pin is low-active. 18 - "marvell,no-oc-protection" - disable over-current protection. 19 - "marvell,oc-mode-perport" - enable per-port over-current protection. 20 - "marvell,power_on_delay" Power On to Power Good time - in ms. 25 compatible = "marvell,pxa-ohci", "usb-ohci"; [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/ |
| D | pxa-usb.txt | 6 - compatible: Should be "marvell,pxa-ohci" for USB controllers 10 - "marvell,enable-port1", "marvell,enable-port2", "marvell,enable-port3" 11 If present, enables the appropriate USB port of the controller. 12 - "marvell,port-mode" selects the mode of the ports: 16 - "marvell,power-sense-low" - power sense pin is low-active. 17 - "marvell,power-control-low" - power control pin is low-active. 18 - "marvell,no-oc-protection" - disable over-current protection. 19 - "marvell,oc-mode-perport" - enable per-port over-current protection. 20 - "marvell,power_on_delay" Power On to Power Good time - in ms. 25 compatible = "marvell,pxa-ohci"; [all …]
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| D | mediatek,mtu3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Chunfeng Yun <chunfeng.yun@mediatek.com> 14 - $ref: usb-drd.yaml 17 The DRD controller has a glue layer IPPC (IP Port Control), and its host is 23 - enum: 24 - mediatek,mt2712-mtu3 25 - mediatek,mt8173-mtu3 26 - mediatek,mt8183-mtu3 [all …]
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| D | fsl,imx8mp-dwc3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/fsl,imx8mp-dwc3.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Li Jun <jun.li@nxp.com> 15 const: fsl,imx8mp-dwc3 19 - description: Address and length of the register set for HSIO Block Control 20 - description: Address and length of the register set for the wrapper of dwc3 core on the SOC. 22 "#address-cells": 25 "#size-cells": [all …]
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| /kernel/linux/linux-5.10/Documentation/driver-api/usb/ |
| D | power-management.rst | 1 .. _usb-power-management: 3 Power Management for USB 7 :Date: Last-updated: February 2014 11 --------- 12 * What is Power Management? 17 * Changing the default idle-delay time 19 * The driver interface for Power Management 25 * USB Port Power Control 26 * User Interface for Port Power Control 27 * Suggested Userspace Port Power Policy [all …]
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| /kernel/linux/linux-6.6/Documentation/driver-api/usb/ |
| D | power-management.rst | 1 .. _usb-power-management: 3 Power Management for USB 7 :Date: Last-updated: February 2014 11 --------- 12 * What is Power Management? 17 * Changing the default idle-delay time 19 * The driver interface for Power Management 25 * USB Port Power Control 26 * User Interface for Port Power Control 27 * Suggested Userspace Port Power Policy [all …]
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| /kernel/linux/linux-5.10/Documentation/sound/ |
| D | alsa-configuration.rst | 2 Advanced Linux Sound Architecture - Driver Configuration guide 38 ---------- 47 limiting card index for auto-loading (1-8); 49 For auto-loading more than one card, specify this option 50 together with snd-card-X aliases. 57 (0 = disable debug prints, 1 = normal debug messages, 63 Module snd-pcm-oss 64 ------------------ 86 regarding opening the device. When this option is non-zero, 90 Module snd-rawmidi [all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/marvell/ |
| D | sky2.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 30 /* Yukon-2 */ 32 PCI_Y2_PIG_ENA = 1<<31, /* Enable Plug-in-Go (YUKON-2) */ 33 PCI_Y2_DLL_DIS = 1<<30, /* Disable PCI DLL (YUKON-2) */ 34 PCI_SW_PWR_ON_RST= 1<<30, /* SW Power on Reset (Yukon-EX) */ 35 PCI_Y2_PHY2_COMA = 1<<29, /* Set PHY 2 to Coma Mode (YUKON-2) */ 36 PCI_Y2_PHY1_COMA = 1<<28, /* Set PHY 1 to Coma Mode (YUKON-2) */ 37 PCI_Y2_PHY2_POWD = 1<<27, /* Set PHY 2 to Power Down (YUKON-2) */ 38 PCI_Y2_PHY1_POWD = 1<<26, /* Set PHY 1 to Power Down (YUKON-2) */ 39 PCI_Y2_PME_LEGACY= 1<<15, /* PCI Express legacy power management mode */ [all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/marvell/ |
| D | sky2.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 30 /* Yukon-2 */ 32 PCI_Y2_PIG_ENA = 1<<31, /* Enable Plug-in-Go (YUKON-2) */ 33 PCI_Y2_DLL_DIS = 1<<30, /* Disable PCI DLL (YUKON-2) */ 34 PCI_SW_PWR_ON_RST= 1<<30, /* SW Power on Reset (Yukon-EX) */ 35 PCI_Y2_PHY2_COMA = 1<<29, /* Set PHY 2 to Coma Mode (YUKON-2) */ 36 PCI_Y2_PHY1_COMA = 1<<28, /* Set PHY 1 to Coma Mode (YUKON-2) */ 37 PCI_Y2_PHY2_POWD = 1<<27, /* Set PHY 2 to Power Down (YUKON-2) */ 38 PCI_Y2_PHY1_POWD = 1<<26, /* Set PHY 1 to Power Down (YUKON-2) */ 39 PCI_Y2_PME_LEGACY= 1<<15, /* PCI Express legacy power management mode */ [all …]
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| /kernel/linux/linux-5.10/drivers/bus/ |
| D | arm-cci.c | 17 #include <linux/arm-cci.h> 49 {.compatible = "arm,cci-400", .data = CCI400_PORTS_DATA }, 52 { .compatible = "arm,cci-500", }, 53 { .compatible = "arm,cci-550", }, 59 OF_DEV_AUXDATA("arm,cci-400-pmu", 0, NULL, &cci_ctrl_base), 60 OF_DEV_AUXDATA("arm,cci-400-pmu,r0", 0, NULL, &cci_ctrl_base), 61 OF_DEV_AUXDATA("arm,cci-400-pmu,r1", 0, NULL, &cci_ctrl_base), 62 OF_DEV_AUXDATA("arm,cci-500-pmu,r0", 0, NULL, &cci_ctrl_base), 63 OF_DEV_AUXDATA("arm,cci-550-pmu,r0", 0, NULL, &cci_ctrl_base), 67 #define DRIVER_NAME "ARM-CCI" [all …]
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| /kernel/linux/linux-6.6/drivers/bus/ |
| D | arm-cci.c | 17 #include <linux/arm-cci.h> 49 {.compatible = "arm,cci-400", .data = CCI400_PORTS_DATA }, 52 { .compatible = "arm,cci-500", }, 53 { .compatible = "arm,cci-550", }, 59 OF_DEV_AUXDATA("arm,cci-400-pmu", 0, NULL, &cci_ctrl_base), 60 OF_DEV_AUXDATA("arm,cci-400-pmu,r0", 0, NULL, &cci_ctrl_base), 61 OF_DEV_AUXDATA("arm,cci-400-pmu,r1", 0, NULL, &cci_ctrl_base), 62 OF_DEV_AUXDATA("arm,cci-500-pmu,r0", 0, NULL, &cci_ctrl_base), 63 OF_DEV_AUXDATA("arm,cci-550-pmu,r0", 0, NULL, &cci_ctrl_base), 67 #define DRIVER_NAME "ARM-CCI" [all …]
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| /kernel/linux/linux-5.10/Documentation/admin-guide/ |
| D | kernel-parameters.txt | 2 Advanced Configuration and Power Interface 5 force -- enable ACPI if default was off 6 on -- enable ACPI but allow fallback to DT [arm64] 7 off -- disable ACPI if default was on 8 noirq -- do not use ACPI for IRQ routing 9 strict -- Be less tolerant of platforms that are not 11 rsdt -- prefer RSDT over (default) XSDT 12 copy_dsdt -- copy DSDT to memory 16 See also Documentation/power/runtime_pm.rst, pci=noacpi 26 If set to vendor, prefer vendor-specific driver [all …]
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| /kernel/linux/linux-6.6/drivers/pci/hotplug/ |
| D | pciehp.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 6 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com) 8 * Copyright (C) 2003-2004 Intel Corporation 36 pci_dbg(ctrl->pcie->port, format, ## arg) 38 pci_err(ctrl->pcie->port, format, ## arg) 40 pci_info(ctrl->pcie->port, format, ## arg) 42 pci_warn(ctrl->pcie->port, format, ## arg) 47 * struct controller - PCIe hotplug controller 48 * @pcie: pointer to the controller's PCIe port service device 50 * @inband_presence_disabled: In-Band Presence Detect Disable supported by [all …]
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| /kernel/linux/linux-6.6/drivers/phy/marvell/ |
| D | phy-mvebu-cp110-utmi.c | 1 // SPDX-License-Identifier: GPL-2.0 79 #define PORT_REGS(p) ((p)->priv->regs + (p)->id * 0x1000) 82 * struct mvebu_cp110_utmi - PHY driver data 97 * struct mvebu_cp110_utmi_port - PHY port data 100 * @id: PHY port ID 109 static void mvebu_cp110_utmi_port_setup(struct mvebu_cp110_utmi_port *port) in mvebu_cp110_utmi_port_setup() argument 121 reg = readl(PORT_REGS(port) + UTMI_PLL_CTRL_REG); in mvebu_cp110_utmi_port_setup() 125 writel(reg, PORT_REGS(port) + UTMI_PLL_CTRL_REG); in mvebu_cp110_utmi_port_setup() 128 reg = readl(PORT_REGS(port) + UTMI_CAL_CTRL_REG); in mvebu_cp110_utmi_port_setup() 131 writel(reg, PORT_REGS(port) + UTMI_CAL_CTRL_REG); in mvebu_cp110_utmi_port_setup() [all …]
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| /kernel/linux/linux-6.6/Documentation/admin-guide/ |
| D | kernel-parameters.txt | 2 Advanced Configuration and Power Interface 5 force -- enable ACPI if default was off 6 on -- enable ACPI but allow fallback to DT [arm64,riscv64] 7 off -- disable ACPI if default was on 8 noirq -- do not use ACPI for IRQ routing 9 strict -- Be less tolerant of platforms that are not 11 rsdt -- prefer RSDT over (default) XSDT 12 copy_dsdt -- copy DSDT to memory 16 See also Documentation/power/runtime_pm.rst, pci=noacpi 26 If set to vendor, prefer vendor-specific driver [all …]
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| /kernel/linux/linux-5.10/drivers/pci/hotplug/ |
| D | pciehp.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 6 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com) 8 * Copyright (C) 2003-2004 Intel Corporation 36 pci_dbg(ctrl->pcie->port, format, ## arg) 38 pci_err(ctrl->pcie->port, format, ## arg) 40 pci_info(ctrl->pcie->port, format, ## arg) 42 pci_warn(ctrl->pcie->port, format, ## arg) 47 * struct controller - PCIe hotplug controller 48 * @pcie: pointer to the controller's PCIe port service device 50 * @slot_ctrl: cached copy of the Slot Control register [all …]
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| /kernel/linux/linux-6.6/include/uapi/linux/ |
| D | pci_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 5 * Copyright 1997--1999 Martin Mares <mj@ucw.cz> 25 * Conventional PCI and PCI-X Mode 1 devices have 256 bytes of 26 * configuration space. PCI-X Mode 2 and PCIe devices have 4096 bytes of 50 #define PCI_COMMAND_FAST_BACK 0x200 /* Enable back-to-back writes */ 51 #define PCI_COMMAND_INTX_DISABLE 0x400 /* INTx Emulation Disable */ 59 #define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */ 123 /* 0x35-0x3b are reserved */ 129 /* Header type 1 (PCI-to-PCI bridges) */ 157 /* 0x35-0x3b is reserved */ [all …]
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| /kernel/linux/linux-6.6/drivers/usb/dwc3/ |
| D | dwc3-octeon.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2010-2017 Cavium Networks 21 * USB Control Register 24 /* BIST fast-clear mode select. A BIST run with this bit set 39 /* 1 = Spread-spectrum clock enable, 0 = SS clock disable */ 41 /* Spread-spectrum clock modulation range: 42 * 0x0 = -4980 ppm downspread 43 * 0x1 = -4492 ppm downspread 44 * 0x2 = -4003 ppm downspread 45 * 0x3 - 0x7 = Reserved [all …]
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