| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/dma/ |
| D | intel,ldma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/intel,ldma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Lightning Mountain centralized DMA controllers.
10 - chuanhua.lei@intel.com
11 - mallikarjunax.reddy@intel.com
14 - $ref: dma-controller.yaml#
19 - intel,lgm-cdma
20 - intel,lgm-dma2tx
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/freescale/dpaa2/ |
| D | dpni.h | 1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2013-2016 Freescale Semiconductor Inc.
32 #define DPNI_ALL_TCS (u8)(-1)
36 #define DPNI_ALL_TC_FLOWS (u16)(-1)
40 #define DPNI_NEW_FLOW_ID (u16)(-1)
56 * Allocate policers for this DPNI. They can be used to rate-limit traffic per
69 * Enables TCAM for Flow Steering and QoS look-ups. If not specified, all
70 * look-ups are exact match. Note that TCAM is not available on LS1088 and its
93 * struct dpni_pools_cfg - Structure representing buffer pools configuration
126 int *en);
[all …]
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/freescale/dpaa2/ |
| D | dpni.h | 1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2013-2016 Freescale Semiconductor Inc.
20 * DPNI_MAX_TC - Maximum number of traffic classes
24 * DPNI_MAX_DPBP - Maximum number of buffer pools per DPNI
29 * DPNI_ALL_TCS - All traffic classes considered; see dpni_set_queue()
31 #define DPNI_ALL_TCS (u8)(-1)
33 * DPNI_ALL_TC_FLOWS - All flows within traffic class considered; see
36 #define DPNI_ALL_TC_FLOWS (u16)(-1)
38 * DPNI_NEW_FLOW_ID - Generate new flow ID; see dpni_set_queue()
40 #define DPNI_NEW_FLOW_ID (u16)(-1)
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/cadence/ |
| D | macb.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2004-2006 Atmel Corporation
82 #define GEM_DMACFG 0x0010 /* DMA Configuration */
106 #define GEM_TX64CNT 0x0118 /* 64 byte Frames TX counter */
107 #define GEM_TX65CNT 0x011c /* 65-127 byte Frames TX counter */
108 #define GEM_TX128CNT 0x0120 /* 128-255 byte Frames TX counter */
109 #define GEM_TX256CNT 0x0124 /* 256-511 byte Frames TX counter */
110 #define GEM_TX512CNT 0x0128 /* 512-1023 byte Frames TX counter */
111 #define GEM_TX1024CNT 0x012c /* 1024-1518 byte Frames TX counter */
112 #define GEM_TX1519CNT 0x0130 /* 1519+ byte Frames TX counter */
[all …]
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/cadence/ |
| D | macb.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2004-2006 Atmel Corporation
84 #define GEM_DMACFG 0x0010 /* DMA Configuration */
112 #define GEM_TX64CNT 0x0118 /* 64 byte Frames TX counter */
113 #define GEM_TX65CNT 0x011c /* 65-127 byte Frames TX counter */
114 #define GEM_TX128CNT 0x0120 /* 128-255 byte Frames TX counter */
115 #define GEM_TX256CNT 0x0124 /* 256-511 byte Frames TX counter */
116 #define GEM_TX512CNT 0x0128 /* 512-1023 byte Frames TX counter */
117 #define GEM_TX1024CNT 0x012c /* 1024-1518 byte Frames TX counter */
118 #define GEM_TX1519CNT 0x0130 /* 1519+ byte Frames TX counter */
[all …]
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/broadcom/asp2/ |
| D | bcmasp.c | 1 // SPDX-License-Identifier: GPL-2.0
25 priv->irq_mask &= ~mask; in _intr2_mask_clear()
31 priv->irq_mask |= mask; in _intr2_mask_set()
34 void bcmasp_enable_tx_irq(struct bcmasp_intf *intf, int en) in bcmasp_enable_tx_irq() argument
36 struct bcmasp_priv *priv = intf->parent; in bcmasp_enable_tx_irq()
38 if (en) in bcmasp_enable_tx_irq()
39 _intr2_mask_clear(priv, ASP_INTR2_TX_DESC(intf->channel)); in bcmasp_enable_tx_irq()
41 _intr2_mask_set(priv, ASP_INTR2_TX_DESC(intf->channel)); in bcmasp_enable_tx_irq()
45 void bcmasp_enable_rx_irq(struct bcmasp_intf *intf, int en) in bcmasp_enable_rx_irq() argument
47 struct bcmasp_priv *priv = intf->parent; in bcmasp_enable_rx_irq()
[all …]
|
| /kernel/linux/linux-6.6/drivers/scsi/arm/ |
| D | fas216.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1997-2000 Russell King
95 #define IS_MSGBYTESENT 0x01 /* One byte message sent*/
116 #define CNTL1_PERE (1 << 4) /* Parity enable reporting en. */
123 #define CLKF_F37MHZ 0x00 /* 35.01 - 40 MHz */
125 #define CLKF_F12MHZ 0x03 /* 10.01 - 15 MHz */
126 #define CLKF_F17MHZ 0x04 /* 15.01 - 20 MHz */
127 #define CLKF_F22MHZ 0x05 /* 20.01 - 25 MHz */
128 #define CLKF_F27MHZ 0x06 /* 25.01 - 30 MHz */
129 #define CLKF_F32MHZ 0x07 /* 30.01 - 35 MHz */
[all …]
|
| /kernel/linux/linux-5.10/drivers/scsi/arm/ |
| D | fas216.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1997-2000 Russell King
95 #define IS_MSGBYTESENT 0x01 /* One byte message sent*/
116 #define CNTL1_PERE (1 << 4) /* Parity enable reporting en. */
123 #define CLKF_F37MHZ 0x00 /* 35.01 - 40 MHz */
125 #define CLKF_F12MHZ 0x03 /* 10.01 - 15 MHz */
126 #define CLKF_F17MHZ 0x04 /* 15.01 - 20 MHz */
127 #define CLKF_F22MHZ 0x05 /* 20.01 - 25 MHz */
128 #define CLKF_F27MHZ 0x06 /* 25.01 - 30 MHz */
129 #define CLKF_F32MHZ 0x07 /* 30.01 - 35 MHz */
[all …]
|
| /kernel/linux/linux-5.10/arch/mips/cavium-octeon/ |
| D | octeon-platform.c | 6 * Copyright (C) 2004-2017 Cavium, Inc.
16 #include <asm/octeon/cvmx-helper-board.h>
22 #include <asm/octeon/cvmx-uctlx-defs.h>
76 if (dev->of_node) { in octeon2_usb_clocks_start()
80 uctl_node = of_get_parent(dev->of_node); in octeon2_usb_clocks_start()
86 "refclk-frequency", &clock_rate); in octeon2_usb_clocks_start()
88 dev_err(dev, "No UCTL \"refclk-frequency\"\n"); in octeon2_usb_clocks_start()
93 "refclk-type", &clock_type); in octeon2_usb_clocks_start()
103 * Step 2: Enable SCLK of UCTL by writing UCTL0_IF_ENA[EN] = 1 in octeon2_usb_clocks_start()
106 if_ena.s.en = 1; in octeon2_usb_clocks_start()
[all …]
|
| /kernel/linux/linux-6.6/arch/mips/cavium-octeon/ |
| D | octeon-platform.c | 6 * Copyright (C) 2004-2017 Cavium, Inc.
18 #include <asm/octeon/cvmx-helper-board.h>
24 #include <asm/octeon/cvmx-uctlx-defs.h>
78 if (dev->of_node) { in octeon2_usb_clocks_start()
82 uctl_node = of_get_parent(dev->of_node); in octeon2_usb_clocks_start()
88 "refclk-frequency", &clock_rate); in octeon2_usb_clocks_start()
90 dev_err(dev, "No UCTL \"refclk-frequency\"\n"); in octeon2_usb_clocks_start()
95 "refclk-type", &clock_type); in octeon2_usb_clocks_start()
105 * Step 2: Enable SCLK of UCTL by writing UCTL0_IF_ENA[EN] = 1 in octeon2_usb_clocks_start()
108 if_ena.s.en = 1; in octeon2_usb_clocks_start()
[all …]
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/mellanox/mlx5/core/en/ |
| D | txrx.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
7 #include "en.h"
12 #define INL_HDR_START_SZ (sizeof(((struct mlx5_wqe_eth_seg *)NULL)->inline_hdr.start))
15 * 1. ESP trailer: up to 255 bytes of padding, 1 byte for pad length, 1 byte for
25 #define MLX5E_MAX_TX_INLINE_DS DIV_ROUND_UP(366 - INL_HDR_START_SZ + VLAN_HLEN, \
58 return skb->pkt_type == PACKET_MULTICAST || skb->pkt_type == PACKET_BROADCAST; in mlx5e_skb_is_multicast()
76 return config->rx_filter == HWTSTAMP_FILTER_ALL; in mlx5e_rx_hw_stamp()
100 return (u16)(*fifo->pc - *fifo->cc) <= fifo->mask; in mlx5e_skb_fifo_has_room()
106 return (mlx5_wq_cyc_ctr2ix(wq, cc - pc) >= n) || (cc == pc); in mlx5e_wqc_has_room_for()
120 ((struct mlx5e_tx_wqe *)mlx5e_fetch_wqe(&(sq)->wq, pi, sizeof(struct mlx5e_tx_wqe)))
[all …]
|
| /kernel/linux/linux-6.6/include/uapi/linux/ |
| D | hdreg.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
17 #define IDE_DRIVE_TASK_INVALID -1
137 * 0x01->0x02 Reserved
141 * 0x04->0x07 Reserved
146 * 0x09->0x0F Reserved
151 * 0x10->0x1F Reserved
153 #define WIN_READ 0x20 /* 28-Bit */
154 #define WIN_READ_ONCE 0x21 /* 28-Bit without retries */
155 #define WIN_READ_LONG 0x22 /* 28-Bit */
156 #define WIN_READ_LONG_ONCE 0x23 /* 28-Bit without retries */
[all …]
|
| /kernel/linux/linux-5.10/include/uapi/linux/ |
| D | hdreg.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
17 #define IDE_DRIVE_TASK_INVALID -1
137 * 0x01->0x02 Reserved
141 * 0x04->0x07 Reserved
146 * 0x09->0x0F Reserved
151 * 0x10->0x1F Reserved
153 #define WIN_READ 0x20 /* 28-Bit */
154 #define WIN_READ_ONCE 0x21 /* 28-Bit without retries */
155 #define WIN_READ_LONG 0x22 /* 28-Bit */
156 #define WIN_READ_LONG_ONCE 0x23 /* 28-Bit without retries */
[all …]
|
| /kernel/linux/linux-5.10/arch/m68k/include/asm/ |
| D | amigahw.h | 2 ** asm-m68k/amigahw.h -- This header defines some macros and pointers for
21 #include <asm/bootinfo-amiga.h>
207 * DMA register bits
244 #define ZTWO_PADDR(x) (((unsigned long)(x))-zTwoBase)
270 amiga_custom.beamcon0 = 0x4390; /* HARDDIS, VAR{BEAM,VSY,HSY,CSY}EN */ in amifb_video_off()
292 unsigned int :28, cntrl1:4; /* control-byte 1 */
293 unsigned int :28, cntrl2:4; /* control-byte 2 */
294 unsigned int :28, cntrl3:4; /* control-byte 3 */
314 unsigned int :28, cntrl1:4; /* control-byte 1 */
315 unsigned int :28, cntrl2:4; /* control-byte 2 */
[all …]
|
| /kernel/linux/linux-6.6/arch/m68k/include/asm/ |
| D | amigahw.h | 2 ** asm-m68k/amigahw.h -- This header defines some macros and pointers for
21 #include <asm/bootinfo-amiga.h>
207 * DMA register bits
244 #define ZTWO_PADDR(x) (((unsigned long)(x))-zTwoBase)
270 amiga_custom.beamcon0 = 0x4390; /* HARDDIS, VAR{BEAM,VSY,HSY,CSY}EN */ in amifb_video_off()
292 unsigned int :28, cntrl1:4; /* control-byte 1 */
293 unsigned int :28, cntrl2:4; /* control-byte 2 */
294 unsigned int :28, cntrl3:4; /* control-byte 3 */
314 unsigned int :28, cntrl1:4; /* control-byte 1 */
315 unsigned int :28, cntrl2:4; /* control-byte 2 */
[all …]
|
| /kernel/linux/linux-6.6/drivers/spi/ |
| D | spi-ep93xx.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010-2011 Mika Westerberg
7 * Explicit FIFO handling code was inspired by amba-pl022 driver.
9 * Chip select support using other than built-in GPIOs by H. Hartley Sweeten.
13 * https://www.cirrus.com/en/pubs/manual/EP93xx_Users_Guide_UM1.pdf
30 #include <linux/platform_data/dma-ep93xx.h>
31 #include <linux/platform_data/spi-ep93xx.h>
69 * struct ep93xx_spi - EP93xx SPI controller structure
73 * @tx: current byte in transfer to transmit
74 * @rx: current byte in transfer to receive
[all …]
|
| /kernel/linux/linux-5.10/drivers/ata/ |
| D | pata_octeon_cf.c | 8 * Copyright (C) 2005 - 2012 Cavium Inc.
30 * -- 8 bits no irq, no DMA
31 * -- 16 bits no irq, no DMA
32 * -- 16 bits True IDE mode with DMA, but no irq.
34 * In the last case the DMA engine can generate an interrupt when the
68 "Enable use of DMA on interfaces that support it (0=no dma [default], 1=use dma)");
115 reg_cfg.s.en = 1; /* Enable this region */ in octeon_cf_set_boot_reg_cfg()
131 struct octeon_cf_port *cf_port = ap->private_data; in octeon_cf_set_piomode()
153 BUG_ON(ata_timing_compute(dev, dev->pio_mode, &timing, T, T)); in octeon_cf_set_piomode()
157 t2--; in octeon_cf_set_piomode()
[all …]
|
| /kernel/linux/linux-6.6/drivers/ata/ |
| D | pata_octeon_cf.c | 8 * Copyright (C) 2005 - 2012 Cavium Inc.
31 * -- 8 bits no irq, no DMA
32 * -- 16 bits no irq, no DMA
33 * -- 16 bits True IDE mode with DMA, but no irq.
35 * In the last case the DMA engine can generate an interrupt when the
69 "Enable use of DMA on interfaces that support it (0=no dma [default], 1=use dma)");
112 reg_cfg.s.en = 1; /* Enable this region */ in octeon_cf_set_boot_reg_cfg()
128 struct octeon_cf_port *cf_port = ap->private_data; in octeon_cf_set_piomode()
150 BUG_ON(ata_timing_compute(dev, dev->pio_mode, &timing, T, T)); in octeon_cf_set_piomode()
154 t2--; in octeon_cf_set_piomode()
[all …]
|
| /kernel/linux/linux-5.10/drivers/iio/imu/inv_mpu6050/ |
| D | inv_mpu_iio.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
10 #include <linux/i2c-mux.h>
23 * struct inv_mpu6050_reg_map - Notable registers.
31 * @fifo_count_h: Upper byte of FIFO count.
93 * struct inv_mpu6050_chip_config - Cached chip configuration data.
106 * @divider: chip sample rate divider (sample rate divider - 1)
128 * remains 8 byte aligned
133 * struct inv_mpu6050_hw - Other important hardware information.
134 * @whoami: Self identification byte from WHO_AM_I register
154 * struct inv_mpu6050_state - Driver state variables.
[all …]
|
| /kernel/linux/linux-6.6/Documentation/arch/x86/ |
| D | tdx.rst | 1 .. SPDX-License-Identifier: GPL-2.0
19 TDX includes new hypercall-like mechanisms for communicating from the
25 TDX guests behave differently from bare-metal and traditional VMX guests.
32 Instruction-based #VE
33 ---------------------
35 - Port I/O (INS, OUTS, IN, OUT)
36 - HLT
37 - MONITOR, MWAIT
38 - WBINVD, INVD
39 - VMCALL
[all …]
|
| /kernel/linux/linux-6.6/sound/soc/fsl/ |
| D | fsl_ssi.c | 1 // SPDX-License-Identifier: GPL-2.0
7 // Copyright 2007-2010 Freescale Semiconductor, Inc.
9 // Some notes why imx-pcm-fiq is used instead of DMA on some boards:
16 // we receive in our (PCM-) data stream. The only chance we have is to
43 #include <linux/dma/imx-dma.h>
53 #include "imx-pcm.h"
55 /* Define RX and TX to index ssi->regvals array; Can be 0 or 1 only */
62 * The SSI has a limitation in that the samples must be in the same byte
66 * (bit-endianness must match byte-endianness). Processors typically write
67 * the bits within a byte in the same order that the bytes of a word are
[all …]
|
| /kernel/linux/linux-5.10/sound/soc/fsl/ |
| D | fsl_ssi.c | 1 // SPDX-License-Identifier: GPL-2.0
7 // Copyright 2007-2010 Freescale Semiconductor, Inc.
9 // Some notes why imx-pcm-fiq is used instead of DMA on some boards:
16 // we receive in our (PCM-) data stream. The only chance we have is to
52 #include "imx-pcm.h"
54 /* Define RX and TX to index ssi->regvals array; Can be 0 or 1 only */
61 * The SSI has a limitation in that the samples must be in the same byte
65 * (bit-endianness must match byte-endianness). Processors typically write
66 * the bits within a byte in the same order that the bytes of a word are
67 * written in. So if the host CPU is big-endian, then only big-endian
[all …]
|
| /kernel/linux/linux-6.6/drivers/mmc/host/ |
| D | sdhci.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/drivers/mmc/host/sdhci.h - Secure Digital Host Controller Interface driver
7 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
31 #define SDHCI_MAKE_BLKSZ(dma, blksz) (((dma & 0x7) << 12) | (blksz & 0xFFF)) argument
103 * VDD2 - UHS2 or PCIe/NVMe
174 #define SDHCI_INT_ALL_MASK ((unsigned int)-1)
196 #define SDHCI_CTRL_HS400 0x0005 /* Non-standard */
243 #define SDHCI_SUPPORT_HS400 0x80000000 /* Non-standard */
252 /* 4C-4F reserved for more max current */
259 /* 55-57 reserved */
[all …]
|
| /kernel/linux/linux-5.10/drivers/mmc/host/ |
| D | sdhci.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/drivers/mmc/host/sdhci.h - Secure Digital Host Controller Interface driver
7 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
31 #define SDHCI_MAKE_BLKSZ(dma, blksz) (((dma & 0x7) << 12) | (blksz & 0xFFF)) argument
166 #define SDHCI_INT_ALL_MASK ((unsigned int)-1)
188 #define SDHCI_CTRL_HS400 0x0005 /* Non-standard */
233 #define SDHCI_SUPPORT_HS400 0x80000000 /* Non-standard */
242 /* 4C-4F reserved for more max current */
249 /* 55-57 reserved */
254 /* 60-FB reserved */
[all …]
|
| /kernel/linux/linux-5.10/drivers/spi/ |
| D | spi-ep93xx.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010-2011 Mika Westerberg
7 * Explicit FIFO handling code was inspired by amba-pl022 driver.
9 * Chip select support using other than built-in GPIOs by H. Hartley Sweeten.
13 * https://www.cirrus.com/en/pubs/manual/EP93xx_Users_Guide_UM1.pdf
30 #include <linux/platform_data/dma-ep93xx.h>
31 #include <linux/platform_data/spi-ep93xx.h>
69 * struct ep93xx_spi - EP93xx SPI controller structure
73 * @tx: current byte in transfer to transmit
74 * @rx: current byte in transfer to receive
[all …]
|