| /kernel/linux/linux-5.10/include/dt-bindings/dma/ |
| D | dw-dmac.h | 1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ 7 * Protection Control bits provide protection against illegal transactions. 8 * The protection bits[0:2] are one-to-one mapped to AHB HPROT[3:1] signals. 11 #define DW_DMAC_HPROT2_BUFFERABLE (1 << 1) /* DMA is bufferable */ 12 #define DW_DMAC_HPROT3_CACHEABLE (1 << 2) /* DMA is cacheable */
|
| /kernel/linux/linux-6.6/include/dt-bindings/dma/ |
| D | dw-dmac.h | 1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ 7 * Protection Control bits provide protection against illegal transactions. 8 * The protection bits[0:2] are one-to-one mapped to AHB HPROT[3:1] signals. 11 #define DW_DMAC_HPROT2_BUFFERABLE (1 << 1) /* DMA is bufferable */ 12 #define DW_DMAC_HPROT3_CACHEABLE (1 << 2) /* DMA is cacheable */
|
| /kernel/linux/linux-5.10/Documentation/x86/ |
| D | intel_txt.rst | 6 Technology (Intel(R) TXT), defines platform-level enhancements that 13 - Provides dynamic root of trust for measurement (DRTM) 14 - Data protection in case of improper shutdown 15 - Measurement and verification of launched environment 18 non-vPro systems. It is currently available on desktop systems 30 - LinuxTAG 2008: 31 http://www.linuxtag.org/2008/en/conf/events/vp-donnerstag.html 33 - TRUST2008: 34 http://www.trust-conference.eu/downloads/Keynote-Speakers/ 35 3_David-Grawrock_The-Front-Door-of-Trusted-Computing.pdf [all …]
|
| /kernel/linux/linux-6.6/Documentation/arch/x86/ |
| D | intel_txt.rst | 6 Technology (Intel(R) TXT), defines platform-level enhancements that 13 - Provides dynamic root of trust for measurement (DRTM) 14 - Data protection in case of improper shutdown 15 - Measurement and verification of launched environment 18 non-vPro systems. It is currently available on desktop systems 30 - LinuxTAG 2008: 31 http://www.linuxtag.org/2008/en/conf/events/vp-donnerstag.html 33 - TRUST2008: 34 http://www.trust-conference.eu/downloads/Keynote-Speakers/ 35 3_David-Grawrock_The-Front-Door-of-Trusted-Computing.pdf [all …]
|
| /kernel/linux/linux-5.10/include/media/drv-intf/ |
| D | saa7146.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 5 #include <linux/delay.h> /* for delay-stuff */ 7 #include <linux/pci.h> /* for pci-config-stuff, vendor ids etc. */ 16 #include <media/v4l2-device.h> 17 #include <media/v4l2-ctrls.h> 22 #define saa7146_write(sxy,adr,dat) writel((dat),(sxy->mem+(adr))) 23 #define saa7146_read(sxy,adr) readl(sxy->mem+(adr)) 67 dma_addr_t dma; member 107 u32 irq_mask; /* mask to indicate, which irq-events are handled by the extension */ 129 u32 revision; /* chip revision; needed for bug-workarounds*/ [all …]
|
| /kernel/linux/linux-6.6/include/media/drv-intf/ |
| D | saa7146.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 5 #include <linux/delay.h> /* for delay-stuff */ 7 #include <linux/pci.h> /* for pci-config-stuff, vendor ids etc. */ 16 #include <media/v4l2-device.h> 17 #include <media/v4l2-ctrls.h> 22 #define saa7146_write(sxy,adr,dat) writel((dat),(sxy->mem+(adr))) 23 #define saa7146_read(sxy,adr) readl(sxy->mem+(adr)) 67 dma_addr_t dma; member 107 u32 irq_mask; /* mask to indicate, which irq-events are handled by the extension */ 129 u32 revision; /* chip revision; needed for bug-workarounds*/ [all …]
|
| /kernel/linux/linux-6.6/Documentation/ABI/testing/ |
| D | sysfs-kernel-iommu_groups | 5 Description: /sys/kernel/iommu_groups/ contains a number of sub- 7 name of the sub-directory matches the iommu_group_id() 23 output direct-mapped, MSI, non mappable regions. Each 29 USB devices it is now exposed as "direct-relaxable" instead 43 DMA All the DMA transactions from the device in this group 45 DMA-FQ As above, but using batched invalidation to lazily 47 overhead at the cost of reduced memory protection. 48 identity All the DMA transactions from the device in this group 50 but zero protection. 56 - The device in the group is not bound to any device driver. [all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/reserved-memory/ |
| D | shared-dma-pool.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/reserved-memory/shared-dma-pool.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: /reserved-memory DMA pool 10 - devicetree-spec@vger.kernel.org 13 - $ref: reserved-memory.yaml 18 - const: shared-dma-pool 21 pool of DMA buffers for a set of devices. It can be used by an 25 - const: restricted-dma-pool [all …]
|
| /kernel/linux/linux-6.6/Documentation/admin-guide/sysctl/ |
| D | vm.rst | 13 ------------------------------------------------------------------------------ 27 - admin_reserve_kbytes 28 - compact_memory 29 - compaction_proactiveness 30 - compact_unevictable_allowed 31 - dirty_background_bytes 32 - dirty_background_ratio 33 - dirty_bytes 34 - dirty_expire_centisecs 35 - dirty_ratio [all …]
|
| /kernel/linux/linux-5.10/Documentation/admin-guide/sysctl/ |
| D | vm.rst | 13 ------------------------------------------------------------------------------ 27 - admin_reserve_kbytes 28 - compact_memory 29 - compaction_proactiveness 30 - compact_unevictable_allowed 31 - dirty_background_bytes 32 - dirty_background_ratio 33 - dirty_bytes 34 - dirty_expire_centisecs 35 - dirty_ratio [all …]
|
| /kernel/linux/linux-6.6/arch/m68k/include/asm/ |
| D | m5407sim.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 5 * m5407sim.h -- ColdFire 5407 System Integration Module support. 28 #define MCFSIM_SYPCR (MCF_MBAR + 0x01) /* System Protection */ 53 #define MCFSIM_CSCR0 (MCF_MBAR + 0x8a) /* CS 0 Control reg */ 56 #define MCFSIM_CSCR1 (MCF_MBAR + 0x96) /* CS 1 Control reg */ 60 #define MCFSIM_CSCR2 (MCF_MBAR + 0xa2) /* CS 2 Control reg */ 63 #define MCFSIM_CSCR3 (MCF_MBAR + 0xae) /* CS 3 Control reg */ 66 #define MCFSIM_CSCR4 (MCF_MBAR + 0xba) /* CS 4 Control reg */ 69 #define MCFSIM_CSCR5 (MCF_MBAR + 0xc6) /* CS 5 Control reg */ 72 #define MCFSIM_CSCR6 (MCF_MBAR + 0xd2) /* CS 6 Control reg */ [all …]
|
| D | m5307sim.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 5 * m5307sim.h -- ColdFire 5307 System Integration Module support. 28 #define MCFSIM_SYPCR (MCF_MBAR + 0x01) /* System Protection */ 53 #define MCFSIM_CSCR0 (MCF_MBAR + 0x8a) /* CS 0 Control reg */ 56 #define MCFSIM_CSCR1 (MCF_MBAR + 0x96) /* CS 1 Control reg */ 62 #define MCFSIM_CSCR2 (MCF_MBAR + 0xa2) /* CS 2 Control reg */ 64 #define MCFSIM_CSCR3 (MCF_MBAR + 0xae) /* CS 3 Control reg */ 66 #define MCFSIM_CSCR4 (MCF_MBAR + 0xba) /* CS 4 Control reg */ 68 #define MCFSIM_CSCR5 (MCF_MBAR + 0xc6) /* CS 5 Control reg */ 70 #define MCFSIM_CSCR6 (MCF_MBAR + 0xd2) /* CS 6 Control reg */ [all …]
|
| D | m5206sim.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 5 * m5206sim.h -- ColdFire 5206 System Integration Module support. 48 #define MCFSIM_SYPCR (MCF_MBAR + 0x41) /* System Protection */ 57 #define MCFSIM_DCR0 (MCF_MBAR + 0x57) /* DRAM 0 Control reg (r/w) */ 60 #define MCFSIM_DCR1 (MCF_MBAR + 0x63) /* DRAM 1 Control reg (r/w) */ 64 #define MCFSIM_CSCR0 (MCF_MBAR + 0x6e) /* CS 0 Control reg */ 67 #define MCFSIM_CSCR1 (MCF_MBAR + 0x7a) /* CS 1 Control reg */ 70 #define MCFSIM_CSCR2 (MCF_MBAR + 0x86) /* CS 2 Control reg */ 73 #define MCFSIM_CSCR3 (MCF_MBAR + 0x92) /* CS 3 Control reg */ 76 #define MCFSIM_CSCR4 (MCF_MBAR + 0x9e) /* CS 4 Control reg */ [all …]
|
| /kernel/linux/linux-5.10/arch/m68k/include/asm/ |
| D | m5407sim.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 5 * m5407sim.h -- ColdFire 5407 System Integration Module support. 28 #define MCFSIM_SYPCR (MCF_MBAR + 0x01) /* System Protection */ 53 #define MCFSIM_CSCR0 (MCF_MBAR + 0x8a) /* CS 0 Control reg */ 56 #define MCFSIM_CSCR1 (MCF_MBAR + 0x96) /* CS 1 Control reg */ 60 #define MCFSIM_CSCR2 (MCF_MBAR + 0xa2) /* CS 2 Control reg */ 63 #define MCFSIM_CSCR3 (MCF_MBAR + 0xae) /* CS 3 Control reg */ 66 #define MCFSIM_CSCR4 (MCF_MBAR + 0xba) /* CS 4 Control reg */ 69 #define MCFSIM_CSCR5 (MCF_MBAR + 0xc6) /* CS 5 Control reg */ 72 #define MCFSIM_CSCR6 (MCF_MBAR + 0xd2) /* CS 6 Control reg */ [all …]
|
| D | m5307sim.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 5 * m5307sim.h -- ColdFire 5307 System Integration Module support. 28 #define MCFSIM_SYPCR (MCF_MBAR + 0x01) /* System Protection */ 53 #define MCFSIM_CSCR0 (MCF_MBAR + 0x8a) /* CS 0 Control reg */ 56 #define MCFSIM_CSCR1 (MCF_MBAR + 0x96) /* CS 1 Control reg */ 62 #define MCFSIM_CSCR2 (MCF_MBAR + 0xa2) /* CS 2 Control reg */ 64 #define MCFSIM_CSCR3 (MCF_MBAR + 0xae) /* CS 3 Control reg */ 66 #define MCFSIM_CSCR4 (MCF_MBAR + 0xba) /* CS 4 Control reg */ 68 #define MCFSIM_CSCR5 (MCF_MBAR + 0xc6) /* CS 5 Control reg */ 70 #define MCFSIM_CSCR6 (MCF_MBAR + 0xd2) /* CS 6 Control reg */ [all …]
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/altera/ |
| D | altera_tse.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* Altera Triple-Speed Ethernet MAC driver 3 * Copyright (C) 2008-2014 Altera Corporation. All rights reserved 126 u32 control; /* PHY device operation control register */ member 130 u32 auto_negotiation_advertisement; /* Auto-negotiation 178 /* The host processor uses this register to control and configure the 182 /* 32-bit primary MAC address word 0 bits 0 to 31 of the primary 186 /* 32-bit primary MAC address word 1 bits 32 to 47 of the primary 190 /* 14-bit maximum frame length. The MAC receive logic */ 196 /* 12-bit receive FIFO section-empty threshold */ [all …]
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/altera/ |
| D | altera_tse.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* Altera Triple-Speed Ethernet MAC driver 3 * Copyright (C) 2008-2014 Altera Corporation. All rights reserved 116 u32 control; /* PHY device operation control register */ member 120 u32 auto_negotiation_advertisement; /* Auto-negotiation 168 /* The host processor uses this register to control and configure the 172 /* 32-bit primary MAC address word 0 bits 0 to 31 of the primary 176 /* 32-bit primary MAC address word 1 bits 32 to 47 of the primary 180 /* 14-bit maximum frame length. The MAC receive logic */ 186 /* 12-bit receive FIFO section-empty threshold */ [all …]
|
| /kernel/linux/linux-6.6/include/linux/platform_data/ |
| D | dma-dw.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * Driver for the Synopsys DesignWare DMA Controller 6 * Copyright (C) 2010-2011 ST Microelectronics 22 * struct dw_dma_slave - Controller-specific information about a slave 24 * @dma_dev: required DMA master device 43 * struct dw_dma_platform_data - Controller configuration parameters 54 * @protctl: Protection control signals setting per channel.
|
| /kernel/linux/linux-5.10/include/linux/platform_data/ |
| D | dma-dw.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * Driver for the Synopsys DesignWare DMA Controller 6 * Copyright (C) 2010-2011 ST Microelectronics 22 * struct dw_dma_slave - Controller-specific information about a slave 24 * @dma_dev: required DMA master device 43 * struct dw_dma_platform_data - Controller configuration parameters 54 * @protctl: Protection control signals setting per channel.
|
| /kernel/linux/linux-6.6/drivers/dma/dw/ |
| D | of.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Platform driver for the Synopsys DesignWare DMA Controller 5 * Copyright (C) 2007-2008 Atmel Corporation 6 * Copyright (C) 2010-2011 ST Microelectronics 19 struct dw_dma *dw = ofdma->of_dma_data; in dw_dma_of_xlate() 21 .dma_dev = dw->dma.dev, in dw_dma_of_xlate() 25 if (dma_spec->args_count < 3 || dma_spec->args_count > 4) in dw_dma_of_xlate() 28 slave.src_id = dma_spec->args[0]; in dw_dma_of_xlate() 29 slave.dst_id = dma_spec->args[0]; in dw_dma_of_xlate() 30 slave.m_master = dma_spec->args[1]; in dw_dma_of_xlate() [all …]
|
| /kernel/linux/linux-5.10/arch/s390/boot/ |
| D | text_dma.S | 1 /* SPDX-License-Identifier: GPL-2.0 */ 12 .section .dma.text,"ax" 17 * affects a few functions that are not performance-relevant. 33 lhi %r5,-EIO 51 lhi %r2,-1 68 lghi %r5,-EOPNOTSUPP 94 larl %r4,.Lctlregs # Save control registers 96 lg %r2,0(%r4) # Disable lowcore protection 101 larl %r4,.Lfpctl # Floating point control register 123 larl %r4,.Lctlregs # Restore control registers [all …]
|
| /kernel/linux/linux-5.10/drivers/dma/dw/ |
| D | of.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Platform driver for the Synopsys DesignWare DMA Controller 5 * Copyright (C) 2007-2008 Atmel Corporation 6 * Copyright (C) 2010-2011 ST Microelectronics 19 struct dw_dma *dw = ofdma->of_dma_data; in dw_dma_of_xlate() 21 .dma_dev = dw->dma.dev, in dw_dma_of_xlate() 25 if (dma_spec->args_count < 3 || dma_spec->args_count > 4) in dw_dma_of_xlate() 28 slave.src_id = dma_spec->args[0]; in dw_dma_of_xlate() 29 slave.dst_id = dma_spec->args[0]; in dw_dma_of_xlate() 30 slave.m_master = dma_spec->args[1]; in dw_dma_of_xlate() [all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/dma/ |
| D | snps,dma-spear1340.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/dma/snps,dma-spear1340.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Synopsys Designware DMA Controller 10 - Viresh Kumar <vireshk@kernel.org> 11 - Andy Shevchenko <andriy.shevchenko@linux.intel.com> 14 - $ref: dma-controller.yaml# 19 - const: snps,dma-spear1340 20 - items: [all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/ |
| D | snps,dma-spear1340.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/dma/snps,dma-spear1340.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Synopsys Designware DMA Controller 10 - Viresh Kumar <vireshk@kernel.org> 11 - Andy Shevchenko <andriy.shevchenko@linux.intel.com> 14 - $ref: "dma-controller.yaml#" 18 const: snps,dma-spear1340 20 "#dma-cells": [all …]
|
| /kernel/linux/linux-5.10/drivers/crypto/ux500/cryp/ |
| D | cryp.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * Copyright (C) ST-Ericsson SA 2010 4 * Author: Shujuan Chen <shujuan.chen@stericsson.com> for ST-Ericsson. 5 * Author: Jonas Linde <jonas.linde@stericsson.com> for ST-Ericsson. 6 * Author: Joakim Bech <joakim.xx.bech@stericsson.com> for ST-Ericsson. 7 * Author: Berne Hebark <berne.herbark@stericsson.com> for ST-Ericsson. 8 * Author: Niklas Hernaeus <niklas.hernaeus@stericsson.com> for ST-Ericsson. 82 * struct cryp_config - 96 * struct cryp_protection_config - 100 * Protection configuration structure for setting privilage access [all …]
|