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/kernel/linux/linux-6.6/arch/arm/boot/dts/microchip/
Dsam9x60.dtsi178 dmas = <&dma0
182 <&dma0
202 dmas = <&dma0
206 <&dma0
220 dmas = <&dma0
224 <&dma0
248 dmas = <&dma0
252 <&dma0
271 dmas = <&dma0
275 <&dma0
[all …]
Dsama5d2.dtsi268 dma0: dma-controller@f0010000 { label
324 dmas = <&dma0
336 dmas = <&dma0
339 <&dma0
351 dmas = <&dma0
354 <&dma0
370 dmas = <&dma0
373 <&dma0
433 dmas = <&dma0
447 dmas = <&dma0
[all …]
Dlan966x.dtsi178 dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>,
179 <&dma0 AT91_XDMAC_DT_PERID(2)>;
191 dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>,
192 <&dma0 AT91_XDMAC_DT_PERID(2)>;
206 dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>,
207 <&dma0 AT91_XDMAC_DT_PERID(2)>;
229 dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>,
230 <&dma0 AT91_XDMAC_DT_PERID(4)>;
242 dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>,
243 <&dma0 AT91_XDMAC_DT_PERID(4)>;
[all …]
Dsama7g5.dtsi340 dmas = <&dma0 AT91_XDMAC_DT_PERID(41)>,
341 <&dma0 AT91_XDMAC_DT_PERID(40)>;
355 dmas = <&dma0 AT91_XDMAC_DT_PERID(43)>,
356 <&dma0 AT91_XDMAC_DT_PERID(42)>;
469 dmas = <&dma0 AT91_XDMAC_DT_PERID(0)>;
584 dmas = <&dma0 AT91_XDMAC_DT_PERID(37)>;
596 dmas = <&dma0 AT91_XDMAC_DT_PERID(38)>;
608 dmas = <&dma0 AT91_XDMAC_DT_PERID(49)>;
620 dmas = <&dma0 AT91_XDMAC_DT_PERID(50)>;
631 dmas = <&dma0 AT91_XDMAC_DT_PERID(34)>, <&dma0 AT91_XDMAC_DT_PERID(33)>;
[all …]
Dat91sam9x5.dtsi184 dma0: dma-controller@ffffec00 { label
639 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
640 <&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
653 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
697 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(3)>,
698 <&dma0 1 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
712 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(5)>,
713 <&dma0 1 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
739 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
740 <&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
[all …]
Dsama5d4.dtsi244 dma0: dma-controller@f0014000 { label
284 dmas = <&dma0
287 <&dma0
371 dmas = <&dma0
374 <&dma0
444 dmas = <&dma0
447 <&dma0
463 dmas = <&dma0
466 <&dma0
499 dmas = <&dma0
[all …]
Dsama5d3.dtsi108 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>;
125 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>,
126 <&dma0 2 AT91_DMA_CFG_PER_ID(2)>;
139 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(13)>,
140 <&dma0 2 AT91_DMA_CFG_PER_ID(14)>;
163 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>,
164 <&dma0 2 AT91_DMA_CFG_PER_ID(8)>;
181 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>,
182 <&dma0 2 AT91_DMA_CFG_PER_ID(10)>;
200 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dsama5d2.dtsi257 dma0: dma-controller@f0010000 { label
311 dmas = <&dma0
324 dmas = <&dma0
327 <&dma0
340 dmas = <&dma0
343 <&dma0
359 dmas = <&dma0
362 <&dma0
424 dmas = <&dma0
437 dmas = <&dma0
[all …]
Dsam9x60.dtsi184 dma0: dma-controller@f0008000 { label
197 dmas = <&dma0
200 <&dma0
214 dmas = <&dma0
217 <&dma0
233 dmas = <&dma0
236 <&dma0
277 dmas = <&dma0
298 dmas = <&dma0
301 <&dma0
[all …]
Dat91sam9x5.dtsi183 dma0: dma-controller@ffffec00 { label
638 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
639 <&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
652 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
694 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(3)>,
695 <&dma0 1 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
708 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(5)>,
709 <&dma0 1 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
734 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
735 <&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
[all …]
Dsama5d4.dtsi236 dma0: dma-controller@f0014000 { label
275 dmas = <&dma0
278 <&dma0
362 dmas = <&dma0
365 <&dma0
434 dmas = <&dma0
437 <&dma0
452 dmas = <&dma0
455 <&dma0
487 dmas = <&dma0
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/mpeg/
Dnv40.c37 u32 dma0 = nvkm_instmem_rd32(imem, inst + 0); in nv40_mpeg_mthd_dma() local
40 u32 base = (dma2 & 0xfffff000) | (dma0 >> 20); in nv40_mpeg_mthd_dma()
44 if (!(dma0 & 0x00002000)) { in nv40_mpeg_mthd_dma()
45 nvkm_error(subdev, "inst %08x dma0 %08x dma1 %08x dma2 %08x\n", in nv40_mpeg_mthd_dma()
46 inst, dma0, dma1, dma2); in nv40_mpeg_mthd_dma()
52 nvkm_mask(device, 0x00b300, 0x00030000, (dma0 & 0x00030000)); in nv40_mpeg_mthd_dma()
58 nvkm_mask(device, 0x00b300, 0x000c0000, (dma0 & 0x00030000) << 2); in nv40_mpeg_mthd_dma()
63 if (dma0 & 0x00030000) in nv40_mpeg_mthd_dma()
Dnv31.c130 u32 dma0 = nvkm_rd32(device, 0x700000 + inst); in nv31_mpeg_mthd_dma() local
133 u32 base = (dma2 & 0xfffff000) | (dma0 >> 20); in nv31_mpeg_mthd_dma()
137 if (!(dma0 & 0x00002000)) { in nv31_mpeg_mthd_dma()
138 nvkm_error(subdev, "inst %08x dma0 %08x dma1 %08x dma2 %08x\n", in nv31_mpeg_mthd_dma()
139 inst, dma0, dma1, dma2); in nv31_mpeg_mthd_dma()
146 (dma0 & 0x00030000) ? 0x00010000 : 0); in nv31_mpeg_mthd_dma()
153 (dma0 & 0x00030000) ? 0x00020000 : 0); in nv31_mpeg_mthd_dma()
158 if (dma0 & 0x00030000) in nv31_mpeg_mthd_dma()
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/engine/mpeg/
Dnv40.c37 u32 dma0 = nvkm_instmem_rd32(imem, inst + 0); in nv40_mpeg_mthd_dma() local
40 u32 base = (dma2 & 0xfffff000) | (dma0 >> 20); in nv40_mpeg_mthd_dma()
44 if (!(dma0 & 0x00002000)) { in nv40_mpeg_mthd_dma()
45 nvkm_error(subdev, "inst %08x dma0 %08x dma1 %08x dma2 %08x\n", in nv40_mpeg_mthd_dma()
46 inst, dma0, dma1, dma2); in nv40_mpeg_mthd_dma()
52 nvkm_mask(device, 0x00b300, 0x00030000, (dma0 & 0x00030000)); in nv40_mpeg_mthd_dma()
58 nvkm_mask(device, 0x00b300, 0x000c0000, (dma0 & 0x00030000) << 2); in nv40_mpeg_mthd_dma()
63 if (dma0 & 0x00030000) in nv40_mpeg_mthd_dma()
Dnv31.c129 u32 dma0 = nvkm_rd32(device, 0x700000 + inst); in nv31_mpeg_mthd_dma() local
132 u32 base = (dma2 & 0xfffff000) | (dma0 >> 20); in nv31_mpeg_mthd_dma()
136 if (!(dma0 & 0x00002000)) { in nv31_mpeg_mthd_dma()
137 nvkm_error(subdev, "inst %08x dma0 %08x dma1 %08x dma2 %08x\n", in nv31_mpeg_mthd_dma()
138 inst, dma0, dma1, dma2); in nv31_mpeg_mthd_dma()
145 (dma0 & 0x00030000) ? 0x00010000 : 0); in nv31_mpeg_mthd_dma()
152 (dma0 & 0x00030000) ? 0x00020000 : 0); in nv31_mpeg_mthd_dma()
157 if (dma0 & 0x00030000) in nv31_mpeg_mthd_dma()
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/dma/
Dk3dma.txt20 dma0: dma@fcd02000 {
36 dmas = <&dma0 18 /* read channel */
37 &dma0 19>; /* write channel */
43 dmas = <&dma0 20 /* read channel */
44 &dma0 21>; /* write channel */
Datmel-dma.txt12 dma0: dma@ffffec00 {
39 dmas = <&dma0 1 7>,
40 <&dma0 1 8>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/
Dk3dma.txt20 dma0: dma@fcd02000 {
36 dmas = <&dma0 18 /* read channel */
37 &dma0 19>; /* write channel */
43 dmas = <&dma0 20 /* read channel */
44 &dma0 21>; /* write channel */
Datmel-dma.txt12 dma0: dma@ffffec00 {
39 dmas = <&dma0 1 7>,
40 <&dma0 1 8>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/powerpc/4xx/
Dppc440spe-adma.txt34 (typically 0x0 and 0x1 for DMA0 and DMA1)
37 - interrupts : <interrupt mapping for DMA0/1 interrupts sources:
44 DMA0: dma0@400100100 {
49 interrupt-parent = <&DMA0>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/powerpc/4xx/
Dppc440spe-adma.txt34 (typically 0x0 and 0x1 for DMA0 and DMA1)
37 - interrupts : <interrupt mapping for DMA0/1 interrupts sources:
44 DMA0: dma0@400100100 {
49 interrupt-parent = <&DMA0>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/
Datmel-usart.txt76 dmas = <&dma0 2 0x3>,
77 <&dma0 2 0x204>;
94 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
95 <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/serial/
Datmel,at91-usart.yaml166 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
167 <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
188 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
189 <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
/kernel/linux/linux-6.6/arch/sh/drivers/pci/
Dpci-sh4.h59 #define SH4_PCICLR_MDMA0 0x40000000 /* DMA0 Transfer Error */
82 #define SH4_PCIDPA0 0x180 /* DMA0 Transfer Addr. */
83 #define SH4_PCIDLA0 0x184 /* DMA0 Local Addr. */
84 #define SH4_PCIDTC0 0x188 /* DMA0 Transfer Cnt. */
85 #define SH4_PCIDCR0 0x18C /* DMA0 Control Register */
/kernel/linux/linux-5.10/arch/sh/drivers/pci/
Dpci-sh4.h59 #define SH4_PCICLR_MDMA0 0x40000000 /* DMA0 Transfer Error */
82 #define SH4_PCIDPA0 0x180 /* DMA0 Transfer Addr. */
83 #define SH4_PCIDLA0 0x184 /* DMA0 Local Addr. */
84 #define SH4_PCIDTC0 0x188 /* DMA0 Transfer Cnt. */
85 #define SH4_PCIDCR0 0x18C /* DMA0 Control Register */

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