| /kernel/linux/linux-5.10/drivers/memory/samsung/ |
| D | exynos5422-dmc.c | 104 * Covers frequency and voltage settings of the DMC operating mode. 112 * struct exynos5_dmc - main structure describing DMC device 113 * @dev: DMC device 238 static int exynos5_counters_set_event(struct exynos5_dmc *dmc) in exynos5_counters_set_event() argument 242 for (i = 0; i < dmc->num_counters; i++) { in exynos5_counters_set_event() 243 if (!dmc->counter[i]) in exynos5_counters_set_event() 245 ret = devfreq_event_set_event(dmc->counter[i]); in exynos5_counters_set_event() 252 static int exynos5_counters_enable_edev(struct exynos5_dmc *dmc) in exynos5_counters_enable_edev() argument 256 for (i = 0; i < dmc->num_counters; i++) { in exynos5_counters_enable_edev() 257 if (!dmc->counter[i]) in exynos5_counters_enable_edev() [all …]
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| D | Kconfig | 17 This adds driver for Exynos5422 DMC (Dynamic Memory Controller). 19 DMC and DRAM. It also supports changing timings of DRAM running with
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| /kernel/linux/linux-6.6/drivers/memory/samsung/ |
| D | exynos5422-dmc.c | 104 * Covers frequency and voltage settings of the DMC operating mode. 112 * struct exynos5_dmc - main structure describing DMC device 113 * @dev: DMC device 238 static int exynos5_counters_set_event(struct exynos5_dmc *dmc) in exynos5_counters_set_event() argument 242 for (i = 0; i < dmc->num_counters; i++) { in exynos5_counters_set_event() 243 if (!dmc->counter[i]) in exynos5_counters_set_event() 245 ret = devfreq_event_set_event(dmc->counter[i]); in exynos5_counters_set_event() 252 static int exynos5_counters_enable_edev(struct exynos5_dmc *dmc) in exynos5_counters_enable_edev() argument 256 for (i = 0; i < dmc->num_counters; i++) { in exynos5_counters_enable_edev() 257 if (!dmc->counter[i]) in exynos5_counters_enable_edev() [all …]
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| D | Kconfig | 17 This adds driver for Samsung Exynos5422 SoC DMC (Dynamic Memory 19 Frequency Scaling in DMC and DRAM. It also supports changing timings
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/ |
| D | intel_dmc.c | 34 * DOC: DMC Firmware Support 36 * From gen9 onwards we have newly added DMC (Display microcontroller) in display 71 return i915->display.dmc.dmc; in i915_to_dmc() 82 * New DMC additions should not use this. This is used solely to remain 83 * compatible with systems that have not yet updated DMC blobs to use 149 /* 0x09 for DMC */ 152 /* Includes the DMC specific header in dwords */ 167 /* Size in dwords (CSS_Headerlen + PackageHeaderLen + dmc FWsLen)/4 */ 209 /* DMC container header length in dwords */ 225 /* DMC binary header length */ [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/edac/ |
| D | dmc-520.yaml | 4 $id: http://devicetree.org/schemas/edac/dmc-520.yaml# 7 title: ARM DMC-520 EDAC bindings 13 DMC-520 node is defined to describe DRAM error detection and correction. 20 - const: brcm,dmc-520 21 - const: arm,dmc-520 56 dmc0: dmc@200000 { 57 compatible = "brcm,dmc-520", "arm,dmc-520";
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/edac/ |
| D | dmc-520.yaml | 4 $id: http://devicetree.org/schemas/edac/dmc-520.yaml# 7 title: ARM DMC-520 EDAC 13 DMC-520 node is defined to describe DRAM error detection and correction. 20 - const: brcm,dmc-520 21 - const: arm,dmc-520 56 dmc0: dmc@200000 { 57 compatible = "brcm,dmc-520", "arm,dmc-520";
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/ |
| D | intel_csr.c | 33 * DOC: csr support for dmc 36 * onwards to drive newly added DMC (Display microcontroller) in display 89 /* 0x09 for DMC */ 92 /* Includes the DMC specific header in dwords */ 107 /* Size in dwords (CSS_Headerlen + PackageHeaderLen + dmc FWsLen)/4 */ 149 /* DMC container header length in dwords */ 165 /* DMC binary header length */ 205 /* DMC RAM start MMIO address */ 430 DRM_ERROR("Unknown DMC fw header version: %u\n", in parse_csr_fw_dmc() 436 DRM_ERROR("DMC firmware has wrong dmc header length " in parse_csr_fw_dmc() [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/ |
| D | exynos5422-dmc.txt | 3 The Samsung Exynos5422 SoC has DMC (Dynamic Memory Controller) to which the DRAM 9 switch the DMC and memory frequency. 11 Required properties for DMC device for Exynos5422: 12 - compatible: Should be "samsung,exynos5422-dmc". 20 - devfreq-events : phandles for PPMU devices connected to this DMC. 34 Optional properties for DMC device for Exynos5422: 36 - interrupts : Contains the IRQ line numbers for the DMC internal performance 56 dmc: memory-controller@10c20000 { 57 compatible = "samsung,exynos5422-dmc";
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| /kernel/linux/linux-5.10/Documentation/admin-guide/perf/ |
| D | thunderx2-pmu.rst | 6 PMUs such as the Level 3 Cache (L3C), DDR4 Memory Controller (DMC) and 9 The DMC has 8 interleaved channels and the L3C has 16 interleaved tiles. 13 The DMC and L3C support up to 4 counters, while the CCPI2 supports up to 8 16 overflow interrupt. DMC and L3C counters are 32-bit and read every 2 seconds. 21 The thunderx2_pmu driver registers per-socket perf PMUs for the DMC and 22 L3C devices. Each PMU can be used to count up to 4 (DMC/L3C) or up to 8
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| /kernel/linux/linux-6.6/Documentation/admin-guide/perf/ |
| D | thunderx2-pmu.rst | 6 PMUs such as the Level 3 Cache (L3C), DDR4 Memory Controller (DMC) and 9 The DMC has 8 interleaved channels and the L3C has 16 interleaved tiles. 13 The DMC and L3C support up to 4 counters, while the CCPI2 supports up to 8 16 overflow interrupt. DMC and L3C counters are 32-bit and read every 2 seconds. 21 The thunderx2_pmu driver registers per-socket perf PMUs for the DMC and 22 L3C devices. Each PMU can be used to count up to 4 (DMC/L3C) or up to 8
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/ |
| D | samsung,exynos5422-dmc.yaml | 4 $id: http://devicetree.org/schemas/memory-controllers/samsung,exynos5422-dmc.yaml# 16 The Samsung Exynos5422 SoC has DMC (Dynamic Memory Controller) to which the 22 switch the DMC and memory frequency. 27 - const: samsung,exynos5422-dmc 62 - description: DMC internal performance event counters in DREX0 63 - description: DMC internal performance event counters in DREX1 112 compatible = "samsung,exynos5422-dmc";
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| D | rockchip,rk3399-dmc.yaml | 4 $id: http://devicetree.org/schemas/memory-controllers/rockchip,rk3399-dmc.yaml# 7 title: Rockchip rk3399 DMC (Dynamic Memory Controller) device 15 - rockchip,rk3399-dmc 34 DMC regulator supply. 363 compatible = "rockchip,rk3399-dmc";
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| /kernel/linux/linux-6.6/include/soc/amlogic/ |
| D | meson_ddr_pmu.h | 35 u64 channel_cnt[MAX_CHANNEL_NUM]; /* To save a DMC bandwidth-monitor channel counter */ 48 int dmc_nr; /* The number of dmc controller */ 49 int chann_nr; /* The number of dmc bandwidth monitor channels */
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/interconnect/ |
| D | samsung,exynos-bus.yaml | 49 VDD_MIF |--- DMC (Dynamic Memory Controller) 93 VDD_INT |--- DMC (parent device, Dynamic Memory Controller) 110 VDD_MIF |--- DMC (Dynamic Memory Controller) 225 bus-dmc { 287 dmc: bus-dmc { 303 interconnects = <&dmc>; 314 interconnects = <&leftbus &dmc>;
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/devfreq/ |
| D | rk3399_dmc.txt | 1 * Rockchip rk3399 DMC (Dynamic Memory Controller) device 4 - compatible: Must be "rockchip,rk3399-dmc". 13 - center-supply: DMC supply node. 176 dmc: dmc { 177 compatible = "rockchip,rk3399-dmc";
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| D | exynos-bus.txt | 56 VDD_MIF |--- DMC 71 VDD_INT |--- DMC (parent device) 88 VDD_MIF |--- DMC 144 : VDD_MIF |--- DMC (Dynamic Memory Controller) 188 The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi
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| /kernel/linux/linux-5.10/drivers/net/ethernet/sun/ |
| D | niu.h | 19 #define DMC 0x600000UL macro 1978 #define RXDMA_CFIG1(IDX) (DMC + 0x00000UL + (IDX) * 0x200UL) 1984 #define RXDMA_CFIG2(IDX) (DMC + 0x00008UL + (IDX) * 0x200UL) 1990 #define RBR_CFIG_A(IDX) (DMC + 0x00010UL + (IDX) * 0x200UL) 1996 #define RBR_CFIG_B(IDX) (DMC + 0x00018UL + (IDX) * 0x200UL) 2026 #define RBR_KICK(IDX) (DMC + 0x00020UL + (IDX) * 0x200UL) 2029 #define RBR_STAT(IDX) (DMC + 0x00028UL + (IDX) * 0x200UL) 2032 #define RBR_HDH(IDX) (DMC + 0x00030UL + (IDX) * 0x200UL) 2035 #define RBR_HDL(IDX) (DMC + 0x00038UL + (IDX) * 0x200UL) 2038 #define RCRCFIG_A(IDX) (DMC + 0x00040UL + (IDX) * 0x200UL) [all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/sun/ |
| D | niu.h | 19 #define DMC 0x600000UL macro 1978 #define RXDMA_CFIG1(IDX) (DMC + 0x00000UL + (IDX) * 0x200UL) 1984 #define RXDMA_CFIG2(IDX) (DMC + 0x00008UL + (IDX) * 0x200UL) 1990 #define RBR_CFIG_A(IDX) (DMC + 0x00010UL + (IDX) * 0x200UL) 1996 #define RBR_CFIG_B(IDX) (DMC + 0x00018UL + (IDX) * 0x200UL) 2026 #define RBR_KICK(IDX) (DMC + 0x00020UL + (IDX) * 0x200UL) 2029 #define RBR_STAT(IDX) (DMC + 0x00028UL + (IDX) * 0x200UL) 2032 #define RBR_HDH(IDX) (DMC + 0x00030UL + (IDX) * 0x200UL) 2035 #define RBR_HDL(IDX) (DMC + 0x00038UL + (IDX) * 0x200UL) 2038 #define RCRCFIG_A(IDX) (DMC + 0x00040UL + (IDX) * 0x200UL) [all …]
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| /kernel/linux/linux-5.10/drivers/cpufreq/ |
| D | s5pv210-cpufreq.c | 194 * ch: DMC port number 0 or 1 207 pr_err("Cannot find DMC port\n"); in s5pv210_set_refresh() 536 /* Find current refresh counter and frequency each DMC */ in s5pv210_cpu_init() 599 * and DMC controller registers directly and remove static mappings in s5pv210_cpufreq_probe() 632 for_each_compatible_node(np, NULL, "samsung,s5pv210-dmc") { in s5pv210_cpufreq_probe() 633 id = of_alias_get_id(np, "dmc"); in s5pv210_cpufreq_probe() 635 dev_err(dev, "failed to get alias of dmc node '%pOFn'\n", np); in s5pv210_cpufreq_probe() 643 dev_err(dev, "failed to map dmc%d registers\n", id); in s5pv210_cpufreq_probe() 652 dev_err(dev, "failed to find dmc%d node\n", id); in s5pv210_cpufreq_probe()
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| /kernel/linux/linux-6.6/drivers/cpufreq/ |
| D | s5pv210-cpufreq.c | 194 * ch: DMC port number 0 or 1 207 pr_err("Cannot find DMC port\n"); in s5pv210_set_refresh() 536 /* Find current refresh counter and frequency each DMC */ in s5pv210_cpu_init() 599 * and DMC controller registers directly and remove static mappings in s5pv210_cpufreq_probe() 632 for_each_compatible_node(np, NULL, "samsung,s5pv210-dmc") { in s5pv210_cpufreq_probe() 633 id = of_alias_get_id(np, "dmc"); in s5pv210_cpufreq_probe() 635 dev_err(dev, "failed to get alias of dmc node '%pOFn'\n", np); in s5pv210_cpufreq_probe() 643 dev_err(dev, "failed to map dmc%d registers\n", id); in s5pv210_cpufreq_probe() 652 dev_err(dev, "failed to find dmc%d node\n", id); in s5pv210_cpufreq_probe()
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/perf/ |
| D | amlogic,g12-ddr-pmu.yaml | 27 - description: DMC bandwidth register space. 28 - description: DMC PLL register space.
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | exynos3250-clock.txt | 10 - "samsung,exynos3250-cmu-dmc" - controller compatible with 36 compatible = "samsung,exynos3250-cmu-dmc";
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| /kernel/linux/linux-5.10/drivers/soc/amlogic/ |
| D | meson-secure-pwrc.c | 99 /* DMC is for DDR PHY ana/dig and DMC, and should be always on */ 100 SEC_PD(DMC, GENPD_FLAG_ALWAYS_ON),
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| /kernel/linux/linux-6.6/drivers/perf/ |
| D | Kconfig | 166 in the DDR4 Memory Controller (DMC). 184 tristate "Enable PMU support for the ARM DMC-620 memory controller" 187 Support for PMU events monitoring on the ARM DMC-620 memory
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