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/kernel/linux/linux-6.6/Documentation/sound/cards/
Dhdspm.rst2 Software Interface ALSA-DSP MADI Driver
5 (translated from German, so no good English ;-),
7 2004 - winfried ritsch
11 the Controls and startup-options are ALSA-Standard and only the
19 ------------------
21 * number of channels -- depends on transmission mode
29 * Single Speed -- 1..64 channels
37 * Double Speed -- 1..32 channels
40 Note: Choosing the 56-channel mode for
41 transmission/receive-mode , only 28 are transmitted/received
[all …]
/kernel/linux/linux-5.10/Documentation/sound/cards/
Dhdspm.rst2 Software Interface ALSA-DSP MADI Driver
5 (translated from German, so no good English ;-),
7 2004 - winfried ritsch
11 the Controls and startup-options are ALSA-Standard and only the
19 ------------------
21 * number of channels -- depends on transmission mode
29 * Single Speed -- 1..64 channels
37 * Double Speed -- 1..32 channels
40 Note: Choosing the 56-channel mode for
41 transmission/receive-mode , only 28 are transmitted/received
[all …]
/kernel/linux/linux-6.6/sound/pci/echoaudio/
Dechoaudio.h3 Copyright Echo Digital Audio Corporation (c) 1998 - 2004
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22 MA 02111-1307, USA.
26 Translation from C++ and adaptation for use in ALSA-Driver
34 +-----------+
35 record | |<-------------------- Inputs
36 <-------| | |
39 ------->| | +-------+
40 play | |--->|monitor|-------> Outputs
41 +-----------+ | mixer |
[all …]
Dechoaudio_dsp.h3 Copyright Echo Digital Audio Corporation (c) 1998 - 2004
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22 MA 02111-1307, USA.
26 Translation from C++ and adaptation for use in ALSA-Driver
41 /**** Echo24: Gina24, Layla24, Mona, Mia, Mia-midi ****/
81 * These are the offsets for the memory-mapped DSP registers; the DSP base
133 #define MIDI_IN_SKIP_DATA (-1)
136 /*----------------------------------------------------------------------------
147 50 to 100 kHz inclusive for double speed mode.
151 -Set the clock select bits in the control register to 0xe (see the #define
[all …]
Dmona_dsp.c3 Copyright Echo Digital Audio Corporation (c) 1998 - 2004
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22 MA 02111-1307, USA.
26 Translation from C++ and adaptation for use in ALSA-Driver
33 static int set_input_clock(struct echoaudio *chip, u16 clock);
45 return -ENODEV; in init_hw()
49 dev_err(chip->card->dev, in init_hw()
50 "init_hw - could not initialize DSP comm page\n"); in init_hw()
54 chip->device_id = device_id; in init_hw()
55 chip->subdevice_id = subdevice_id; in init_hw()
[all …]
/kernel/linux/linux-5.10/sound/pci/echoaudio/
Dechoaudio.h3 Copyright Echo Digital Audio Corporation (c) 1998 - 2004
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22 MA 02111-1307, USA.
26 Translation from C++ and adaptation for use in ALSA-Driver
34 +-----------+
35 record | |<-------------------- Inputs
36 <-------| | |
39 ------->| | +-------+
40 play | |--->|monitor|-------> Outputs
41 +-----------+ | mixer |
[all …]
Dechoaudio_dsp.h3 Copyright Echo Digital Audio Corporation (c) 1998 - 2004
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22 MA 02111-1307, USA.
26 Translation from C++ and adaptation for use in ALSA-Driver
41 /**** Echo24: Gina24, Layla24, Mona, Mia, Mia-midi ****/
81 * These are the offsets for the memory-mapped DSP registers; the DSP base
133 #define MIDI_IN_SKIP_DATA (-1)
136 /*----------------------------------------------------------------------------
147 50 to 100 kHz inclusive for double speed mode.
151 -Set the clock select bits in the control register to 0xe (see the #define
[all …]
Dmona_dsp.c3 Copyright Echo Digital Audio Corporation (c) 1998 - 2004
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22 MA 02111-1307, USA.
26 Translation from C++ and adaptation for use in ALSA-Driver
33 static int set_input_clock(struct echoaudio *chip, u16 clock);
45 return -ENODEV; in init_hw()
48 dev_err(chip->card->dev, in init_hw()
49 "init_hw - could not initialize DSP comm page\n"); in init_hw()
53 chip->device_id = device_id; in init_hw()
54 chip->subdevice_id = subdevice_id; in init_hw()
[all …]
/kernel/linux/linux-5.10/drivers/ata/
Dpata_ftide010.c1 // SPDX-License-Identifier: GPL-2.0-only
25 * struct ftide010 - state container for the Faraday FTIDE010
28 * @pclk: peripheral clock for the IDE block
49 /* Gemini-specific properties */
94 * The unit of the below required timings is two clock periods of the ATA
95 * reference clock which is 30 nanoseconds per unit at 66MHz and 20
96 * nanoseconds per unit at 50 MHz. The PIO timings assume 33MHz speed for
143 struct ftide010 *ftide = ap->host->private_data; in ftide010_set_dmamode()
144 u8 speed = adev->dma_mode; in ftide010_set_dmamode() local
145 u8 devno = adev->devno & 1; in ftide010_set_dmamode()
[all …]
Dpata_opti.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * pata_opti.c - ATI PATA for new ATA layer
9 * Copyright (C) 1996-1998 Linus Torvalds & authors (see below)
47 * opti_pre_reset - probe begin
56 struct ata_port *ap = link->ap; in opti_pre_reset()
57 struct pci_dev *pdev = to_pci_dev(ap->host->dev); in opti_pre_reset()
63 if (!pci_test_config_bits(pdev, &opti_enable_bits[ap->port_no])) in opti_pre_reset()
64 return -ENOENT; in opti_pre_reset()
70 * opti_write_reg - control register setup
76 * rather than using PCI space as other controllers do. The double inw
[all …]
/kernel/linux/linux-6.6/drivers/ata/
Dpata_ftide010.c1 // SPDX-License-Identifier: GPL-2.0-only
24 * struct ftide010 - state container for the Faraday FTIDE010
27 * @pclk: peripheral clock for the IDE block
48 /* Gemini-specific properties */
93 * The unit of the below required timings is two clock periods of the ATA
94 * reference clock which is 30 nanoseconds per unit at 66MHz and 20
95 * nanoseconds per unit at 50 MHz. The PIO timings assume 33MHz speed for
142 struct ftide010 *ftide = ap->host->private_data; in ftide010_set_dmamode()
143 u8 speed = adev->dma_mode; in ftide010_set_dmamode() local
144 u8 devno = adev->devno & 1; in ftide010_set_dmamode()
[all …]
Dpata_opti.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * pata_opti.c - ATI PATA for new ATA layer
9 * Copyright (C) 1996-1998 Linus Torvalds & authors (see below)
47 * opti_pre_reset - probe begin
56 struct ata_port *ap = link->ap; in opti_pre_reset()
57 struct pci_dev *pdev = to_pci_dev(ap->host->dev); in opti_pre_reset()
63 if (!pci_test_config_bits(pdev, &opti_enable_bits[ap->port_no])) in opti_pre_reset()
64 return -ENOENT; in opti_pre_reset()
70 * opti_write_reg - control register setup
76 * rather than using PCI space as other controllers do. The double inw
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
Dfsl,cpm1-tsa.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PowerQUICC CPM Time-slot assigner (TSA) controller
10 - Herve Codina <herve.codina@bootlin.com>
13 The TSA is the time-slot assigner that can be found on some PowerQUICC SoC.
14 Its purpose is to route some TDM time-slots to other internal serial
20 - enum:
21 - fsl,mpc885-tsa
[all …]
/kernel/linux/linux-5.10/sound/soc/codecs/
Des7241.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
39 gpiod_set_value_cansleep(priv->reset, 0); in es7241_set_mode()
42 gpiod_set_value_cansleep(priv->m0, m0); in es7241_set_mode()
43 gpiod_set_value_cansleep(priv->m1, m1); in es7241_set_mode()
45 /* take the device out of reset - datasheet does not specify a delay */ in es7241_set_mode()
46 gpiod_set_value_cansleep(priv->reset, 1); in es7241_set_mode()
58 for (j = 0; j < mode->slv_mfs_num; j++) { in es7241_set_slave_mode()
59 if (mode->slv_mfs[j] == mfs) in es7241_set_slave_mode()
63 return -EINVAL; in es7241_set_slave_mode()
75 * We can't really set clock ratio, if the mclk/lrclk is different in es7241_set_master_mode()
[all …]
/kernel/linux/linux-6.6/sound/soc/codecs/
Des7241.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
39 gpiod_set_value_cansleep(priv->reset, 0); in es7241_set_mode()
42 gpiod_set_value_cansleep(priv->m0, m0); in es7241_set_mode()
43 gpiod_set_value_cansleep(priv->m1, m1); in es7241_set_mode()
45 /* take the device out of reset - datasheet does not specify a delay */ in es7241_set_mode()
46 gpiod_set_value_cansleep(priv->reset, 1); in es7241_set_mode()
58 for (j = 0; j < mode->slv_mfs_num; j++) { in es7241_set_consumer_mode()
59 if (mode->slv_mfs[j] == mfs) in es7241_set_consumer_mode()
63 return -EINVAL; in es7241_set_consumer_mode()
75 * We can't really set clock ratio, if the mclk/lrclk is different in es7241_set_provider_mode()
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/
Dci-hdrc-usb2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/ci-hdrc-usb2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xu Yang <xu.yang_2@nxp.com>
11 - Peng Fan <peng.fan@nxp.com>
16 - enum:
17 - chipidea,usb2
18 - lsi,zevio-usb
19 - nvidia,tegra20-ehci
[all …]
/kernel/linux/linux-5.10/tools/spi/
Dspidev_test.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Cross-compile with cross-gcc -I/path/to/cross-kernel/include
43 static uint32_t speed = 500000; variable
71 while (length-- > 0) { in hex_dump()
91 * Unescape - process hexadecimal escape character
92 * converts shell input "\x23" -> 0x23
127 .speed_hz = speed, in transfer()
175 printf("Usage: %s [-DsbdlHOLC3vpNR24SI]\n", prog); in print_usage()
176 puts(" -D --device device to use (default /dev/spidev1.1)\n" in print_usage()
177 " -s --speed max speed (Hz)\n" in print_usage()
[all …]
/kernel/linux/linux-6.6/tools/spi/
Dspidev_test.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Cross-compile with cross-gcc -I/path/to/cross-kernel/include
43 static uint32_t speed = 500000; variable
71 while (length-- > 0) { in hex_dump()
91 * Unescape - process hexadecimal escape character
92 * converts shell input "\x23" -> 0x23
127 .speed_hz = speed, in transfer()
175 printf("Usage: %s [-2348CDFHILMNORSZbdilopsv]\n", prog); in print_usage()
177 " -D --device device to use (default /dev/spidev1.1)\n" in print_usage()
178 " -s --speed max speed (Hz)\n" in print_usage()
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/
Dmmc-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
25 "#address-cells":
30 "#size-cells":
37 broken-cd:
42 cd-gpios:
47 non-removable:
[all …]
/kernel/linux/linux-5.10/arch/powerpc/include/asm/
Duninorth.h1 /* SPDX-License-Identifier: GPL-2.0 */
14 * Uni-N and U3 config space reg. definitions
58 * This word contains, in little-endian format (!!!), the physical address
78 * Turning on AGP seem to require a double invalidate operation, one before
92 * Uni-N memory mapped reg. definitions
94 * Those registers are Big-Endian !!
114 #define UNI_N_CLOCK_CNTL_PCI 0x00000001 /* PCI2 clock control */
115 #define UNI_N_CLOCK_CNTL_GMAC 0x00000002 /* GMAC clock control */
116 #define UNI_N_CLOCK_CNTL_FW 0x00000004 /* FireWire clock control */
117 #define UNI_N_CLOCK_CNTL_ATA100 0x00000010 /* ATA-100 clock control (U2) */
[all …]
/kernel/linux/linux-6.6/arch/powerpc/include/asm/
Duninorth.h1 /* SPDX-License-Identifier: GPL-2.0 */
14 * Uni-N and U3 config space reg. definitions
58 * This word contains, in little-endian format (!!!), the physical address
78 * Turning on AGP seem to require a double invalidate operation, one before
92 * Uni-N memory mapped reg. definitions
94 * Those registers are Big-Endian !!
114 #define UNI_N_CLOCK_CNTL_PCI 0x00000001 /* PCI2 clock control */
115 #define UNI_N_CLOCK_CNTL_GMAC 0x00000002 /* GMAC clock control */
116 #define UNI_N_CLOCK_CNTL_FW 0x00000004 /* FireWire clock control */
117 #define UNI_N_CLOCK_CNTL_ATA100 0x00000010 /* ATA-100 clock control (U2) */
[all …]
/kernel/linux/linux-6.6/Documentation/powerpc/
Ddawr-power9.rst18 clock : 3800.000000MHz
62 speed since it can use the hardware emulation. Unfortunately if this
97 To double check the DAWR is working, run this kernel selftest:
99 tools/testing/selftests/powerpc/ptrace/ptrace-hwbreak.c
/kernel/linux/linux-6.6/drivers/usb/renesas_usbhs/
Dcommon.h1 /* SPDX-License-Identifier: GPL-1.0+ */
100 #define D2FIFOSEL 0x00F0 /* for R-Car Gen2 */
101 #define D2FIFOCTR 0x00F2 /* for R-Car Gen2 */
102 #define D3FIFOSEL 0x00F4 /* for R-Car Gen2 */
103 #define D3FIFOCTR 0x00F6 /* for R-Car Gen2 */
107 #define SCKE (1 << 10) /* USB Module Clock Enable */
108 #define CNEN (1 << 8) /* Single-ended receiver operation Enable */
109 #define HSE (1 << 7) /* High-Speed Operation Enable */
111 #define DRPD (1 << 5) /* D+ Line/D- Line Resistance Control */
114 #define UCKSEL (1 << 2) /* Clock Select for RZ/A1 */
[all …]
/kernel/linux/linux-5.10/drivers/usb/renesas_usbhs/
Dcommon.h1 /* SPDX-License-Identifier: GPL-1.0+ */
100 #define D2FIFOSEL 0x00F0 /* for R-Car Gen2 */
101 #define D2FIFOCTR 0x00F2 /* for R-Car Gen2 */
102 #define D3FIFOSEL 0x00F4 /* for R-Car Gen2 */
103 #define D3FIFOCTR 0x00F6 /* for R-Car Gen2 */
107 #define SCKE (1 << 10) /* USB Module Clock Enable */
108 #define CNEN (1 << 8) /* Single-ended receiver operation Enable */
109 #define HSE (1 << 7) /* High-Speed Operation Enable */
111 #define DRPD (1 << 5) /* D+ Line/D- Line Resistance Control */
114 #define UCKSEL (1 << 2) /* Clock Select for RZ/A1 */
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/
Dmmc-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
25 "#address-cells":
30 "#size-cells":
37 broken-cd:
42 cd-gpios:
46 non-removable:
[all …]

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