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/kernel/linux/linux-5.10/drivers/net/ethernet/stmicro/stmmac/
Ddwmac-meson8b.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Amlogic Meson8b, Meson8m2 and GXBB DWMAC glue layer
10 #include <linux/clk-provider.h>
43 #define PRG_ETH0_CLK_M250_DIV_WIDTH 3
51 * internal sampling) or enable (= 1) the internal logic for RXEN and RXD[3:0]
55 /* Controls whether the RXEN and RXD[3:0] signals should be aligned with the
60 /* An internal counter based on the "timing-adjustment" clock. The counter is
62 * delay (= the counter value) when to start sampling RXEN and RXD[3:0].
65 /* Adjusts the skew between each bit of RXEN and RXD[3:0]. If a signal has a
66 * large input delay, the bit for that signal (RXEN = bit 0, RXD[3] = bit 1,
[all …]
Ddwmac-sti.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * dwmac-sti.c - STMicroelectronics DWMAC Specific Glue layer
5 * Copyright (C) 2003-2014 STMicroelectronics (R&D) Limited
44 * ------------------------------------------------
47 * ------------------------------------------------
49 *| | clk-125/txclk | txclk |
50 * ------------------------------------------------
52 *| | clk-125/txclk | clkgen |
54 * ------------------------------------------------
56 *| | |clkgen/phyclk-in |
[all …]
Ddwmac-oxnas.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Oxford Semiconductor OXNAS DWMAC glue layer
36 #define DWMAC_AUTO_TX_SOURCE 3
59 struct oxnas_dwmac *dwmac = priv; in oxnas_dwmac_init() local
64 ret = device_reset(dwmac->dev); in oxnas_dwmac_init()
68 ret = clk_prepare_enable(dwmac->clk); in oxnas_dwmac_init()
72 ret = regmap_read(dwmac->regmap, OXNAS_DWMAC_CTRL_REGOFFSET, &value); in oxnas_dwmac_init()
74 clk_disable_unprepare(dwmac->clk); in oxnas_dwmac_init()
91 regmap_write(dwmac->regmap, OXNAS_DWMAC_CTRL_REGOFFSET, value); in oxnas_dwmac_init()
98 regmap_write(dwmac->regmap, OXNAS_DWMAC_DELAY_REGOFFSET, value); in oxnas_dwmac_init()
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/stmicro/stmmac/
Ddwmac-meson8b.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Amlogic Meson8b, Meson8m2 and GXBB DWMAC glue layer
10 #include <linux/clk-provider.h>
43 #define PRG_ETH0_CLK_M250_DIV_WIDTH 3
51 * internal sampling) or enable (= 1) the internal logic for RXEN and RXD[3:0]
55 /* Controls whether the RXEN and RXD[3:0] signals should be aligned with the
60 /* An internal counter based on the "timing-adjustment" clock. The counter is
62 * delay (= the counter value) when to start sampling RXEN and RXD[3:0].
65 /* Adjusts the skew between each bit of RXEN and RXD[3:0]. If a signal has a
66 * large input delay, the bit for that signal (RXEN = bit 0, RXD[3] = bit 1,
[all …]
Ddwmac-imx.c1 // SPDX-License-Identifier: GPL-2.0
3 * dwmac-imx.c - DWMAC Specific Glue layer for NXP imx8
33 #define MX93_GPR_ENET_QOS_INTF_MODE_MASK GENMASK(3, 0)
34 #define MX93_GPR_ENET_QOS_INTF_MASK GENMASK(3, 1)
70 struct imx_priv_data *dwmac = plat_dat->bsp_priv; in imx8mp_set_intf_mode() local
73 switch (plat_dat->mac_interface) { in imx8mp_set_intf_mode()
79 val |= (dwmac->rmii_refclk_ext ? 0 : GPR_ENET_QOS_CLK_TX_CLK_SEL); in imx8mp_set_intf_mode()
89 pr_debug("imx dwmac doesn't support %d interface\n", in imx8mp_set_intf_mode()
90 plat_dat->mac_interface); in imx8mp_set_intf_mode()
91 return -EINVAL; in imx8mp_set_intf_mode()
[all …]
Ddwmac-sti.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * dwmac-sti.c - STMicroelectronics DWMAC Specific Glue layer
5 * Copyright (C) 2003-2014 STMicroelectronics (R&D) Limited
43 * ------------------------------------------------
46 * ------------------------------------------------
48 *| | clk-125/txclk | txclk |
49 * ------------------------------------------------
51 *| | clk-125/txclk | clkgen |
53 * ------------------------------------------------
55 *| | |clkgen/phyclk-in |
[all …]
Ddwmac-visconti.c1 // SPDX-License-Identifier: GPL-2.0
24 #define ETHER_CLK_SEL_RMII_CLK_RST BIT(3)
59 struct visconti_eth *dwmac = priv; in visconti_eth_fix_mac_speed() local
60 struct net_device *netdev = dev_get_drvdata(dwmac->dev); in visconti_eth_fix_mac_speed()
64 spin_lock_irqsave(&dwmac->lock, flags); in visconti_eth_fix_mac_speed()
67 val = readl(dwmac->reg + MAC_CTRL_REG); in visconti_eth_fix_mac_speed()
72 if (dwmac->phy_intf_sel == ETHER_CONFIG_INTF_RGMII) in visconti_eth_fix_mac_speed()
76 if (dwmac->phy_intf_sel == ETHER_CONFIG_INTF_RGMII) in visconti_eth_fix_mac_speed()
78 if (dwmac->phy_intf_sel == ETHER_CONFIG_INTF_RMII) in visconti_eth_fix_mac_speed()
83 if (dwmac->phy_intf_sel == ETHER_CONFIG_INTF_RGMII) in visconti_eth_fix_mac_speed()
[all …]
Ddwmac-ingenic.c1 // SPDX-License-Identifier: GPL-2.0
3 * dwmac-ingenic.c - Ingenic SoCs DWMAC specific glue layer
36 #define MACPHYC_SOFT_RST_MASK GENMASK(3, 3)
75 struct ingenic_mac *mac = plat_dat->bsp_priv; in ingenic_mac_init()
78 if (mac->soc_info->set_mode) { in ingenic_mac_init()
79 ret = mac->soc_info->set_mode(plat_dat); in ingenic_mac_init()
89 struct ingenic_mac *mac = plat_dat->bsp_priv; in jz4775_mac_set_mode()
92 switch (plat_dat->mac_interface) { in jz4775_mac_set_mode()
96 dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_MII\n"); in jz4775_mac_set_mode()
102 dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_GMII\n"); in jz4775_mac_set_mode()
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Damlogic,meson-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/amlogic,meson-dwmac.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Amlogic Meson DWMAC Ethernet controller
11 - Neil Armstrong <neil.armstrong@linaro.org>
12 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
14 # We need a select here so we don't match all nodes with 'snps,dwmac'
20 - amlogic,meson6-dwmac
21 - amlogic,meson8b-dwmac
[all …]
Dstm32-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/stm32-dwmac.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: STMicroelectronics STM32 / MCU DWMAC glue layer controller
11 - Alexandre Torgue <alexandre.torgue@foss.st.com>
12 - Christophe Roullier <christophe.roullier@foss.st.com>
17 # We need a select here so we don't match all nodes with 'snps,dwmac'
23 - st,stm32-dwmac
24 - st,stm32mp1-dwmac
[all …]
Dnxp,dwmac-imx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/nxp,dwmac-imx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8/9 DWMAC glue layer
10 - Clark Wang <xiaoning.wang@nxp.com>
11 - Shawn Guo <shawnguo@kernel.org>
12 - NXP Linux Team <linux-imx@nxp.com>
14 # We need a select here so we don't match all nodes with 'snps,dwmac'
20 - nxp,imx8mp-dwmac-eqos
[all …]
Dstarfive,jh7110-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: StarFive JH7110 DWMAC glue layer
11 - Emil Renner Berthing <kernel@esmil.dk>
12 - Samin Guo <samin.guo@starfivetech.com>
19 - starfive,jh7110-dwmac
21 - compatible
26 - enum:
[all …]
Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/snps,dwmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
[all …]
Dintel,dwmac-plat.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Intel DWMAC glue layer
10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
17 - intel,keembay-dwmac
19 - compatible
22 - $ref: snps,dwmac.yaml#
27 - items:
[all …]
Dmediatek-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/mediatek-dwmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek DWMAC glue layer controller
10 - Biao Huang <biao.huang@mediatek.com>
15 # We need a select here so we don't match all nodes with 'snps,dwmac'
21 - mediatek,mt2712-gmac
22 - mediatek,mt8188-gmac
23 - mediatek,mt8195-gmac
[all …]
Dqcom,ethqos.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bhupesh Sharma <bhupesh.sharma@linaro.org>
17 - $ref: snps,dwmac.yaml#
22 - qcom,qcs404-ethqos
23 - qcom,sa8775p-ethqos
24 - qcom,sc8280xp-ethqos
25 - qcom,sm8150-ethqos
30 reg-names:
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Damlogic,meson-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/net/amlogic,meson-dwmac.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Amlogic Meson DWMAC Ethernet controller
11 - Neil Armstrong <narmstrong@baylibre.com>
12 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
14 # We need a select here so we don't match all nodes with 'snps,dwmac'
20 - amlogic,meson6-dwmac
21 - amlogic,meson8b-dwmac
[all …]
Dstm32-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/net/stm32-dwmac.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: STMicroelectronics STM32 / MCU DWMAC glue layer controller
11 - Alexandre Torgue <alexandre.torgue@st.com>
12 - Christophe Roullier <christophe.roullier@st.com>
17 # We need a select here so we don't match all nodes with 'snps,dwmac'
23 - st,stm32-dwmac
24 - st,stm32mp1-dwmac
[all …]
Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/snps,dwmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.50a
25 - snps,dwmac-3.610
[all …]
Dintel,dwmac-plat.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Intel DWMAC glue layer Device Tree Bindings
10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
17 - intel,keembay-dwmac
19 - compatible
22 - $ref: "snps,dwmac.yaml#"
27 - items:
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/intel/
Dsocfpga_agilex.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/agilex-clock.h>
13 compatible = "intel,socfpga-agilex";
14 #address-cells = <2>;
15 #size-cells = <2>;
17 reserved-memory {
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/altera/
Dsocfpga_stratix10.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/stratix10-clock.h>
12 compatible = "altr,socfpga-stratix10";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/intel/
Dsocfpga_agilex.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/agilex-clock.h>
12 compatible = "intel,socfpga-agilex";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/altera/
Dsocfpga_stratix10.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/stratix10-clock.h>
12 compatible = "altr,socfpga-stratix10";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/axis/
Dartpec6-devboard.dts1 // SPDX-License-Identifier: GPL-2.0-only
2 // Axis ARTPEC-6 development board.
4 /dts-v1/;
8 model = "ARTPEC-6 development board";
9 compatible = "axis,artpec6-dev-board", "axis,artpec6";
19 stdout-path = "serial3:115200n8";
51 phy-handle = <&phy1>;
52 phy-mode = "gmii";
55 #address-cells = <0x1>;
56 #size-cells = <0x0>;
[all …]

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