| /kernel/linux/linux-5.10/drivers/dma/ |
| D | fsl-edma-common.c | 11 #include "fsl-edma-common.h"
47 struct edma_regs *regs = &fsl_chan->edma->regs; in fsl_edma_enable_request()
50 if (fsl_chan->edma->drvdata->version == v1) { in fsl_edma_enable_request()
51 edma_writeb(fsl_chan->edma, EDMA_SEEI_SEEI(ch), regs->seei); in fsl_edma_enable_request()
52 edma_writeb(fsl_chan->edma, ch, regs->serq); in fsl_edma_enable_request()
64 struct edma_regs *regs = &fsl_chan->edma->regs; in fsl_edma_disable_request()
67 if (fsl_chan->edma->drvdata->version == v1) { in fsl_edma_disable_request()
68 edma_writeb(fsl_chan->edma, ch, regs->cerq); in fsl_edma_disable_request()
69 edma_writeb(fsl_chan->edma, EDMA_CEEI_CEEI(ch), regs->ceei); in fsl_edma_disable_request()
113 u32 dmamux_nr = fsl_chan->edma->drvdata->dmamuxs; in fsl_edma_chan_mux()
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| D | mcf-edma.c | 10 #include <linux/platform_data/dma-mcf-edma.h>
12 #include "fsl-edma-common.h"
107 IORESOURCE_IRQ, "edma-tx-00-15"); in mcf_edma_irq_init()
112 ret |= request_irq(i, mcf_edma_tx_handler, 0, "eDMA", mcf_edma); in mcf_edma_irq_init()
117 IORESOURCE_IRQ, "edma-tx-16-55"); in mcf_edma_irq_init()
122 ret |= request_irq(i, mcf_edma_tx_handler, 0, "eDMA", mcf_edma); in mcf_edma_irq_init()
126 ret = platform_get_irq_byname(pdev, "edma-tx-56-63"); in mcf_edma_irq_init()
129 0, "eDMA", mcf_edma); in mcf_edma_irq_init()
134 ret = platform_get_irq_byname(pdev, "edma-err"); in mcf_edma_irq_init()
137 0, "eDMA", mcf_edma); in mcf_edma_irq_init()
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| D | fsl-edma.c | 3 * drivers/dma/fsl-edma.c
7 * Driver for the Freescale eDMA engine with flexible channel multiplexing
8 * capability for DMA request sources. The eDMA block can be found on some
21 #include "fsl-edma-common.h"
141 fsl_edma->txirq = platform_get_irq_byname(pdev, "edma-tx"); in fsl_edma_irq_init()
145 fsl_edma->errirq = platform_get_irq_byname(pdev, "edma-err"); in fsl_edma_irq_init()
151 fsl_edma_irq_handler, 0, "eDMA", fsl_edma); in fsl_edma_irq_init()
153 dev_err(&pdev->dev, "Can't register eDMA IRQ.\n"); in fsl_edma_irq_init()
158 fsl_edma_tx_handler, 0, "eDMA tx", fsl_edma); in fsl_edma_irq_init()
160 dev_err(&pdev->dev, "Can't register eDMA tx IRQ.\n"); in fsl_edma_irq_init()
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| D | fsl-edma-common.h | 120 struct fsl_edma_engine *edma; member
173 * The eDMA controller's endian is independent of the CPU core's endian.
177 static inline u32 edma_readl(struct fsl_edma_engine *edma, void __iomem *addr) in edma_readl() argument
179 if (edma->big_endian) in edma_readl()
185 static inline void edma_writeb(struct fsl_edma_engine *edma, in edma_writeb() argument
189 if (edma->big_endian) in edma_writeb()
195 static inline void edma_writew(struct fsl_edma_engine *edma, in edma_writew() argument
199 if (edma->big_endian) in edma_writew()
205 static inline void edma_writel(struct fsl_edma_engine *edma, in edma_writel() argument
208 if (edma->big_endian) in edma_writel()
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| D | ep93xx_dma.c | 135 * @edma: pointer to to the engine device
166 const struct ep93xx_dma_engine *edma; member
744 edmac->edma->hw_submit(edmac); in ep93xx_dma_advance_work()
802 switch (edmac->edma->hw_interrupt(edmac)) { in ep93xx_dma_interrupt()
850 edmac->edma->hw_submit(edmac); in ep93xx_dma_tx_submit()
875 if (!edmac->edma->m2m) { in ep93xx_dma_alloc_chan_resources()
910 ret = edmac->edma->hw_setup(edmac); in ep93xx_dma_alloc_chan_resources()
962 edmac->edma->hw_shutdown(edmac); in ep93xx_dma_free_chan_resources()
1044 if (!edmac->edma->m2m && dir != ep93xx_dma_chan_direction(chan)) { in ep93xx_dma_prep_slave_sg()
1125 if (!edmac->edma->m2m && dir != ep93xx_dma_chan_direction(chan)) { in ep93xx_dma_prep_dma_cyclic()
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| /kernel/linux/linux-6.6/drivers/dma/ |
| D | fsl-edma-common.c | 14 #include "fsl-edma-common.h"
93 if (!edma_readl(fsl_chan->edma, fsl_chan->mux_addr)) in fsl_edma3_enable_request()
94 edma_writel(fsl_chan->edma, fsl_chan->srcid, fsl_chan->mux_addr); in fsl_edma3_enable_request()
104 struct edma_regs *regs = &fsl_chan->edma->regs; in fsl_edma_enable_request()
110 if (fsl_chan->edma->drvdata->flags & FSL_EDMA_DRV_WRAP_IO) { in fsl_edma_enable_request()
111 edma_writeb(fsl_chan->edma, EDMA_SEEI_SEEI(ch), regs->seei); in fsl_edma_enable_request()
112 edma_writeb(fsl_chan->edma, ch, regs->serq); in fsl_edma_enable_request()
130 edma_writel(fsl_chan->edma, 0, fsl_chan->mux_addr); in fsl_edma3_disable_request()
138 struct edma_regs *regs = &fsl_chan->edma->regs; in fsl_edma_disable_request()
144 if (fsl_chan->edma->drvdata->flags & FSL_EDMA_DRV_WRAP_IO) { in fsl_edma_disable_request()
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| D | mcf-edma-main.c | 10 #include <linux/platform_data/dma-mcf-edma.h>
12 #include "fsl-edma-common.h"
81 IORESOURCE_IRQ, "edma-tx-00-15"); in mcf_edma_irq_init()
86 ret |= request_irq(i, mcf_edma_tx_handler, 0, "eDMA", mcf_edma); in mcf_edma_irq_init()
91 IORESOURCE_IRQ, "edma-tx-16-55"); in mcf_edma_irq_init()
96 ret |= request_irq(i, mcf_edma_tx_handler, 0, "eDMA", mcf_edma); in mcf_edma_irq_init()
100 ret = platform_get_irq_byname(pdev, "edma-tx-56-63"); in mcf_edma_irq_init()
103 0, "eDMA", mcf_edma); in mcf_edma_irq_init()
108 ret = platform_get_irq_byname(pdev, "edma-err"); in mcf_edma_irq_init()
111 0, "eDMA", mcf_edma); in mcf_edma_irq_init()
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| D | fsl-edma-common.h | 138 struct fsl_edma_engine *edma; member
237 edma_readl(chan->edma, &chan->tcd->__name) : \
238 edma_readw(chan->edma, &chan->tcd->__name))
242 edma_writel(chan->edma, (u32 __force)val, &chan->tcd->__name) : \
243 edma_writew(chan->edma, (u16 __force)val, &chan->tcd->__name))
246 edma_readl(chan->edma, \
250 edma_writel(chan->edma, val, \
255 * The eDMA controller's endian is independent of the CPU core's endian.
259 static inline u32 edma_readl(struct fsl_edma_engine *edma, void __iomem *addr) in edma_readl() argument
261 if (edma->big_endian) in edma_readl()
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| D | fsl-edma-main.c | 3 * drivers/dma/fsl-edma.c
7 * Driver for the Freescale eDMA engine with flexible channel multiplexing
8 * capability for DMA request sources. The eDMA block can be found on some
12 #include <dt-bindings/dma/fsl-edma.h>
26 #include "fsl-edma-common.h"
191 fsl_edma->txirq = platform_get_irq_byname(pdev, "edma-tx"); in fsl_edma_irq_init()
195 fsl_edma->errirq = platform_get_irq_byname(pdev, "edma-err"); in fsl_edma_irq_init()
201 fsl_edma_irq_handler, 0, "eDMA", fsl_edma); in fsl_edma_irq_init()
203 dev_err(&pdev->dev, "Can't register eDMA IRQ.\n"); in fsl_edma_irq_init()
208 fsl_edma_tx_handler, 0, "eDMA tx", fsl_edma); in fsl_edma_irq_init()
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| D | Makefile | 32 obj-$(CONFIG_DW_EDMA) += dw-edma/
35 fsl-edma-objs := fsl-edma-main.o fsl-edma-common.o
36 obj-$(CONFIG_FSL_EDMA) += fsl-edma.o
37 mcf-edma-objs := mcf-edma-main.o fsl-edma-common.o
38 obj-$(CONFIG_MCF_EDMA) += mcf-edma.o
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| D | ep93xx_dma.c | 135 * @edma: pointer to the engine device
166 const struct ep93xx_dma_engine *edma; member
744 edmac->edma->hw_submit(edmac); in ep93xx_dma_advance_work()
802 switch (edmac->edma->hw_interrupt(edmac)) { in ep93xx_dma_interrupt()
850 edmac->edma->hw_submit(edmac); in ep93xx_dma_tx_submit()
875 if (!edmac->edma->m2m) { in ep93xx_dma_alloc_chan_resources()
910 ret = edmac->edma->hw_setup(edmac); in ep93xx_dma_alloc_chan_resources()
962 edmac->edma->hw_shutdown(edmac); in ep93xx_dma_free_chan_resources()
1044 if (!edmac->edma->m2m && dir != ep93xx_dma_chan_direction(chan)) { in ep93xx_dma_prep_slave_sg()
1125 if (!edmac->edma->m2m && dir != ep93xx_dma_chan_direction(chan)) { in ep93xx_dma_prep_dma_cyclic()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/ |
| D | fsl-edma.txt | 1 * Freescale enhanced Direct Memory Access(eDMA) Controller
3 The eDMA channels have multiplex capability by programmble memory-mapped
8 * eDMA Controller
11 - "fsl,vf610-edma" for eDMA used similar to that on Vybrid vf610 SoC
12 - "fsl,imx7ulp-edma" for eDMA2 used similar to that on i.mx7ulp
13 - "fsl,ls1028a-edma" followed by "fsl,vf610-edma" for eDMA used on the
15 - reg : Specifies base physical address(s) and size of the eDMA registers.
16 The 1st region is eDMA control register's address and size.
40 of the eDMA are implemented in big endian mode, otherwise in little
44 "edma-tx" - the transmission interrupt
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| D | ti-edma.txt | 1 Texas Instruments eDMA
20 - reg: Memory map of eDMA CC
24 - ti,tptcs: List of TPTCs associated with the eDMA in the following form:
30 - ti,hwmods: Name of the hwmods associated to the eDMA CC.
40 - ti,edma-memcpy-channels: List of channels allocated to be used for memcpy, iow
42 - ti,edma-reserved-slot-ranges: PaRAM slot ranges which should not be used by
46 Single uint32 for EDMA with 32 channels, array of two uint32 for
47 EDMA with 64 channels. See example and
61 - reg: Memory map of eDMA TC
67 - ti,hwmods: Name of the hwmods associated to the eDMA TC.
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/dma/ |
| D | ti-edma.txt | 1 Texas Instruments eDMA
20 - reg: Memory map of eDMA CC
24 - ti,tptcs: List of TPTCs associated with the eDMA in the following form:
30 - ti,hwmods: Name of the hwmods associated to the eDMA CC.
40 - ti,edma-memcpy-channels: List of channels allocated to be used for memcpy, iow
42 - ti,edma-reserved-slot-ranges: PaRAM slot ranges which should not be used by
46 Single uint32 for EDMA with 32 channels, array of two uint32 for
47 EDMA with 64 channels. See example and
61 - reg: Memory map of eDMA TC
67 - ti,hwmods: Name of the hwmods associated to the eDMA TC.
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| D | fsl,edma.yaml | 4 $id: http://devicetree.org/schemas/dma/fsl,edma.yaml#
7 title: Freescale enhanced Direct Memory Access(eDMA) Controller
10 The eDMA channels have multiplex capability by programmable
22 - fsl,vf610-edma
23 - fsl,imx7ulp-edma
25 - fsl,imx8qm-edma
29 - const: fsl,ls1028a-edma
30 - const: fsl,vf610-edma
64 eDMA are implemented in big endian mode, otherwise in little mode.
83 - fsl,imx8qm-edma
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| /kernel/linux/linux-5.10/drivers/dma/dw-edma/ |
| D | Makefile | 3 obj-$(CONFIG_DW_EDMA) += dw-edma.o
4 dw-edma-$(CONFIG_DEBUG_FS) := dw-edma-v0-debugfs.o
5 dw-edma-objs := dw-edma-core.o \
6 dw-edma-v0-core.o $(dw-edma-y)
7 obj-$(CONFIG_DW_EDMA_PCIE) += dw-edma-pcie.o
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| D | dw-edma-pcie.c | 4 * Synopsys DesignWare eDMA PCIe driver
13 #include <linux/dma/edma.h>
17 #include "dw-edma-core.h"
20 /* eDMA registers location */
24 /* eDMA memory linked list location */
28 /* eDMA memory data location */
39 /* eDMA registers location */
43 /* eDMA memory linked list location */
47 /* eDMA memory data location */
88 pci_err(pdev, "eDMA BAR I/O remapping failed\n"); in dw_edma_pcie_probe()
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| D | Kconfig | 4 tristate "Synopsys DesignWare eDMA controller driver"
9 Support the Synopsys DesignWare eDMA controller, normally
13 tristate "Synopsys DesignWare eDMA PCIe driver"
18 eDMA controller and an endpoint PCIe device. This also serves
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| /kernel/linux/linux-6.6/drivers/dma/dw-edma/ |
| D | Makefile | 3 obj-$(CONFIG_DW_EDMA) += dw-edma.o
4 dw-edma-$(CONFIG_DEBUG_FS) := dw-edma-v0-debugfs.o \
6 dw-edma-objs := dw-edma-core.o \
7 dw-edma-v0-core.o \
8 dw-hdma-v0-core.o $(dw-edma-y)
9 obj-$(CONFIG_DW_EDMA_PCIE) += dw-edma-pcie.o
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| /kernel/linux/linux-6.6/drivers/pci/controller/dwc/ |
| D | pcie-designware.c | 15 #include <linux/dma/edma.h>
129 /* For non-unrolled iATU/eDMA platforms this range will be ignored */ in dw_pcie_get_resources()
146 /* eDMA region can be mapped to a custom base address */ in dw_pcie_get_resources()
147 if (!pci->edma.reg_base) { in dw_pcie_get_resources()
150 pci->edma.reg_base = devm_ioremap_resource(pci->dev, res); in dw_pcie_get_resources()
151 if (IS_ERR(pci->edma.reg_base)) in dw_pcie_get_resources()
152 return PTR_ERR(pci->edma.reg_base); in dw_pcie_get_resources()
154 pci->edma.reg_base = pci->atu_base + DEFAULT_DBI_DMA_OFFSET; in dw_pcie_get_resources()
848 return pci->ops->read_dbi(pci, pci->edma.reg_base, reg, 4); in dw_pcie_readl_dma()
850 ret = dw_pcie_read(pci->edma.reg_base + reg, 4, &val); in dw_pcie_readl_dma()
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| /kernel/linux/linux-6.6/include/linux/dma/ |
| D | edma.h | 4 * Synopsys DesignWare eDMA core driver
30 * struct dw_edma_core_ops - platform-specific eDMA methods
31 * @irq_vector: Get IRQ number of the passed eDMA channel. Note the
33 * numbering with the eDMA write channels being placed
38 * the DW PCIe RP/EP controller with the DW eDMA device in
56 * enum dw_edma_chip_flags - Flags specific to an eDMA chip
57 * @DW_EDMA_CHIP_LOCAL: eDMA is used locally by an endpoint
64 * struct dw_edma_chip - representation of DesignWare eDMA controller hardware
65 * @dev: struct device of the eDMA controller
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | dm814x.dtsi | 268 dmas = <&edma 16 0 &edma 17 0
269 &edma 18 0 &edma 19 0
270 &edma 20 0 &edma 21 0
271 &edma 22 0 &edma 23 0>;
285 dmas = <&edma 42 0 &edma 43 0
286 &edma 44 0 &edma 45 0>;
290 /* Board must configure dmas with edma_xbar for EDMA */
343 dmas = <&edma 26 0 &edma 27 0>;
353 dmas = <&edma 28 0 &edma 29 0>;
363 dmas = <&edma 30 0 &edma 31 0>;
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| D | dm816x.dtsi | 153 edma: dma@0 { label
166 ti,edma-memcpy-channels = <20 21>;
300 dmas = <&edma 52 0>;
317 dmas = <&edma 58 0 &edma 59 0>;
328 dmas = <&edma 60 0 &edma 61 0>;
426 dmas = <&edma 16 0 &edma 17 0
427 &edma 18 0 &edma 19 0
428 &edma 20 0 &edma 21 0
429 &edma 22 0 &edma 23 0>;
439 dmas = <&edma 24 0 &edma 25 0>;
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/ |
| D | dm814x.dtsi | 267 dmas = <&edma 16 0 &edma 17 0
268 &edma 18 0 &edma 19 0
269 &edma 20 0 &edma 21 0
270 &edma 22 0 &edma 23 0>;
284 dmas = <&edma 42 0 &edma 43 0
285 &edma 44 0 &edma 45 0>;
289 /* Board must configure dmas with edma_xbar for EDMA */
342 dmas = <&edma 26 0 &edma 27 0>;
352 dmas = <&edma 28 0 &edma 29 0>;
362 dmas = <&edma 30 0 &edma 31 0>;
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| /kernel/linux/linux-5.10/arch/arm/mach-davinci/ |
| D | asp.h | 28 /* EDMA channels of dm644x and dm355 */
34 /* EDMA channels of dm646x */
39 /* EDMA channels of da850/da830 McASP0 */
43 /* EDMA channels of da830 McASP1 */
47 /* EDMA channels of da830 McASP2 */
|