| /kernel/linux/linux-5.10/drivers/net/ethernet/chelsio/cxgb3/ |
| D | vsc8211.c | 2 * Copyright (c) 2005-2008 Chelsio, Inc. All rights reserved.
14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
53 VSC_INTR_DESCRAMBL = 1 << 7, /* descrambler lock-lost */
60 VSC_INTR_ENABLE = 1 << 15, /* interrupt enable */
133 unsigned int bmcr, status, lpa, adv; in vsc8211_get_link_status() local
134 int err, sp = -1, dplx = -1, pause = 0; in vsc8211_get_link_status()
144 * BMSR_LSTATUS is latch-low, so if it is 0 we need to read it in vsc8211_get_link_status()
179 &lpa); in vsc8211_get_link_status()
186 if (lpa & adv & ADVERTISE_PAUSE_CAP) in vsc8211_get_link_status()
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| /kernel/linux/linux-6.6/drivers/net/ethernet/chelsio/cxgb3/ |
| D | vsc8211.c | 2 * Copyright (c) 2005-2008 Chelsio, Inc. All rights reserved.
14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
53 VSC_INTR_DESCRAMBL = 1 << 7, /* descrambler lock-lost */
60 VSC_INTR_ENABLE = 1 << 15, /* interrupt enable */
133 unsigned int bmcr, status, lpa, adv; in vsc8211_get_link_status() local
134 int err, sp = -1, dplx = -1, pause = 0; in vsc8211_get_link_status()
144 * BMSR_LSTATUS is latch-low, so if it is 0 we need to read it in vsc8211_get_link_status()
179 &lpa); in vsc8211_get_link_status()
186 if (lpa & adv & ADVERTISE_PAUSE_CAP) in vsc8211_get_link_status()
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| /kernel/linux/linux-5.10/drivers/net/phy/ |
| D | lxt.c | 1 // SPDX-License-Identifier: GPL-2.0+
34 #define MII_LXT970_IER 17 /* Interrupt Enable Register */
42 /* ------------------------------------------------------------------------- */
46 #define MII_LXT971_IER 18 /* Interrupt Enable Register */
78 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) in lxt970_config_intr()
102 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) in lxt971_config_intr()
132 } while (status >= 0 && retry-- && status == control); in lxt973a2_update_link()
138 phydev->link = 0; in lxt973a2_update_link()
140 phydev->link = 1; in lxt973a2_update_link()
149 int lpa; in lxt973a2_read_status() local
[all …]
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| D | meson-gxl.c | 1 // SPDX-License-Identifier: GPL-2.0+
52 /* Enable Analog and DSP register Bank access by in meson_gxl_open_banks()
124 /* Enable fractional PLL */ in meson_gxl_config_init()
145 * - Early failures: MII_LPA is just 0x0001. if MII_EXPANSION reports that
148 * - Late failures: MII_LPA is filled with a value which seems to make sense
150 * can detect this using a magic bit in the WOL bank (reg 12 - bit 12).
160 int ret, wol, lpa, exp; in meson_gxl_read_status() local
162 if (phydev->autoneg == AUTONEG_ENABLE) { in meson_gxl_read_status()
174 lpa = phy_read(phydev, MII_LPA); in meson_gxl_read_status()
175 if (lpa < 0) in meson_gxl_read_status()
[all …]
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| D | marvell.c | 1 // SPDX-License-Identifier: GPL-2.0+
126 /* Copper Specific Interrupt Enable Register */
128 /* WOL Event Interrupt Enable */
317 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) in marvell_config_intr()
369 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); in marvell_config_aneg()
384 if (phydev->autoneg != AUTONEG_ENABLE || changed) { in marvell_config_aneg()
434 * marvell,reg-init property stored in the of_node for the phydev.
436 * marvell,reg-init = <reg-page reg mask value>,...;
438 * There may be one or more sets of <reg-page reg mask value>:
440 * reg-page: which register bank to use.
[all …]
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| D | phy_device.c | 1 // SPDX-License-Identifier: GPL-2.0+
203 put_device(&phydev->mdio.dev); in phy_device_free()
235 struct device_driver *drv = phydev->mdio.dev.driver; in mdio_bus_phy_may_suspend()
237 struct net_device *netdev = phydev->attached_dev; in mdio_bus_phy_may_suspend()
239 if (!drv || !phydrv->suspend) in mdio_bus_phy_may_suspend()
243 * suspended as part of a prior call to phy_disconnect() -> in mdio_bus_phy_may_suspend()
244 * phy_detach() -> phy_suspend() because the parent netdev might be the in mdio_bus_phy_may_suspend()
250 if (netdev->wol_enabled) in mdio_bus_phy_may_suspend()
258 if (netdev->dev.parent && device_may_wakeup(netdev->dev.parent)) in mdio_bus_phy_may_suspend()
265 if (device_may_wakeup(&netdev->dev)) in mdio_bus_phy_may_suspend()
[all …]
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| /kernel/linux/linux-6.6/drivers/net/phy/ |
| D | lxt.c | 1 // SPDX-License-Identifier: GPL-2.0+
34 #define MII_LXT970_IER 17 /* Interrupt Enable Register */
44 /* ------------------------------------------------------------------------- */
48 #define MII_LXT971_IER 18 /* Interrupt Enable Register */
83 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in lxt970_config_intr()
147 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in lxt971_config_intr()
206 } while (status >= 0 && retry-- && status == control); in lxt973a2_update_link()
212 phydev->link = 0; in lxt973a2_update_link()
214 phydev->link = 1; in lxt973a2_update_link()
223 int lpa; in lxt973a2_read_status() local
[all …]
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| D | meson-gxl.c | 1 // SPDX-License-Identifier: GPL-2.0+
45 /* Enable Analog and DSP register Bank access by in meson_gxl_open_banks()
117 /* Enable fractional PLL */ in meson_gxl_config_init()
138 * - Early failures: MII_LPA is just 0x0001. if MII_EXPANSION reports that
141 * - Late failures: MII_LPA is filled with a value which seems to make sense
143 * can detect this using a magic bit in the WOL bank (reg 12 - bit 12).
153 int ret, wol, lpa, exp; in meson_gxl_read_status() local
155 if (phydev->autoneg == AUTONEG_ENABLE) { in meson_gxl_read_status()
167 lpa = phy_read(phydev, MII_LPA); in meson_gxl_read_status()
168 if (lpa < 0) in meson_gxl_read_status()
[all …]
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| D | motorcomm.c | 1 // SPDX-License-Identifier: GPL-2.0+
6 * Author: Frank <Frank.Sae@motor-comm.com>
22 * ------------------------------------------------------------
26 * ------------------------------------------------------------
28 * ------------------------------------------------------------
39 * 2b11 Enable automatic crossover for all modes *default*
67 /* Interrupt enable Register */
104 /* FIBER Auto-Negotiation link partner ability */
125 /* TX Gig-E Delay is bits 7:4, default 0x5
126 * TX Fast-E Delay is bits 15:12, default 0xf
[all …]
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| D | marvell.c | 1 // SPDX-License-Identifier: GPL-2.0+
142 /* Copper Specific Interrupt Enable Register */
144 /* WOL Event Interrupt Enable */
188 /* RGMII to 1000BASE-X */
190 /* RGMII to 100BASE-FX */
347 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in marvell_config_intr()
411 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); in marvell_config_aneg()
426 if (phydev->autoneg != AUTONEG_ENABLE || changed) { in marvell_config_aneg()
476 * marvell,reg-init property stored in the of_node for the phydev.
478 * marvell,reg-init = <reg-page reg mask value>,...;
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/ |
| D | fsl,rpmsg.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
18 Cortex-A and Cortex-M.
21 - $ref: sound-card-common.yaml#
26 - fsl,imx7ulp-rpmsg-audio
27 - fsl,imx8mn-rpmsg-audio
28 - fsl,imx8mm-rpmsg-audio
29 - fsl,imx8mp-rpmsg-audio
[all …]
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| /kernel/linux/linux-5.10/drivers/net/dsa/mv88e6xxx/ |
| D | serdes.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
53 u16 status, u16 lpa, in mv88e6xxx_serdes_pcs_get_state() argument
57 state->link = !!(status & MV88E6390_SGMII_PHY_STATUS_LINK); in mv88e6xxx_serdes_pcs_get_state()
58 state->duplex = status & in mv88e6xxx_serdes_pcs_get_state()
63 state->pause |= MLO_PAUSE_TX; in mv88e6xxx_serdes_pcs_get_state()
65 state->pause |= MLO_PAUSE_RX; in mv88e6xxx_serdes_pcs_get_state()
69 if (state->interface == PHY_INTERFACE_MODE_2500BASEX) in mv88e6xxx_serdes_pcs_get_state()
70 state->speed = SPEED_2500; in mv88e6xxx_serdes_pcs_get_state()
72 state->speed = SPEED_1000; in mv88e6xxx_serdes_pcs_get_state()
75 state->speed = SPEED_100; in mv88e6xxx_serdes_pcs_get_state()
[all …]
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| /kernel/linux/linux-5.10/arch/mips/include/asm/mach-loongson64/ |
| D | kernel-entry-init.h | 7 * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
22 /* Set LPA on LOONGSON3 config3 */
30 /* Enable STFill Buffer */
32 /* Loongson-3A R4+ */
37 /* Loongson-3A R2/R3 */
57 /* Set LPA on LOONGSON3 config3 */
65 /* Enable STFill Buffer */
67 /* Loongson-3A R4+ */
72 /* Loongson-3A R2/R3 */
|
| /kernel/linux/linux-6.6/drivers/net/dsa/mv88e6xxx/ |
| D | pcs-6352.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
43 mutex_lock(&mpcs->mdio.bus->mdio_lock); in marvell_c22_pcs_set_fiber_page()
45 err = __mdiodev_read(&mpcs->mdio, MII_MARVELL_PHY_PAGE); in marvell_c22_pcs_set_fiber_page()
47 dev_err(mpcs->mdio.dev.parent, in marvell_c22_pcs_set_fiber_page()
49 mpcs->name, ERR_PTR(err)); in marvell_c22_pcs_set_fiber_page()
55 err = __mdiodev_write(&mpcs->mdio, MII_MARVELL_PHY_PAGE, in marvell_c22_pcs_set_fiber_page()
58 dev_err(mpcs->mdio.dev.parent, in marvell_c22_pcs_set_fiber_page()
60 mpcs->name, ERR_PTR(err)); in marvell_c22_pcs_set_fiber_page()
73 err = __mdiodev_write(&mpcs->mdio, MII_MARVELL_PHY_PAGE, in marvell_c22_pcs_restore_page()
76 dev_err(mpcs->mdio.dev.parent, in marvell_c22_pcs_restore_page()
[all …]
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| D | pcs-639x.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
35 err = mdiodev_c45_read(&mpcs->mdio, MDIO_MMD_PHYXS, regnum); in mv88e639x_read()
46 return mdiodev_c45_write(&mpcs->mdio, MDIO_MMD_PHYXS, regnum, val); in mv88e639x_write()
52 return mdiodev_c45_modify(&mpcs->mdio, MDIO_MMD_PHYXS, regnum, mask, in mv88e639x_modify()
59 return mdiodev_c45_modify_changed(&mpcs->mdio, MDIO_MMD_PHYXS, regnum, in mv88e639x_modify_changed()
73 mpcs->mdio.dev.parent = dev; in mv88e639x_pcs_alloc()
74 mpcs->mdio.bus = bus; in mv88e639x_pcs_alloc()
75 mpcs->mdio.addr = addr; in mv88e639x_pcs_alloc()
77 snprintf(mpcs->name, sizeof(mpcs->name), in mv88e639x_pcs_alloc()
78 "mv88e6xxx-%s-serdes-%d", dev_name(dev), port); in mv88e639x_pcs_alloc()
[all …]
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| /kernel/linux/linux-6.6/drivers/net/pcs/ |
| D | pcs-xpcs.c | 1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/pcs/pcs-xpcs.h>
14 #include "pcs-xpcs.h"
167 const struct xpcs_compat *compat = &id->compat[i]; in xpcs_find_compat()
169 for (j = 0; j < compat->num_interfaces; j++) in xpcs_find_compat()
170 if (compat->interface[j] == interface) in xpcs_find_compat()
181 compat = xpcs_find_compat(xpcs->id, interface); in xpcs_get_an_mode()
183 return -ENODEV; in xpcs_get_an_mode()
185 return compat->an_mode; in xpcs_get_an_mode()
194 for (i = 0; compat->supported[i] != __ETHTOOL_LINK_MODE_MASK_NBITS; i++) in __xpcs_linkmode_supported()
[all …]
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| /kernel/linux/linux-5.10/include/linux/ |
| D | mdio.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2006-2009 Solarflare Communications Inc.
12 /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
44 /* Bus address of the MDIO device (0-31) */
69 * up device-specific structures, if any
85 dev_set_drvdata(&mdio->dev, data); in mdiodev_set_drvdata()
90 return dev_get_drvdata(&mdio->dev); in mdiodev_get_drvdata()
118 * struct mdio_if_info - Ethernet controller MDIO interface
121 * non-zero unless @prtad = %MDIO_PRTAD_NONE.
143 #define MDIO_PRTAD_NONE (-1)
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| /kernel/linux/linux-6.6/arch/parisc/include/asm/ |
| D | special_insns.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 #define lpa(va) ({ \ macro
35 #define CR_EIEM 15 /* External Interrupt Enable Mask */
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/dec/tulip/ |
| D | media.c | 5 Written/copyright 1994-2001 by Donald Becker.
21 met by back-to-back PCI I/O cycles, but we insert a delay to avoid
25 /* Read and write the MII registers using software-generated serial
41 Read and write the MII registers using software-generated serial
43 See IEEE 802.3-2002.pdf (Section 2, Chapter "22.2.4 Management functions")
53 void __iomem *ioaddr = tp->base_addr; in tulip_mdio_read()
60 if (tp->chip_id == COMET && phy_id == 30) { in tulip_mdio_read()
66 spin_lock_irqsave(&tp->mii_lock, flags); in tulip_mdio_read()
67 if (tp->chip_id == LC82C168) { in tulip_mdio_read()
71 for (i = 1000; i >= 0; --i) { in tulip_mdio_read()
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| /kernel/linux/linux-6.6/drivers/net/ethernet/dec/tulip/ |
| D | media.c | 5 Written/copyright 1994-2001 by Donald Becker.
21 met by back-to-back PCI I/O cycles, but we insert a delay to avoid
25 /* Read and write the MII registers using software-generated serial
41 Read and write the MII registers using software-generated serial
43 See IEEE 802.3-2002.pdf (Section 2, Chapter "22.2.4 Management functions")
53 void __iomem *ioaddr = tp->base_addr; in tulip_mdio_read()
60 if (tp->chip_id == COMET && phy_id == 30) { in tulip_mdio_read()
66 spin_lock_irqsave(&tp->mii_lock, flags); in tulip_mdio_read()
67 if (tp->chip_id == LC82C168) { in tulip_mdio_read()
71 for (i = 1000; i >= 0; --i) { in tulip_mdio_read()
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| /kernel/linux/linux-5.10/drivers/net/ethernet/sfc/falcon/ |
| D | tenxpress.c | 1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright 2007-2011 Solarflare Communications Inc.
150 /* Enable 312.5 MHz clock */ in tenxpress_init()
170 return -ENOMEM; in tenxpress_phy_probe()
171 efx->phy_data = phy_data; in tenxpress_phy_probe()
172 phy_data->phy_mode = efx->phy_mode; in tenxpress_phy_probe()
174 efx->mdio.mmds = TENXPRESS_REQUIRED_DEVS; in tenxpress_phy_probe()
175 efx->mdio.mode_support = MDIO_SUPPORTS_C45; in tenxpress_phy_probe()
177 efx->loopback_modes = SFX7101_LOOPBACKS | FALCON_XMAC_LOOPBACKS; in tenxpress_phy_probe()
179 efx->link_advertising = (ADVERTISED_TP | ADVERTISED_Autoneg | in tenxpress_phy_probe()
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| /kernel/linux/linux-6.6/drivers/net/ethernet/sfc/falcon/ |
| D | tenxpress.c | 1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright 2007-2011 Solarflare Communications Inc.
150 /* Enable 312.5 MHz clock */ in tenxpress_init()
170 return -ENOMEM; in tenxpress_phy_probe()
171 efx->phy_data = phy_data; in tenxpress_phy_probe()
172 phy_data->phy_mode = efx->phy_mode; in tenxpress_phy_probe()
174 efx->mdio.mmds = TENXPRESS_REQUIRED_DEVS; in tenxpress_phy_probe()
175 efx->mdio.mode_support = MDIO_SUPPORTS_C45; in tenxpress_phy_probe()
177 efx->loopback_modes = SFX7101_LOOPBACKS | FALCON_XMAC_LOOPBACKS; in tenxpress_phy_probe()
179 efx->link_advertising = (ADVERTISED_TP | ADVERTISED_Autoneg | in tenxpress_phy_probe()
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| /kernel/linux/linux-5.10/drivers/net/ethernet/stmicro/stmmac/ |
| D | stmmac_pcs.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
25 #define GMAC_AN_CTRL_RAN BIT(9) /* Restart Auto-Negotiation */
26 #define GMAC_AN_CTRL_ANE BIT(12) /* Auto-Negotiation Enable */
27 #define GMAC_AN_CTRL_ELE BIT(14) /* External Loopback Enable */
28 #define GMAC_AN_CTRL_ECD BIT(16) /* Enable Comma Detect */
34 #define GMAC_AN_STATUS_ANA BIT(3) /* Auto-Negotiation Ability */
35 #define GMAC_AN_STATUS_ANC BIT(5) /* Auto-Negotiation Complete */
38 /* ADV and LPA defines */
48 * dwmac_pcs_isr - TBI, RTBI, or SGMII PHY ISR
53 * Description: it is the ISR for PCS events: Auto-Negotiation Completed and
[all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/stmicro/stmmac/ |
| D | stmmac_pcs.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
25 #define GMAC_AN_CTRL_RAN BIT(9) /* Restart Auto-Negotiation */
26 #define GMAC_AN_CTRL_ANE BIT(12) /* Auto-Negotiation Enable */
27 #define GMAC_AN_CTRL_ELE BIT(14) /* External Loopback Enable */
28 #define GMAC_AN_CTRL_ECD BIT(16) /* Enable Comma Detect */
34 #define GMAC_AN_STATUS_ANA BIT(3) /* Auto-Negotiation Ability */
35 #define GMAC_AN_STATUS_ANC BIT(5) /* Auto-Negotiation Complete */
38 /* ADV and LPA defines */
48 * dwmac_pcs_isr - TBI, RTBI, or SGMII PHY ISR
53 * Description: it is the ISR for PCS events: Auto-Negotiation Completed and
[all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/sfc/siena/ |
| D | mcdi_port_common.c | 1 // SPDX-License-Identifier: GPL-2.0-only
23 BUILD_BUG_ON(MC_CMD_GET_PHY_CFG_OUT_NAME_LEN != sizeof(cfg->name)); in efx_mcdi_get_phy_cfg()
31 rc = -EIO; in efx_mcdi_get_phy_cfg()
35 cfg->flags = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_FLAGS); in efx_mcdi_get_phy_cfg()
36 cfg->type = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_TYPE); in efx_mcdi_get_phy_cfg()
37 cfg->supported_cap = in efx_mcdi_get_phy_cfg()
39 cfg->channel = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_CHANNEL); in efx_mcdi_get_phy_cfg()
40 cfg->port = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_PRT); in efx_mcdi_get_phy_cfg()
41 cfg->stats_mask = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_STATS_MASK); in efx_mcdi_get_phy_cfg()
42 memcpy(cfg->name, MCDI_PTR(outbuf, GET_PHY_CFG_OUT_NAME), in efx_mcdi_get_phy_cfg()
[all …]
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