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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/
Dqcom,pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15 - enum:
16 - qcom,sdx55-pcie-ep
17 - qcom,sm8450-pcie-ep
18 - items:
19 - const: qcom,sdx65-pcie-ep
[all …]
Dnvidia,tegra194-pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/nvidia,tegra194-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Vidya Sagar <vidyas@nvidia.com>
16 inherits all the common properties defined in snps,dw-pcie-ep.yaml. Some
23 Note: On Tegra194's P2972-0000 platform, only C5 controller can be enabled to
29 - nvidia,tegra194-pcie-ep
[all …]
Dti-pci.txt4 - compatible: Should be "ti,dra7-pcie" for RC (deprecated)
5 Should be "ti,dra7-pcie-ep" for EP (deprecated)
6 Should be "ti,dra746-pcie-rc" for dra74x/dra76 in RC mode
7 Should be "ti,dra746-pcie-ep" for dra74x/dra76 in EP mode
8 Should be "ti,dra726-pcie-rc" for dra72x in RC mode
9 Should be "ti,dra726-pcie-ep" for dra72x in EP mode
10 - phys : list of PHY specifiers (used by generic PHY framework)
11 - phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the
13 - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>",
15 - num-lanes as specified in ../snps,dw-pcie.yaml
[all …]
Drockchip,rk3399-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/rockchip,rk3399-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Lin <shawn.lin@rock-chips.com>
13 - $ref: /schemas/pci/pci-bus.yaml#
14 - $ref: rockchip,rk3399-pcie-common.yaml#
18 const: rockchip,rk3399-pcie
22 reg-names:
24 - const: axi-base
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/
Dnvidia,tegra194-pcie.txt4 and thus inherits all the common properties defined in designware-pcie.txt.
9 - power-domains: A phandle to the node that controls power to the respective
19 "include/dt-bindings/power/tegra194-powergate.h" file.
20 - reg: A list of physical base address and length pairs for each set of
21 controller registers. Must contain an entry for each entry in the reg-names
23 - reg-names: Must include the following entries:
25 "config": As per the definition in designware-pcie.txt
31 - interrupts: A list of interrupt outputs of the controller. Must contain an
32 entry for each entry in the interrupt-names property.
33 - interrupt-names: Must include the following entries:
[all …]
Dti-pci.txt4 - compatible: Should be "ti,dra7-pcie" for RC (deprecated)
5 Should be "ti,dra7-pcie-ep" for EP (deprecated)
6 Should be "ti,dra746-pcie-rc" for dra74x/dra76 in RC mode
7 Should be "ti,dra746-pcie-ep" for dra74x/dra76 in EP mode
8 Should be "ti,dra726-pcie-rc" for dra72x in RC mode
9 Should be "ti,dra726-pcie-ep" for dra72x in EP mode
10 - phys : list of PHY specifiers (used by generic PHY framework)
11 - phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the
13 - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>",
15 - num-lanes as specified in ../designware-pcie.txt
[all …]
Drockchip-pcie-host.txt4 - #address-cells: Address representation for root ports, set to <3>
5 - #size-cells: Size representation for root ports, set to <2>
6 - #interrupt-cells: specifies the number of cells needed to encode an
8 - compatible: Should contain "rockchip,rk3399-pcie"
9 - reg: Two register ranges as listed in the reg-names property
10 - reg-names: Must include the following names
11 - "axi-base"
12 - "apb-base"
13 - clocks: Must contain an entry for each entry in clock-names.
14 See ../clocks/clock-bindings.txt for details.
[all …]
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/
Dwarp.dts4 * Copyright (c) 2008-2009 PIKA Technologies
12 /dts-v1/;
15 #address-cells = <2>;
16 #size-cells = <1>;
19 dcr-parent = <&{/cpus/cpu@0}>;
27 #address-cells = <1>;
28 #size-cells = <0>;
32 model = "PowerPC,440EP";
34 clock-frequency = <0>; /* Filled in by zImage */
35 timebase-frequency = <0>; /* Filled in by zImage */
[all …]
Dhotfoot.dts4 * Copyright 2009 AbsoluteValue Systems <solomon@linux-wlan.com>
11 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
18 dcr-parent = <&{/cpus/cpu@0}>;
28 #address-cells = <1>;
29 #size-cells = <0>;
33 model = "PowerPC,405EP";
35 clock-frequency = <0>; /* Filled in by zImage */
36 timebase-frequency = <0>; /* Filled in by zImage */
[all …]
/kernel/linux/linux-6.6/arch/powerpc/boot/dts/
Dwarp.dts4 * Copyright (c) 2008-2009 PIKA Technologies
12 /dts-v1/;
15 #address-cells = <2>;
16 #size-cells = <1>;
19 dcr-parent = <&{/cpus/cpu@0}>;
27 #address-cells = <1>;
28 #size-cells = <0>;
32 model = "PowerPC,440EP";
34 clock-frequency = <0>; /* Filled in by zImage */
35 timebase-frequency = <0>; /* Filled in by zImage */
[all …]
Dhotfoot.dts4 * Copyright 2009 AbsoluteValue Systems <solomon@linux-wlan.com>
11 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
18 dcr-parent = <&{/cpus/cpu@0}>;
28 #address-cells = <1>;
29 #size-cells = <0>;
33 model = "PowerPC,405EP";
35 clock-frequency = <0>; /* Filled in by zImage */
36 timebase-frequency = <0>; /* Filled in by zImage */
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/qcom/
Dqcom-sdx55-telit-fn980-tlb.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
10 #include "qcom-sdx55.dtsi"
15 compatible = "qcom,sdx55-telit-fn980-tlb", "qcom,sdx55";
16 qcom,board-id = <0xb010008 0x0>;
23 stdout-path = "serial0:921600n8";
26 reserved-memory {
27 #address-cells = <1>;
[all …]
Dqcom-sdx65-mtp.dts1 // SPDX-License-Identifier: BSD-3-Clause
5 /dts-v1/;
7 #include "qcom-sdx65.dtsi"
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
15 compatible = "qcom,sdx65-mtp", "qcom,sdx65";
16 qcom,board-id = <0x2010008 0x302>;
23 stdout-path = "serial0:115200n8";
26 reserved-memory {
27 #address-cells = <1>;
28 #size-cells = <1>;
[all …]
/kernel/linux/linux-6.6/drivers/staging/media/atomisp/pci/
Datomisp_csi2_bridge.c1 // SPDX-License-Identifier: GPL-2.0
8 * Based on drivers/media/pci/intel/ipu3/cio2-bridge.c written by:
18 #include <media/ipu-bridge.h>
19 #include <media/v4l2-fwnode.h>
28 * 79234640-9e10-4fea-a5c1-b5aa8b19756f
52 * 822ace8f-2814-4174-a56b-5f029fe079ee
61 * dc2f6c4f-045b-4f1d-97b9-882a6860a4be
70 * 75c9a639-5c8a-4a00-9f48-a9c3b5da789f
94 * Once all sensors are moved to v4l2-async probing atomisp_gmin_platform.c can
114 DMI_MATCH(DMI_PRODUCT_VERSION, "MIIX 310-10"),
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/rockchip/
Drk3399-rock960.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include "rk3399-rock960.dtsi"
14 stdout-path = "serial2:1500000n8";
18 compatible = "gpio-leds";
19 pinctrl-names = "default";
20 pinctrl-0 = <&user_led1_pin>, <&user_led2_pin>,
24 user_led1: led-1 {
26 gpios = <&gpio4 RK_PC2 0>;
27 linux,default-trigger = "heartbeat";
[all …]
Drk3399-ficus.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 /dts-v1/;
10 #include "rk3399-rock960.dtsi"
17 stdout-path = "serial2:1500000n8";
20 clkin_gmac: external-gmac-clock {
21 compatible = "fixed-clock";
22 clock-frequency = <125000000>;
23 clock-output-names = "clkin_gmac";
24 #clock-cells = <0>;
28 compatible = "gpio-leds";
[all …]
Drk3399-khadas-edge-v.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include "rk3399-khadas-edge.dtsi"
11 model = "Khadas Edge-V";
12 compatible = "khadas,edge-v", "rockchip,rk3399";
24 ep-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
25 num-lanes = <4>;
Drk3399-khadas-edge-captain.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include "rk3399-khadas-edge.dtsi"
11 model = "Khadas Edge-Captain";
12 compatible = "khadas,edge-captain", "rockchip,rk3399";
24 ep-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
25 num-lanes = <4>;
Drk3399pro.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
17 ep-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
18 num-lanes = <4>;
19 pinctrl-names = "default";
20 pinctrl-0 = <&pcie_clkreqn_cpm>;
Drk3399-nanopc-t4.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * FriendlyElec NanoPC-T4 board device tree source
11 /dts-v1/;
12 #include "rk3399-nanopi4.dtsi"
15 model = "FriendlyElec NanoPC-T4";
16 compatible = "friendlyarm,nanopc-t4", "rockchip,rk3399";
18 vcc12v0_sys: vcc12v0-sys {
19 compatible = "regulator-fixed";
20 regulator-always-on;
21 regulator-boot-on;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/rockchip/
Drk3399-rock960.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include "rk3399-rock960.dtsi"
14 stdout-path = "serial2:1500000n8";
18 compatible = "gpio-leds";
19 pinctrl-names = "default";
20 pinctrl-0 = <&user_led1_pin>, <&user_led2_pin>,
24 user_led1: led-1 {
26 gpios = <&gpio4 RK_PC2 0>;
27 linux,default-trigger = "heartbeat";
[all …]
Drk3399-ficus.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 /dts-v1/;
10 #include "rk3399-rock960.dtsi"
17 stdout-path = "serial2:1500000n8";
20 clkin_gmac: external-gmac-clock {
21 compatible = "fixed-clock";
22 clock-frequency = <125000000>;
23 clock-output-names = "clkin_gmac";
24 #clock-cells = <0>;
28 compatible = "gpio-leds";
[all …]
Drk3399-khadas-edge-v.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include "rk3399-khadas-edge.dtsi"
11 model = "Khadas Edge-V";
12 compatible = "khadas,edge-v", "rockchip,rk3399";
24 ep-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
25 num-lanes = <4>;
Drk3399-khadas-edge-captain.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include "rk3399-khadas-edge.dtsi"
11 model = "Khadas Edge-Captain";
12 compatible = "khadas,edge-captain", "rockchip,rk3399";
24 ep-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
25 num-lanes = <4>;
Drk3399pro.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
17 ep-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
18 num-lanes = <4>;
19 pinctrl-names = "default";
20 pinctrl-0 = <&pcie_clkreqn_cpm>;

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