| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/mediatek/ |
| D | mediatek,ethsys.txt | 1 Mediatek ethsys controller 4 The Mediatek ethsys controller provides various clocks to the system. 9 - "mediatek,mt2701-ethsys", "syscon" 10 - "mediatek,mt7622-ethsys", "syscon" 11 - "mediatek,mt7623-ethsys", "mediatek,mt2701-ethsys", "syscon" 12 - "mediatek,mt7629-ethsys", "syscon" 13 - "mediatek,mt7981-ethsys", "syscon" 14 - "mediatek,mt7986-ethsys", "syscon" 18 The ethsys controller uses the common clk binding from 24 ethsys: clock-controller@1b000000 { [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/mediatek/ |
| D | mediatek,ethsys.txt | 1 Mediatek ethsys controller 4 The Mediatek ethsys controller provides various clocks to the system. 9 - "mediatek,mt2701-ethsys", "syscon" 10 - "mediatek,mt7622-ethsys", "syscon" 11 - "mediatek,mt7623-ethsys", "mediatek,mt2701-ethsys", "syscon" 12 - "mediatek,mt7629-ethsys", "syscon" 16 The ethsys controller uses the common clk binding from 22 ethsys: clock-controller@1b000000 { 23 compatible = "mediatek,mt2701-ethsys", "syscon";
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | mediatek-net.txt | 29 - resets: Should contain phandles to the ethsys reset signals 33 - mediatek,ethsys: phandle to the syscon node that handles the port setup 60 <ðsys CLK_ETHSYS_ESW>, 61 <ðsys CLK_ETHSYS_GP2>, 62 <ðsys CLK_ETHSYS_GP1>; 68 resets = <ðsys MT2701_ETHSYS_ETH_RST>; 70 mediatek,ethsys = <ðsys>;
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/ |
| D | mediatek,net.yaml | 52 mediatek,ethsys: 395 - mediatek,ethsys 417 <ðsys CLK_ETH_ESW_EN>, 418 <ðsys CLK_ETH_GP0_EN>, 419 <ðsys CLK_ETH_GP1_EN>, 420 <ðsys CLK_ETH_GP2_EN>, 432 mediatek,ethsys = <ðsys>; 497 clocks = <ðsys CLK_ETH_FE_EN>, 498 <ðsys CLK_ETH_GP2_EN>, 499 <ðsys CLK_ETH_GP1_EN>, [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | mt7629.dtsi | 432 ethsys: syscon@1b000000 { label 433 compatible = "mediatek,mt7629-ethsys", "syscon"; 447 <ðsys CLK_ETH_ESW_EN>, 448 <ðsys CLK_ETH_GP0_EN>, 449 <ðsys CLK_ETH_GP1_EN>, 450 <ðsys CLK_ETH_GP2_EN>, 451 <ðsys CLK_ETH_FE_EN>, 473 mediatek,ethsys = <ðsys>;
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| D | mt2701.dtsi | 720 ethsys: syscon@1b000000 { label 721 compatible = "mediatek,mt2701-ethsys", "syscon"; 734 <ðsys CLK_ETHSYS_ESW>, 735 <ðsys CLK_ETHSYS_GP1>, 736 <ðsys CLK_ETHSYS_GP2>, 739 resets = <ðsys MT2701_ETHSYS_FE_RST>, 740 <ðsys MT2701_ETHSYS_GMAC_RST>, 741 <ðsys MT2701_ETHSYS_PPE_RST>; 744 mediatek,ethsys = <ðsys>;
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| D | mt7623.dtsi | 906 ethsys: syscon@1b000000 { label 907 compatible = "mediatek,mt7623-ethsys", 908 "mediatek,mt2701-ethsys", 919 clocks = <ðsys CLK_ETHSYS_HSDMA>; 934 <ðsys CLK_ETHSYS_ESW>, 935 <ðsys CLK_ETHSYS_GP1>, 936 <ðsys CLK_ETHSYS_GP2>, 939 resets = <ðsys MT2701_ETHSYS_FE_RST>, 940 <ðsys MT2701_ETHSYS_GMAC_RST>, 941 <ðsys MT2701_ETHSYS_PPE_RST>; [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/mediatek/ |
| D | mt7629.dtsi | 430 ethsys: syscon@1b000000 { label 431 compatible = "mediatek,mt7629-ethsys", "syscon"; 445 <ðsys CLK_ETH_ESW_EN>, 446 <ðsys CLK_ETH_GP0_EN>, 447 <ðsys CLK_ETH_GP1_EN>, 448 <ðsys CLK_ETH_GP2_EN>, 449 <ðsys CLK_ETH_FE_EN>, 471 mediatek,ethsys = <ðsys>;
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| D | mt2701.dtsi | 720 ethsys: syscon@1b000000 { label 721 compatible = "mediatek,mt2701-ethsys", "syscon"; 734 <ðsys CLK_ETHSYS_ESW>, 735 <ðsys CLK_ETHSYS_GP1>, 736 <ðsys CLK_ETHSYS_GP2>, 739 resets = <ðsys MT2701_ETHSYS_FE_RST>, 740 <ðsys MT2701_ETHSYS_GMAC_RST>, 741 <ðsys MT2701_ETHSYS_PPE_RST>; 744 mediatek,ethsys = <ðsys>;
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| D | mt7623.dtsi | 940 ethsys: syscon@1b000000 { label 941 compatible = "mediatek,mt7623-ethsys", 942 "mediatek,mt2701-ethsys", 953 clocks = <ðsys CLK_ETHSYS_HSDMA>; 968 <ðsys CLK_ETHSYS_ESW>, 969 <ðsys CLK_ETHSYS_GP1>, 970 <ðsys CLK_ETHSYS_GP2>, 973 resets = <ðsys MT2701_ETHSYS_FE_RST>, 974 <ðsys MT2701_ETHSYS_GMAC_RST>, 975 <ðsys MT2701_ETHSYS_PPE_RST>; [all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/mediatek/ |
| D | mtk_eth_path.c | 134 regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); in set_mux_gmac1_gmac2_to_sgmii_rgmii() 149 regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, in set_mux_gmac1_gmac2_to_sgmii_rgmii() 163 regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); in set_mux_gmac12_to_gephy_sgmii() 180 regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, in set_mux_gmac12_to_gephy_sgmii()
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| /kernel/linux/linux-6.6/drivers/net/ethernet/mediatek/ |
| D | mtk_eth_path.c | 144 regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); in set_mux_gmac1_gmac2_to_sgmii_rgmii() 159 regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, in set_mux_gmac1_gmac2_to_sgmii_rgmii() 173 regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); in set_mux_gmac12_to_gephy_sgmii() 190 regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, in set_mux_gmac12_to_gephy_sgmii()
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/mediatek/ |
| D | mt7986a.dtsi | 490 ethsys: syscon@15000000 { label 491 compatible = "mediatek,mt7986-ethsys", 531 clocks = <ðsys CLK_ETH_FE_EN>, 532 <ðsys CLK_ETH_GP2_EN>, 533 <ðsys CLK_ETH_GP1_EN>, 534 <ðsys CLK_ETH_WOCPU1_EN>, 535 <ðsys CLK_ETH_WOCPU0_EN>, 558 mediatek,ethsys = <ðsys>;
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| D | mt7622.dtsi | 925 ethsys: clock-controller@1b000000 { label 926 compatible = "mediatek,mt7622-ethsys", 937 clocks = <ðsys CLK_ETH_HSDMA_EN>; 971 <ðsys CLK_ETH_ESW_EN>, 972 <ðsys CLK_ETH_GP0_EN>, 973 <ðsys CLK_ETH_GP1_EN>, 974 <ðsys CLK_ETH_GP2_EN>, 986 mediatek,ethsys = <ðsys>;
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| /kernel/linux/linux-5.10/drivers/clk/mediatek/ |
| D | Kconfig | 47 bool "Clock driver for MediaTek MT2701 ethsys" 50 This driver supports MediaTek MT2701 ethsys clocks. 304 bool "Clock driver for MediaTek MT7622 ETHSYS" 334 bool "Clock driver for MediaTek MT7629 ETHSYS"
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/mediatek/ |
| D | mt7622.dtsi | 896 ethsys: syscon@1b000000 { label 897 compatible = "mediatek,mt7622-ethsys", 908 clocks = <ðsys CLK_ETH_HSDMA_EN>; 923 <ðsys CLK_ETH_ESW_EN>, 924 <ðsys CLK_ETH_GP0_EN>, 925 <ðsys CLK_ETH_GP1_EN>, 926 <ðsys CLK_ETH_GP2_EN>, 938 mediatek,ethsys = <ðsys>;
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| /kernel/linux/linux-6.6/drivers/clk/mediatek/ |
| D | Kconfig | 54 bool "Clock driver for MediaTek MT2701 ethsys" 57 This driver supports MediaTek MT2701 ethsys clocks. 349 tristate "Clock driver for MediaTek MT7622 ETHSYS" 379 bool "Clock driver for MediaTek MT7629 ETHSYS" 402 tristate "Clock driver for MediaTek MT7981 ETHSYS" 419 tristate "Clock driver for MediaTek MT7986 ETHSYS"
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| /kernel/linux/linux-5.10/drivers/staging/mt7621-dts/ |
| D | mt7621.dtsi | 390 ethsys: syscon@1e000000 { label 391 compatible = "mediatek,mt7621-ethsys", 413 mediatek,ethsys = <ðsys>;
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/crypto/ |
| D | mediatek-crypto.txt | 22 clocks = <ðsys CLK_ETHSYS_CRYPTO>;
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/crypto/ |
| D | mediatek-crypto.txt | 22 clocks = <ðsys CLK_ETHSYS_CRYPTO>;
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| /kernel/linux/linux-6.6/include/dt-bindings/reset/ |
| D | mt7986-resets.h | 46 /* ETHSYS Subsystem resets */
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| D | mt2701-resets.h | 75 /* ETHSYS resets */
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/ |
| D | mtk-hsdma.txt | 27 clocks = <ðsys CLK_ETHSYS_HSDMA>;
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/dma/ |
| D | mtk-hsdma.txt | 27 clocks = <ðsys CLK_ETHSYS_HSDMA>;
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| /kernel/linux/linux-5.10/include/dt-bindings/reset/ |
| D | mt2701-resets.h | 75 /* ETHSYS resets */
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