| /kernel/linux/linux-6.6/drivers/hwtracing/coresight/ |
| D | coresight-tmc.h | 116 /* TMC ETR Capability bit definitions */
118 /* ETR has separate read/write cache encodings */
130 /* Coresight SoC-600 TMC-ETR unadvertised capabilities */
136 ETR_MODE_ETR_SG, /* Uses in-built TMC ETR SG mechanism */
143 * struct etr_buf - Details of the buffer used by ETR
145 * @mode : Mode of the ETR buffer, contiguous, Scatter Gather etc.
151 * @ops : ETR buffer operations for the mode.
175 * @etr_buf: details of buffer used in TMC-ETR
179 * TMC-ETR on AXI bus.
184 * @etr_caps: Bitmask of capabilities of the TMC ETR, inferred from the
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| D | coresight-tmc-etr.c | 30 * etr_perf_buffer - Perf buffer used for ETR
31 * @drvdata - The ETR drvdaga this buffer has been allocated for.
32 * @etr_buf - Actual buffer used by the ETR
47 /* Convert the perf index to an offset within the ETR buffer */
51 /* Lower limit for ETR hardware buffer */
55 * The TMC ETR SG has a page size of 4K. The SG table contains pointers
100 * struct etr_sg_table : ETR SG Table
553 * tmc_init_etr_sg_table: Allocate a TMC ETR SG table, data buffer of @size and
770 * TMC ETR could be connected to a CATU device, which can provide address
772 * (ETR) connected to the input port of the CATU.
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| D | Kconfig | 41 trace router - ETR) or sink (embedded trace FIFO). The driver
54 lookup. CATU helps TMC ETR to use a large physically non-contiguous trace
55 buffer by translating the addresses used by ETR to the physical address
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| D | Makefile | 12 coresight-tmc-etr.o
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| /kernel/linux/linux-5.10/drivers/hwtracing/coresight/ |
| D | coresight-tmc.h | 115 /* TMC ETR Capability bit definitions */
117 /* ETR has separate read/write cache encodings */
129 /* Coresight SoC-600 TMC-ETR unadvertised capabilities */
135 ETR_MODE_ETR_SG, /* Uses in-built TMC ETR SG mechanism */
142 * struct etr_buf - Details of the buffer used by ETR
144 * @mode : Mode of the ETR buffer, contiguous, Scatter Gather etc.
150 * @ops : ETR buffer operations for the mode.
174 * @etr_buf: details of buffer used in TMC-ETR
181 * @etr_caps: Bitmask of capabilities of the TMC ETR, inferred from the
183 * @idr: Holds etr_bufs allocated for this ETR.
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| D | coresight-tmc-etr.c | 30 * etr_perf_buffer - Perf buffer used for ETR
31 * @drvdata - The ETR drvdaga this buffer has been allocated for.
32 * @etr_buf - Actual buffer used by the ETR
49 /* Convert the perf index to an offset within the ETR buffer */
53 /* Lower limit for ETR hardware buffer */
57 * The TMC ETR SG has a page size of 4K. The SG table contains pointers
102 * struct etr_sg_table : ETR SG Table
555 * tmc_init_etr_sg_table: Allocate a TMC ETR SG table, data buffer of @size and
753 * TMC ETR could be connected to a CATU device, which can provide address
755 * (ETR) connected to the input port of the CATU.
[all …]
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| D | Kconfig | 40 trace router - ETR) or sink (embedded trace FIFO). The driver
53 lookup. CATU helps TMC ETR to use a large physically non-contiguous trace
54 buffer by translating the addresses used by ETR to the physical address
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| D | Makefile | 10 coresight-tmc-etr.o
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/ |
| D | arm,coresight-tmc.yaml | 24 FIFO(ETF) and Embedded Trace Router(ETR) configurations. The configuration
25 mode (ETB, ETF, ETR) is discovered at boot time when the device is probed.
68 Size of contiguous buffer space for TMC ETR (embedded trace router). The
75 Indicates that the TMC-ETR can safely use the SG mode on this system.
100 description: AXI or ATB Master output connection. Used for ETR
115 etr@20070000 {
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/regulator/ |
| D | maxim,max8973.yaml | 74 maxim,enable-etr:
78 maxim,enable-high-etr-sensitivity:
82 sensitivity. If this property is available then etr will be enable
84 Enhanced transient response (ETR) will affect the configuration of CKADV.
137 maxim,enable-etr;
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/regulator/ |
| D | max8973-regulator.txt | 28 -maxim,enable-etr: boolean, enable Enhanced Transient Response.
29 -maxim,enable-high-etr-sensitivity: boolean, Enhanced transient response
31 property is available then etr will be enable default.
33 Enhanced transient response (ETR) will affect the configuration of CKADV.
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/ |
| D | coresight.txt | 23 Embedded Trace FIFO(ETF) and Embedded Trace Router(ETR)
24 configuration. The configuration mode (ETB, ETF, ETR) is
120 * arm,buffer-size: size of contiguous buffer space for TMC ETR
124 * arm,scatter-gather: boolean. Indicates that the TMC-ETR can safely
184 etr@20070000 {
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| /kernel/linux/linux-6.6/drivers/accel/habanalabs/gaudi/ |
| D | gaudi_coresight.c | 538 "ETR buffer address shouldn't exceed 50 bits\n"); in gaudi_etr_validate_address()
544 "ETR buffer size %llu overflow\n", size); in gaudi_etr_validate_address()
568 dev_err(hdev->dev, "ETR buffer should be in SRAM/DRAM\n"); in gaudi_etr_validate_address()
591 dev_err(hdev->dev, "Failed to %s ETR on timeout, error %d\n", in gaudi_config_etr()
598 dev_err(hdev->dev, "Failed to %s ETR on timeout, error %d\n", in gaudi_config_etr()
615 "ETR buffer size should be bigger than 0\n"); in gaudi_config_etr()
622 dev_err(hdev->dev, "ETR buffer address is invalid\n"); in gaudi_config_etr()
634 /* make ETR not privileged */ in gaudi_config_etr()
637 /* make ETR non-secured (inverted logic) */ in gaudi_config_etr()
905 dev_err(hdev->dev, "halt ETR failed, %d\n", rc); in gaudi_halt_coresight()
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| /kernel/linux/linux-6.6/drivers/accel/habanalabs/goya/ |
| D | goya_coresight.c | 370 "ETR buffer size %llu overflow\n", size); in goya_etr_validate_address()
397 dev_err(hdev->dev, "Failed to %s ETR on timeout, error %d\n", in goya_config_etr()
404 dev_err(hdev->dev, "Failed to %s ETR on timeout, error %d\n", in goya_config_etr()
419 "ETR buffer size should be bigger than 0\n"); in goya_config_etr()
433 /* make ETR not privileged */ in goya_config_etr()
435 /* make ETR non-secured (inverted logic) */ in goya_config_etr()
703 dev_err(hdev->dev, "halt ETR failed, %d\n", rc); in goya_halt_coresight()
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| /kernel/linux/linux-5.10/drivers/misc/habanalabs/gaudi/ |
| D | gaudi_coresight.c | 539 "ETR buffer address shouldn't exceed 50 bits\n"); in gaudi_etr_validate_address()
545 "ETR buffer size %llu overflow\n", size); in gaudi_etr_validate_address()
569 dev_err(hdev->dev, "ETR buffer should be in SRAM/DRAM\n"); in gaudi_etr_validate_address()
592 dev_err(hdev->dev, "Failed to %s ETR on timeout, error %d\n", in gaudi_config_etr()
599 dev_err(hdev->dev, "Failed to %s ETR on timeout, error %d\n", in gaudi_config_etr()
616 "ETR buffer size should be bigger than 0\n"); in gaudi_config_etr()
623 dev_err(hdev->dev, "ETR buffer address is invalid\n"); in gaudi_config_etr()
899 dev_err(hdev->dev, "halt ETR failed, %d\n", rc); in gaudi_halt_coresight()
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| /kernel/linux/linux-5.10/Documentation/ABI/testing/ |
| D | sysfs-bus-coresight-devices-tmc | 91 Description: (RW) Size of the trace buffer for TMC-ETR when used in SYSFS
92 mode. Writable only for TMC-ETR configurations. The value
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| /kernel/linux/linux-6.6/Documentation/ABI/testing/ |
| D | sysfs-bus-coresight-devices-tmc | 91 Description: (RW) Size of the trace buffer for TMC-ETR when used in SYSFS
92 mode. Writable only for TMC-ETR configurations. The value
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| /kernel/linux/linux-5.10/drivers/misc/habanalabs/goya/ |
| D | goya_coresight.c | 372 "ETR buffer size %llu overflow\n", size); in goya_etr_validate_address()
404 dev_err(hdev->dev, "Failed to %s ETR on timeout, error %d\n", in goya_config_etr()
411 dev_err(hdev->dev, "Failed to %s ETR on timeout, error %d\n", in goya_config_etr()
426 "ETR buffer size should be bigger than 0\n"); in goya_config_etr()
703 dev_err(hdev->dev, "halt ETR failed, %d\n", rc); in goya_halt_coresight()
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| /kernel/linux/linux-5.10/include/dt-bindings/memory/ |
| D | tegra186-mc.h | 191 /* ETR reads */
193 /* ETR writes */
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| /kernel/linux/linux-6.6/include/dt-bindings/memory/ |
| D | tegra186-mc.h | 191 /* ETR reads */
193 /* ETR writes */
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| /kernel/linux/linux-6.6/drivers/accel/habanalabs/include/gaudi/asic_reg/ |
| D | psoc_etr_regs.h | 18 * PSOC_ETR (Prototype: ETR)
|
| /kernel/linux/linux-6.6/drivers/accel/habanalabs/include/goya/asic_reg/ |
| D | psoc_etr_regs.h | 18 * PSOC_ETR (Prototype: ETR)
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| /kernel/linux/linux-5.10/drivers/misc/habanalabs/include/goya/asic_reg/ |
| D | psoc_etr_regs.h | 18 * PSOC_ETR (Prototype: ETR)
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| /kernel/linux/linux-5.10/drivers/misc/habanalabs/include/gaudi/asic_reg/ |
| D | psoc_etr_regs.h | 18 * PSOC_ETR (Prototype: ETR)
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| /kernel/linux/linux-6.6/drivers/accel/habanalabs/include/gaudi2/asic_reg/ |
| D | psoc_etr_regs.h | 19 * (Prototype: ETR)
|