| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | exynos5410-clock.txt | 1 * Samsung Exynos5410 Clock Controller
3 The Exynos5410 clock controller generates and supplies clock to various
4 controllers within the Exynos5410 SoC.
8 - compatible: should be "samsung,exynos5410-clock"
10 - reg: physical base address of the controller and length of memory mapped
13 - #clock-cells: should be 1.
15 - clocks: should contain an entry specifying the root clock from external
16 oscillator supplied through XXTI or XusbXTI pin. This clock should be
17 defined using standard clock bindings with "fin_pll" clock-output-name.
18 That clock is being passed internally to the 9 PLLs.
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| D | clk-exynos-audss.txt | 1 * Samsung Audio Subsystem Clock Controller
3 The Samsung Audio Subsystem clock controller generates and supplies clocks
4 to Audio Subsystem block available in the S5PV210 and Exynos SoCs. The clock
9 - compatible: should be one of the following:
10 - "samsung,exynos4210-audss-clock" - controller compatible with all Exynos4 SoCs.
11 - "samsung,exynos5250-audss-clock" - controller compatible with Exynos5250
13 - "samsung,exynos5410-audss-clock" - controller compatible with Exynos5410
15 - "samsung,exynos5420-audss-clock" - controller compatible with Exynos5420
17 - reg: physical base address and length of the controller's register set.
19 - #clock-cells: should be 1.
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ |
| D | samsung,exynos5410-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/samsung,exynos5410-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos5410 SoC clock controller
10 - Chanwoo Choi <cw00.choi@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
13 - Tomasz Figa <tomasz.figa@gmail.com>
16 Expected external clocks, defined in DTS as fixed-rate clocks with a matching
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| D | samsung,exynos-audss-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/samsung,exynos-audss-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos SoC Audio SubSystem clock controller
10 - Chanwoo Choi <cw00.choi@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
13 - Tomasz Figa <tomasz.figa@gmail.com>
17 include/dt-bindings/clock/exynos-audss-clk.h header.
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/samsung/ |
| D | exynos5410.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung Exynos5410 SoC device tree source
8 * Samsung Exynos5410 SoC device nodes are listed in this file.
9 * Exynos5410 based board files can include this file and provide
14 #include <dt-bindings/clock/exynos5410.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
19 compatible = "samsung,exynos5410", "samsung,exynos5";
20 interrupt-parent = <&gic>;
30 #address-cells = <1>;
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| D | exynos5410-smdk5410.dts | 1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include "exynos5410.dtsi"
11 #include <dt-bindings/interrupt-controller/irq.h>
13 model = "Samsung SMDK5410 board based on Exynos5410";
14 compatible = "samsung,smdk5410", "samsung,exynos5410", "samsung,exynos5";
27 stdout-path = "serial2:115200n8";
31 compatible = "fixed-clock";
32 clock-frequency = <24000000>;
33 clock-output-names = "fin_pll";
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| D | exynos5410-odroidxu.dts | 1 // SPDX-License-Identifier: GPL-2.0
10 /dts-v1/;
11 #include "exynos5410.dtsi"
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos54xx-odroidxu-leds.dtsi"
20 compatible = "hardkernel,odroid-xu", "samsung,exynos5410", "samsung,exynos5";
34 stdout-path = "serial2:115200n8";
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | exynos5410.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung Exynos5410 SoC device tree source
8 * Samsung Exynos5410 SoC device nodes are listed in this file.
9 * Exynos5410 based board files can include this file and provide
14 #include <dt-bindings/clock/exynos5410.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
19 compatible = "samsung,exynos5410", "samsung,exynos5";
20 interrupt-parent = <&gic>;
30 #address-cells = <1>;
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| D | exynos5410-smdk5410.dts | 1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include "exynos5410.dtsi"
11 #include <dt-bindings/interrupt-controller/irq.h>
13 model = "Samsung SMDK5410 board based on Exynos5410";
14 compatible = "samsung,smdk5410", "samsung,exynos5410", "samsung,exynos5";
22 stdout-path = "serial2:115200n8";
26 compatible = "fixed-clock";
27 clock-frequency = <24000000>;
28 clock-output-names = "fin_pll";
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| D | exynos5410-odroidxu.dts | 1 // SPDX-License-Identifier: GPL-2.0
10 /dts-v1/;
11 #include "exynos5410.dtsi"
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos54xx-odroidxu-leds.dtsi"
20 compatible = "hardkernel,odroid-xu", "samsung,exynos5410", "samsung,exynos5";
28 stdout-path = "serial2:115200n8";
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/samsung/ |
| D | pmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
18 - samsung,exynos3250-pmu
19 - samsung,exynos4210-pmu
20 - samsung,exynos4412-pmu
21 - samsung,exynos5250-pmu
22 - samsung,exynos5260-pmu
23 - samsung,exynos5410-pmu
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/samsung/ |
| D | exynos-pmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/soc/samsung/exynos-pmu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
18 - samsung,exynos3250-pmu
19 - samsung,exynos4210-pmu
20 - samsung,exynos4212-pmu
21 - samsung,exynos4412-pmu
22 - samsung,exynos5250-pmu
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| /kernel/linux/linux-6.6/drivers/clk/samsung/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
4 bool "Samsung Exynos clock controller support" if COMPILE_TEST
18 bool "Samsung S3C64xx clock controller support" if COMPILE_TEST
21 Support for the clock controller present on the Samsung S3C64xx SoCs.
25 bool "Samsung S5Pv210 clock controller support" if COMPILE_TEST
28 Support for the clock controller present on the Samsung S5Pv210 SoCs.
32 bool "Samsung Exynos3250 clock controller support" if COMPILE_TEST
35 Support for the clock controller present on the Samsung
39 bool "Samsung Exynos4 clock controller support" if COMPILE_TEST
42 Support for the clock controller present on the Samsung
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| D | clk-exynos5410.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 * Common Clock Framework support for Exynos5410 SoC.
9 #include <dt-bindings/clock/exynos5410.h>
11 #include <linux/clk-provider.h>
59 /* NOTE: Must be equal to the last clock ID increased by one */
269 /* register exynos5410 clocks */
279 pr_debug("Exynos5410: clock setup completed.\n"); in exynos5410_clk_init()
281 CLK_OF_DECLARE(exynos5410_clk, "samsung,exynos5410-clock", exynos5410_clk_init);
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| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
3 # Samsung Clock specific Makefile
6 obj-$(CONFIG_COMMON_CLK) += clk.o clk-pll.o clk-cpu.o
7 obj-$(CONFIG_EXYNOS_3250_COMMON_CLK) += clk-exynos3250.o
8 obj-$(CONFIG_EXYNOS_4_COMMON_CLK) += clk-exynos4.o
9 obj-$(CONFIG_EXYNOS_4_COMMON_CLK) += clk-exynos4412-isp.o
10 obj-$(CONFIG_EXYNOS_5250_COMMON_CLK) += clk-exynos5250.o
11 obj-$(CONFIG_EXYNOS_5250_COMMON_CLK) += clk-exynos5-subcmu.o
12 obj-$(CONFIG_EXYNOS_5260_COMMON_CLK) += clk-exynos5260.o
13 obj-$(CONFIG_EXYNOS_5410_COMMON_CLK) += clk-exynos5410.o
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| D | clk-exynos-clkout.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 * Clock driver for Exynos clock output
11 #include <linux/clk-provider.h>
53 .compatible = "samsung,exynos3250-pmu",
56 .compatible = "samsung,exynos4210-pmu",
59 .compatible = "samsung,exynos4212-pmu",
62 .compatible = "samsung,exynos4412-pmu",
65 .compatible = "samsung,exynos5250-pmu",
68 .compatible = "samsung,exynos5410-pmu",
71 .compatible = "samsung,exynos5420-pmu",
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| D | clk-exynos-audss.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 * Common Clock Framework support for Audio Subsystem Clock Controller.
12 #include <linux/clk-provider.h>
18 #include <dt-bindings/clock/exynos-audss-clk.h>
24 * On Exynos5420 this will be a clock which has to be enabled before any
27 * On other platforms this will be -ENODEV.
69 .num_clks = EXYNOS_AUDSS_MAX_CLKS - 1,
74 .num_clks = EXYNOS_AUDSS_MAX_CLKS - 1,
86 .compatible = "samsung,exynos4210-audss-clock",
89 .compatible = "samsung,exynos5250-audss-clock",
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/exynos/ |
| D | exynos_dsim.txt | 4 - compatible: value should be one of the following
5 "samsung,exynos3250-mipi-dsi" /* for Exynos3250/3472 SoCs */
6 "samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */
7 "samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */
8 "samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */
9 "samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */
10 - reg: physical base address and length of the registers set for the device
11 - interrupts: should contain DSI interrupt
12 - clocks: list of clock specifiers, must contain an entry for each required
13 entry in clock-names
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| /kernel/linux/linux-5.10/drivers/clk/samsung/ |
| D | clk-exynos5410.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 * Common Clock Framework support for Exynos5410 SoC.
9 #include <dt-bindings/clock/exynos5410.h>
11 #include <linux/clk-provider.h>
266 /* register exynos5410 clocks */
276 pr_debug("Exynos5410: clock setup completed.\n"); in exynos5410_clk_init()
278 CLK_OF_DECLARE(exynos5410_clk, "samsung,exynos5410-clock", exynos5410_clk_init);
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| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
3 # Samsung Clock specific Makefile
6 obj-$(CONFIG_COMMON_CLK) += clk.o clk-pll.o clk-cpu.o
7 obj-$(CONFIG_SOC_EXYNOS3250) += clk-exynos3250.o
8 obj-$(CONFIG_ARCH_EXYNOS4) += clk-exynos4.o
9 obj-$(CONFIG_ARCH_EXYNOS4) += clk-exynos4412-isp.o
10 obj-$(CONFIG_SOC_EXYNOS5250) += clk-exynos5250.o
11 obj-$(CONFIG_SOC_EXYNOS5250) += clk-exynos5-subcmu.o
12 obj-$(CONFIG_SOC_EXYNOS5260) += clk-exynos5260.o
13 obj-$(CONFIG_SOC_EXYNOS5410) += clk-exynos5410.o
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| D | clk-exynos-clkout.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 * Clock driver for Exynos clock output
11 #include <linux/clk-provider.h>
39 clkout->pmu_debug_save = readl(clkout->reg + EXYNOS_PMU_DEBUG_REG); in exynos_clkout_suspend()
46 writel(clkout->pmu_debug_save, clkout->reg + EXYNOS_PMU_DEBUG_REG); in exynos_clkout_resume()
67 spin_lock_init(&clkout->slock); in exynos_clkout_init()
87 clkout->reg = of_iomap(node, 0); in exynos_clkout_init()
88 if (!clkout->reg) in exynos_clkout_init()
91 clkout->gate.reg = clkout->reg + EXYNOS_PMU_DEBUG_REG; in exynos_clkout_init()
92 clkout->gate.bit_idx = EXYNOS_CLKOUT_DISABLE_SHIFT; in exynos_clkout_init()
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| D | clk-exynos-audss.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 * Common Clock Framework support for Audio Subsystem Clock Controller.
12 #include <linux/clk-provider.h>
19 #include <dt-bindings/clock/exynos-audss-clk.h>
25 * On Exynos5420 this will be a clock which has to be enabled before any
28 * On other platforms this will be -ENODEV.
70 .num_clks = EXYNOS_AUDSS_MAX_CLKS - 1,
75 .num_clks = EXYNOS_AUDSS_MAX_CLKS - 1,
87 .compatible = "samsung,exynos4210-audss-clock",
90 .compatible = "samsung,exynos5250-audss-clock",
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/bridge/ |
| D | samsung,mipi-dsim.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/samsung,mipi-dsim.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inki Dae <inki.dae@samsung.com>
11 - Jagan Teki <jagan@amarulasolutions.com>
12 - Marek Szyprowski <m.szyprowski@samsung.com>
21 - enum:
22 - samsung,exynos3250-mipi-dsi
23 - samsung,exynos4210-mipi-dsi
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| /kernel/linux/linux-5.10/drivers/pinctrl/samsung/ |
| D | pinctrl-exynos-arm.c | 1 // SPDX-License-Identifier: GPL-2.0+
20 #include <linux/soc/samsung/exynos-regs-pmu.h>
22 #include "pinctrl-samsung.h"
23 #include "pinctrl-exynos.h"
35 /* Retention control for S5PV210 are located at the end of clock controller */
45 void __iomem *clk_base = (void __iomem *)drvdata->retention_ctrl->priv; in s5pv210_retention_disable()
62 ctrl = devm_kzalloc(drvdata->dev, sizeof(*ctrl), GFP_KERNEL); in s5pv210_retention_init()
64 return ERR_PTR(-ENOMEM); in s5pv210_retention_init()
66 np = of_find_compatible_node(NULL, NULL, "samsung,s5pv210-clock"); in s5pv210_retention_init()
68 pr_err("%s: failed to find clock controller DT node\n", in s5pv210_retention_init()
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| /kernel/linux/linux-6.6/drivers/pinctrl/samsung/ |
| D | pinctrl-exynos-arm.c | 1 // SPDX-License-Identifier: GPL-2.0+
20 #include <linux/soc/samsung/exynos-regs-pmu.h>
22 #include "pinctrl-samsung.h"
23 #include "pinctrl-exynos.h"
35 /* Retention control for S5PV210 are located at the end of clock controller */
45 void __iomem *clk_base = (void __iomem *)drvdata->retention_ctrl->priv; in s5pv210_retention_disable()
62 ctrl = devm_kzalloc(drvdata->dev, sizeof(*ctrl), GFP_KERNEL); in s5pv210_retention_init()
64 return ERR_PTR(-ENOMEM); in s5pv210_retention_init()
66 np = of_find_compatible_node(NULL, NULL, "samsung,s5pv210-clock"); in s5pv210_retention_init()
68 pr_err("%s: failed to find clock controller DT node\n", in s5pv210_retention_init()
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