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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Dsamsung,exynos7-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/samsung,exynos7-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos7 SoC clock controller
10 - Chanwoo Choi <cw00.choi@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
13 - Tomasz Figa <tomasz.figa@gmail.com>
16 Expected external clocks, defined in DTS as fixed-rate clocks with a matching
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dexynos7-clock.txt1 * Samsung Exynos7 Clock Controller
3 Exynos7 clock controller has various blocks which are instantiated
4 independently from the device-tree. These clock controllers
8 Each clock is assigned an identifier and client nodes can use
9 this identifier to specify the clock which they consume. All
11 dt-bindings/clock/exynos7-clk.h header and can be used in
17 is expected that they are defined using standard clock bindings
18 with following clock-output-names:
20 - "fin_pll" - PLL input clock from XXTI
22 Required Properties for Clock Controller:
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/exynos/
Dexynos7.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung Exynos7 SoC device tree source
9 #include <dt-bindings/clock/exynos7-clk.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 compatible = "samsung,exynos7";
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
31 arm-pmu {
32 compatible = "arm,cortex-a57-pmu";
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/exynos/
Dexynos7.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung Exynos7 SoC device tree source
9 #include <dt-bindings/clock/exynos7-clk.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 compatible = "samsung,exynos7";
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
31 arm-pmu {
32 compatible = "arm,cortex-a57-pmu";
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/kernel/linux/linux-6.6/drivers/clk/samsung/
Dclk-exynos7.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
11 #include <dt-bindings/clock/exynos7-clk.h>
207 CLK_OF_DECLARE(exynos7_clk_topc, "samsung,exynos7-clock-topc",
399 CLK_OF_DECLARE(exynos7_clk_top0, "samsung,exynos7-clock-top0",
541 * This clock is required for the CMU_FSYS1 registers access, keep it
581 CLK_OF_DECLARE(exynos7_clk_top1, "samsung,exynos7-clock-top1",
626 CLK_OF_DECLARE(exynos7_clk_ccore, "samsung,exynos7-clock-ccore",
700 CLK_OF_DECLARE(exynos7_clk_peric0, "samsung,exynos7-clock-peric0",
817 CLK_OF_DECLARE(exynos7_clk_peric1, "samsung,exynos7-clock-peric1",
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/kernel/linux/linux-5.10/drivers/clk/samsung/
Dclk-exynos7.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
11 #include <dt-bindings/clock/exynos7-clk.h>
207 CLK_OF_DECLARE(exynos7_clk_topc, "samsung,exynos7-clock-topc",
399 CLK_OF_DECLARE(exynos7_clk_top0, "samsung,exynos7-clock-top0",
541 * This clock is required for the CMU_FSYS1 registers access, keep it
581 CLK_OF_DECLARE(exynos7_clk_top1, "samsung,exynos7-clock-top1",
626 CLK_OF_DECLARE(exynos7_clk_ccore, "samsung,exynos7-clock-ccore",
700 CLK_OF_DECLARE(exynos7_clk_peric0, "samsung,exynos7-clock-peric0",
817 CLK_OF_DECLARE(exynos7_clk_peric1, "samsung,exynos7-clock-peric1",
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