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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/exynos/
Dexynos7-decon.txt1 Device-Tree bindings for Samsung Exynos7 SoC display controller (DECON)
3 DECON (Display and Enhancement Controller) is the Display Controller for the
4 Exynos7 series of SoCs which transfers the image data from a video memory
8 - compatible: value should be "samsung,exynos7-decon";
10 - reg: physical base address and length of the DECON registers set.
12 - interrupts: should contain a list of all DECON IP block interrupts in the
16 - interrupt-names: should contain the interrupt names: "fifo", "vsync",
20 - pinctrl-0: pin control group to be used for this controller.
22 - pinctrl-names: must contain a "default" entry.
24 - clocks: must include clock specifiers corresponding to entries in the
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/samsung/
Dsamsung,exynos7-decon.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos7-decon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos7 SoC Display and Enhancement Controller (DECON)
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
16 DECON (Display and Enhancement Controller) is the Display Controller for the
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/kernel/linux/linux-6.6/drivers/gpu/drm/exynos/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
28 bool "DECON on Exynos5433"
30 Choose this option if you want to use Exynos5433 DECON for DRM.
33 bool "DECON on Exynos7"
36 Choose this option if you want to use Exynos DECON for DRM.
59 bool "MIPI-DSI host"
66 This enables support for Exynos MIPI-DSI device.
91 comment "Sub-drivers"
Dexynos7_drm_decon.c1 // SPDX-License-Identifier: GPL-2.0-or-later
30 #include "regs-decon7.h"
33 * DECON stands for Display and Enhancement controller.
62 {.compatible = "samsung,exynos7-decon"},
86 struct decon_context *ctx = crtc->ctx; in decon_wait_for_vblank()
88 if (ctx->suspended) in decon_wait_for_vblank()
91 atomic_set(&ctx->wait_vsync_event, 1); in decon_wait_for_vblank()
94 * wait for DECON to signal VSYNC interrupt or return after in decon_wait_for_vblank()
97 if (!wait_event_timeout(ctx->wait_vsync_queue, in decon_wait_for_vblank()
98 !atomic_read(&ctx->wait_vsync_event), in decon_wait_for_vblank()
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/kernel/linux/linux-5.10/drivers/gpu/drm/exynos/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
26 bool "DECON on Exynos5433"
28 Choose this option if you want to use Exynos5433 DECON for DRM.
31 bool "DECON on Exynos7"
34 Choose this option if you want to use Exynos DECON for DRM.
57 bool "MIPI-DSI host"
63 This enables support for Exynos MIPI-DSI device.
87 comment "Sub-drivers"
Dexynos7_drm_decon.c1 // SPDX-License-Identifier: GPL-2.0-or-later
30 #include "regs-decon7.h"
33 * DECON stands for Display and Enhancement controller.
62 {.compatible = "samsung,exynos7-decon"},
86 struct decon_context *ctx = crtc->ctx; in decon_wait_for_vblank()
88 if (ctx->suspended) in decon_wait_for_vblank()
91 atomic_set(&ctx->wait_vsync_event, 1); in decon_wait_for_vblank()
94 * wait for DECON to signal VSYNC interrupt or return after in decon_wait_for_vblank()
97 if (!wait_event_timeout(ctx->wait_vsync_queue, in decon_wait_for_vblank()
98 !atomic_read(&ctx->wait_vsync_event), in decon_wait_for_vblank()
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/exynos/
Dexynos5433.dtsi1 // SPDX-License-Identifier: GPL-2.0
16 #include <dt-bindings/clock/exynos5433.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
21 #address-cells = <2>;
22 #size-cells = <2>;
24 interrupt-parent = <&gic>;
27 compatible = "arm,cortex-a53-pmu";
32 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
36 compatible = "arm,cortex-a57-pmu";
41 interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/exynos/
Dexynos5433.dtsi1 // SPDX-License-Identifier: GPL-2.0
16 #include <dt-bindings/clock/exynos5433.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
21 #address-cells = <2>;
22 #size-cells = <2>;
24 interrupt-parent = <&gic>;
26 arm-a53-pmu {
27 compatible = "arm,cortex-a53-pmu";
32 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
35 arm-a57-pmu {
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